From: Ben Dooks <ben.dooks@codethink.co.uk> To: linux-tegra@vger.kernel.org, alsa-devel@alsa-project.org, Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>, Liam Girdwood <lgirdwood@gmail.com>, Mark Brown <broonie@kernel.org>, Thierry Reding <thierry.reding@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com> Cc: linux-kernel@lists.codethink.co.uk, Ben Dooks <ben.dooks@codethink.co.uk> Subject: [PATCH v4 7/7] ASoC: tegra: take packing settings from the audio cif_config Date: Mon, 7 Oct 2019 16:31:36 +0100 [thread overview] Message-ID: <20191007153136.4920-8-ben.dooks@codethink.co.uk> (raw) In-Reply-To: <20191007153136.4920-1-ben.dooks@codethink.co.uk> If the CIF is not configured as 16 or 8 bit, then the packing for 8/16 bits should not be enabled as the hardware only supports 8 or 16 bit packing. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> --- sound/soc/tegra/tegra30_ahub.c | 29 +++++++++++++++++++++-------- 1 file changed, 21 insertions(+), 8 deletions(-) diff --git a/sound/soc/tegra/tegra30_ahub.c b/sound/soc/tegra/tegra30_ahub.c index 24bc03428b45..0768c6b6dc25 100644 --- a/sound/soc/tegra/tegra30_ahub.c +++ b/sound/soc/tegra/tegra30_ahub.c @@ -96,10 +96,17 @@ int tegra30_ahub_setup_rx_fifo(enum tegra30_ahub_rxcif rxcif, (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE); val = tegra30_apbif_read(reg); val &= ~(TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_MASK | - TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_MASK); - val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_SHIFT) | - TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN | - TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_16; + TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_MASK | + TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN); + val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_SHIFT); + if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16 || + cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8) + val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN; + if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16) + val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_16; + if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8) + val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_8_4; + tegra30_apbif_write(reg, val); cif_conf->direction = TEGRA30_AUDIOCIF_DIRECTION_RX; @@ -203,10 +210,16 @@ int tegra30_ahub_setup_tx_fifo(enum tegra30_ahub_txcif txcif, (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE); val = tegra30_apbif_read(reg); val &= ~(TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_MASK | - TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_MASK); - val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_SHIFT) | - TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN | - TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_16; + TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_MASK | + TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN); + val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_SHIFT); + if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16 || + cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8) + val |= TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN; + if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16) + val |= TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_16; + if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8) + val |= TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_8_4; tegra30_apbif_write(reg, val); cif_conf->direction = TEGRA30_AUDIOCIF_DIRECTION_TX; -- 2.23.0
WARNING: multiple messages have this Message-ID (diff)
From: Ben Dooks <ben.dooks@codethink.co.uk> To: linux-tegra@vger.kernel.org, alsa-devel@alsa-project.org, Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>, Liam Girdwood <lgirdwood@gmail.com>, Mark Brown <broonie@kernel.org>, Thierry Reding <thierry.reding@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com> Cc: linux-kernel@lists.codethink.co.uk, Ben Dooks <ben.dooks@codethink.co.uk> Subject: [alsa-devel] [PATCH v4 7/7] ASoC: tegra: take packing settings from the audio cif_config Date: Mon, 7 Oct 2019 16:31:36 +0100 [thread overview] Message-ID: <20191007153136.4920-8-ben.dooks@codethink.co.uk> (raw) In-Reply-To: <20191007153136.4920-1-ben.dooks@codethink.co.uk> If the CIF is not configured as 16 or 8 bit, then the packing for 8/16 bits should not be enabled as the hardware only supports 8 or 16 bit packing. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> --- sound/soc/tegra/tegra30_ahub.c | 29 +++++++++++++++++++++-------- 1 file changed, 21 insertions(+), 8 deletions(-) diff --git a/sound/soc/tegra/tegra30_ahub.c b/sound/soc/tegra/tegra30_ahub.c index 24bc03428b45..0768c6b6dc25 100644 --- a/sound/soc/tegra/tegra30_ahub.c +++ b/sound/soc/tegra/tegra30_ahub.c @@ -96,10 +96,17 @@ int tegra30_ahub_setup_rx_fifo(enum tegra30_ahub_rxcif rxcif, (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE); val = tegra30_apbif_read(reg); val &= ~(TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_MASK | - TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_MASK); - val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_SHIFT) | - TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN | - TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_16; + TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_MASK | + TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN); + val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_SHIFT); + if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16 || + cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8) + val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN; + if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16) + val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_16; + if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8) + val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_8_4; + tegra30_apbif_write(reg, val); cif_conf->direction = TEGRA30_AUDIOCIF_DIRECTION_RX; @@ -203,10 +210,16 @@ int tegra30_ahub_setup_tx_fifo(enum tegra30_ahub_txcif txcif, (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE); val = tegra30_apbif_read(reg); val &= ~(TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_MASK | - TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_MASK); - val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_SHIFT) | - TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN | - TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_16; + TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_MASK | + TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN); + val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_SHIFT); + if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16 || + cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8) + val |= TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN; + if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16) + val |= TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_16; + if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8) + val |= TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_8_4; tegra30_apbif_write(reg, val); cif_conf->direction = TEGRA30_AUDIOCIF_DIRECTION_TX; -- 2.23.0 _______________________________________________ Alsa-devel mailing list Alsa-devel@alsa-project.org https://mailman.alsa-project.org/mailman/listinfo/alsa-devel
next prev parent reply other threads:[~2019-10-07 15:31 UTC|newest] Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-10-07 15:31 tegra30 tdm support Ben Dooks 2019-10-07 15:31 ` [alsa-devel] " Ben Dooks 2019-10-07 15:31 ` [PATCH v4 1/7] ASoC: tegra: add a TDM configuration callback Ben Dooks 2019-10-07 15:31 ` [alsa-devel] " Ben Dooks 2019-10-07 15:31 ` [PATCH v4 2/7] ASoC: tegra: Allow 24bit and 32bit samples Ben Dooks 2019-10-07 15:31 ` [alsa-devel] " Ben Dooks 2019-10-07 15:31 ` [PATCH v4 3/7] ASoC: tegra: i2s: Add support for more than 2 channels Ben Dooks 2019-10-07 15:31 ` [alsa-devel] " Ben Dooks 2019-10-08 15:29 ` Dmitry Osipenko 2019-10-08 15:29 ` [alsa-devel] " Dmitry Osipenko 2019-10-17 16:23 ` Ben Dooks 2019-10-17 16:23 ` [alsa-devel] " Ben Dooks 2019-10-17 17:38 ` Dmitry Osipenko 2019-10-17 17:38 ` [alsa-devel] " Dmitry Osipenko 2019-10-24 16:11 ` Jon Hunter 2019-10-24 16:11 ` [alsa-devel] " Jon Hunter 2019-11-05 11:58 ` Ben Dooks 2019-11-05 11:58 ` [alsa-devel] " Ben Dooks 2019-10-07 15:31 ` [PATCH v4 4/7] ASoC: tegra: disable rx_fifo after disable stream Ben Dooks 2019-10-07 15:31 ` [alsa-devel] " Ben Dooks 2019-10-07 15:31 ` [PATCH v4 5/7] ASoC: tegra: set i2s_offset to 0 for tdm Ben Dooks 2019-10-07 15:31 ` [alsa-devel] " Ben Dooks 2019-10-07 15:31 ` [PATCH v4 6/7] ASoC: tegra: config fifos on hw_param changes Ben Dooks 2019-10-07 15:31 ` [alsa-devel] " Ben Dooks 2019-10-07 15:31 ` Ben Dooks [this message] 2019-10-07 15:31 ` [alsa-devel] [PATCH v4 7/7] ASoC: tegra: take packing settings from the audio cif_config Ben Dooks
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