From: Ulf Hansson <ulf.hansson@linaro.org> To: "Rafael J . Wysocki" <rjw@rjwysocki.net>, Daniel Lezcano <daniel.lezcano@linaro.org>, Sudeep Holla <sudeep.holla@arm.com>, Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>, Mark Rutland <mark.rutland@arm.com>, Lina Iyer <ilina@codeaurora.org>, linux-pm@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org>, Vincent Guittot <vincent.guittot@linaro.org>, Stephen Boyd <sboyd@kernel.org>, Bjorn Andersson <bjorn.andersson@linaro.org>, Kevin Hilman <khilman@kernel.org>, Ulf Hansson <ulf.hansson@linaro.org>, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Andy Gross <andy.gross@linaro.org>, Lina Iyer <lina.iyer@linaro.org> Subject: [PATCH 13/13] arm64: dts: Convert to the hierarchical CPU topology layout for MSM8916 Date: Thu, 10 Oct 2019 13:39:37 +0200 [thread overview] Message-ID: <20191010113937.15962-14-ulf.hansson@linaro.org> (raw) In-Reply-To: <20191010113937.15962-1-ulf.hansson@linaro.org> To enable the OS to better support PSCI OS initiated CPU suspend mode, let's convert from the flattened layout to the hierarchical layout. In the hierarchical layout, let's create a power domain provider per CPU and describe the idle states for each CPU inside the power domain provider node. To group the CPUs into a cluster, let's add another power domain provider and make it act as the master domain. Note that, the CPU's idle states remains compatible with "arm,idle-state", while the cluster's idle state becomes compatible with "domain-idle-state". Cc: Andy Gross <andy.gross@linaro.org> Co-developed-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 57 +++++++++++++++++++++++++-- 1 file changed, 53 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 5ea9fb8f2f87..1ece0c763592 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -102,10 +102,11 @@ reg = <0x0>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD0>; + power-domain-names = "psci"; }; CPU1: cpu@1 { @@ -114,10 +115,11 @@ reg = <0x1>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD1>; + power-domain-names = "psci"; }; CPU2: cpu@2 { @@ -126,10 +128,11 @@ reg = <0x2>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD2>; + power-domain-names = "psci"; }; CPU3: cpu@3 { @@ -138,10 +141,11 @@ reg = <0x3>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD3>; + power-domain-names = "psci"; }; L2_0: l2-cache { @@ -161,12 +165,57 @@ min-residency-us = <2000>; local-timer-stop; }; + + CLUSTER_RET: cluster-retention { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x41000012>; + entry-latency-us = <500>; + exit-latency-us = <500>; + min-residency-us = <2000>; + }; + + CLUSTER_PWRDN: cluster-gdhs { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x41000032>; + entry-latency-us = <2000>; + exit-latency-us = <2000>; + min-residency-us = <6000>; + }; }; }; psci { compatible = "arm,psci-1.0"; method = "smc"; + + CPU_PD0: cpu-pd0 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CPU_PD1: cpu-pd1 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CPU_PD2: cpu-pd2 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CPU_PD3: cpu-pd3 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CLUSTER_PD: cluster-pd { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>; + }; }; pmu { -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Ulf Hansson <ulf.hansson@linaro.org> To: "Rafael J . Wysocki" <rjw@rjwysocki.net>, Daniel Lezcano <daniel.lezcano@linaro.org>, Sudeep Holla <sudeep.holla@arm.com>, Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>, Mark Rutland <mark.rutland@arm.com>, Lina Iyer <ilina@codeaurora.org>, linux-pm@vger.kernel.org Cc: Ulf Hansson <ulf.hansson@linaro.org>, Kevin Hilman <khilman@kernel.org>, Stephen Boyd <sboyd@kernel.org>, linux-arm-msm@vger.kernel.org, Bjorn Andersson <bjorn.andersson@linaro.org>, Rob Herring <robh+dt@kernel.org>, Lina Iyer <lina.iyer@linaro.org>, Andy Gross <andy.gross@linaro.org>, linux-arm-kernel@lists.infradead.org Subject: [PATCH 13/13] arm64: dts: Convert to the hierarchical CPU topology layout for MSM8916 Date: Thu, 10 Oct 2019 13:39:37 +0200 [thread overview] Message-ID: <20191010113937.15962-14-ulf.hansson@linaro.org> (raw) In-Reply-To: <20191010113937.15962-1-ulf.hansson@linaro.org> To enable the OS to better support PSCI OS initiated CPU suspend mode, let's convert from the flattened layout to the hierarchical layout. In the hierarchical layout, let's create a power domain provider per CPU and describe the idle states for each CPU inside the power domain provider node. To group the CPUs into a cluster, let's add another power domain provider and make it act as the master domain. Note that, the CPU's idle states remains compatible with "arm,idle-state", while the cluster's idle state becomes compatible with "domain-idle-state". Cc: Andy Gross <andy.gross@linaro.org> Co-developed-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 57 +++++++++++++++++++++++++-- 1 file changed, 53 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 5ea9fb8f2f87..1ece0c763592 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -102,10 +102,11 @@ reg = <0x0>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD0>; + power-domain-names = "psci"; }; CPU1: cpu@1 { @@ -114,10 +115,11 @@ reg = <0x1>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD1>; + power-domain-names = "psci"; }; CPU2: cpu@2 { @@ -126,10 +128,11 @@ reg = <0x2>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD2>; + power-domain-names = "psci"; }; CPU3: cpu@3 { @@ -138,10 +141,11 @@ reg = <0x3>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD3>; + power-domain-names = "psci"; }; L2_0: l2-cache { @@ -161,12 +165,57 @@ min-residency-us = <2000>; local-timer-stop; }; + + CLUSTER_RET: cluster-retention { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x41000012>; + entry-latency-us = <500>; + exit-latency-us = <500>; + min-residency-us = <2000>; + }; + + CLUSTER_PWRDN: cluster-gdhs { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x41000032>; + entry-latency-us = <2000>; + exit-latency-us = <2000>; + min-residency-us = <6000>; + }; }; }; psci { compatible = "arm,psci-1.0"; method = "smc"; + + CPU_PD0: cpu-pd0 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CPU_PD1: cpu-pd1 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CPU_PD2: cpu-pd2 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CPU_PD3: cpu-pd3 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CLUSTER_PD: cluster-pd { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>; + }; }; pmu { -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-10-10 11:40 UTC|newest] Thread overview: 110+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-10-10 11:39 [PATCH 00/13] cpuidle: psci: Support hierarchical CPU arrangement Ulf Hansson 2019-10-10 11:39 ` Ulf Hansson 2019-10-10 11:39 ` [PATCH 01/13] cpuidle: psci: Fix potential access to unmapped memory Ulf Hansson 2019-10-10 11:39 ` Ulf Hansson 2019-10-18 9:38 ` Lorenzo Pieralisi 2019-10-18 9:38 ` Lorenzo Pieralisi 2019-10-18 9:51 ` Ulf Hansson 2019-10-18 9:51 ` Ulf Hansson 2019-10-18 10:03 ` Lorenzo Pieralisi 2019-10-18 10:03 ` Lorenzo Pieralisi 2019-10-18 10:29 ` Ulf Hansson 2019-10-18 10:29 ` Ulf Hansson 2019-10-18 16:47 ` Lorenzo Pieralisi 2019-10-18 16:47 ` Lorenzo Pieralisi 2019-10-24 15:18 ` [PATCH] cpuidle: psci: Align psci_power_state count with idle state count Sudeep Holla 2019-10-24 15:18 ` Sudeep Holla 2019-10-24 16:10 ` Ulf Hansson 2019-10-24 16:10 ` Ulf Hansson 2019-10-27 2:20 ` Sudeep Holla 2019-10-27 2:20 ` Sudeep Holla 2019-10-10 11:39 ` [PATCH 02/13] dt: psci: Update DT bindings to support hierarchical PSCI states Ulf Hansson 2019-10-10 11:39 ` Ulf Hansson 2019-10-24 15:26 ` Sudeep Holla 2019-10-24 15:26 ` Sudeep Holla 2019-10-24 16:23 ` Ulf Hansson 2019-10-24 16:23 ` Ulf Hansson 2019-10-10 11:39 ` [PATCH 03/13] firmware: psci: Export functions to manage the OSI mode Ulf Hansson 2019-10-10 11:39 ` Ulf Hansson 2019-10-24 15:27 ` Sudeep Holla 2019-10-24 15:27 ` Sudeep Holla 2019-10-10 11:39 ` [PATCH 04/13] of: base: Add of_get_cpu_state_node() to get idle states for a CPU node Ulf Hansson 2019-10-10 11:39 ` Ulf Hansson 2019-10-24 15:28 ` Sudeep Holla 2019-10-24 15:28 ` Sudeep Holla 2019-10-10 11:39 ` [PATCH 05/13] cpuidle: dt: Support hierarchical CPU idle states Ulf Hansson 2019-10-10 11:39 ` Ulf Hansson 2019-10-24 15:30 ` Sudeep Holla 2019-10-24 15:30 ` Sudeep Holla 2019-10-10 11:39 ` [PATCH 06/13] cpuidle: psci: Simplify OF parsing of CPU idle state nodes Ulf Hansson 2019-10-10 11:39 ` Ulf Hansson 2019-10-24 15:36 ` Sudeep Holla 2019-10-24 15:36 ` Sudeep Holla 2019-10-24 16:33 ` Ulf Hansson 2019-10-24 16:33 ` Ulf Hansson 2019-10-27 2:24 ` Sudeep Holla 2019-10-27 2:24 ` Sudeep Holla 2019-10-10 11:39 ` [PATCH 07/13] cpuidle: psci: Support hierarchical CPU idle states Ulf Hansson 2019-10-10 11:39 ` Ulf Hansson 2019-10-24 15:39 ` Sudeep Holla 2019-10-24 15:39 ` Sudeep Holla 2019-10-10 11:39 ` [PATCH 08/13] cpuidle: psci: Prepare to use OS initiated suspend mode via PM domains Ulf Hansson 2019-10-10 11:39 ` Ulf Hansson 2019-10-24 15:42 ` Sudeep Holla 2019-10-24 15:42 ` Sudeep Holla 2019-10-24 17:01 ` Ulf Hansson 2019-10-24 17:01 ` Ulf Hansson 2019-10-10 11:39 ` [PATCH 09/13] cpuidle: psci: Add support for PM domains by using genpd Ulf Hansson 2019-10-10 11:39 ` Ulf Hansson 2019-10-24 15:46 ` Sudeep Holla 2019-10-24 15:46 ` Sudeep Holla 2019-10-10 11:39 ` [PATCH 10/13] cpuidle: psci: Add a helper to attach a CPU to its PM domain Ulf Hansson 2019-10-10 11:39 ` Ulf Hansson 2019-10-24 16:31 ` Sudeep Holla 2019-10-24 16:31 ` Sudeep Holla 2019-10-24 16:47 ` Ulf Hansson 2019-10-24 16:47 ` Ulf Hansson 2019-10-27 2:30 ` Sudeep Holla 2019-10-27 2:30 ` Sudeep Holla 2019-10-28 7:35 ` Ulf Hansson 2019-10-28 7:35 ` Ulf Hansson 2019-10-28 7:49 ` Sudeep Holla 2019-10-28 7:49 ` Sudeep Holla 2019-10-28 9:45 ` Ulf Hansson 2019-10-28 9:45 ` Ulf Hansson 2019-10-29 5:34 ` Sudeep Holla 2019-10-29 5:34 ` Sudeep Holla 2019-10-29 9:44 ` Niklas Cassel 2019-10-29 9:44 ` Niklas Cassel 2019-10-30 0:50 ` Sudeep Holla 2019-10-30 0:50 ` Sudeep Holla 2019-10-10 11:39 ` [PATCH 11/13] cpuidle: psci: Attach CPU devices to their PM domains Ulf Hansson 2019-10-10 11:39 ` Ulf Hansson 2019-10-24 16:35 ` Sudeep Holla 2019-10-24 16:35 ` Sudeep Holla 2019-10-24 16:55 ` Ulf Hansson 2019-10-24 16:55 ` Ulf Hansson 2019-10-27 2:32 ` Sudeep Holla 2019-10-27 2:32 ` Sudeep Holla 2019-10-10 11:39 ` [PATCH 12/13] cpuidle: psci: Manage runtime PM in the idle path Ulf Hansson 2019-10-10 11:39 ` Ulf Hansson 2019-10-24 16:32 ` Sudeep Holla 2019-10-24 16:32 ` Sudeep Holla 2019-10-24 17:00 ` Ulf Hansson 2019-10-24 17:00 ` Ulf Hansson 2019-10-25 8:28 ` Lorenzo Pieralisi 2019-10-25 8:28 ` Lorenzo Pieralisi 2019-10-25 14:13 ` Ulf Hansson 2019-10-25 14:13 ` Ulf Hansson 2019-10-27 2:34 ` Sudeep Holla 2019-10-27 2:34 ` Sudeep Holla 2019-10-28 22:40 ` Ulf Hansson 2019-10-28 22:40 ` Ulf Hansson 2019-10-10 11:39 ` Ulf Hansson [this message] 2019-10-10 11:39 ` [PATCH 13/13] arm64: dts: Convert to the hierarchical CPU topology layout for MSM8916 Ulf Hansson 2019-10-24 16:41 ` Sudeep Holla 2019-10-24 16:41 ` Sudeep Holla 2019-10-24 17:03 ` Ulf Hansson 2019-10-24 17:03 ` Ulf Hansson 2019-10-18 8:10 ` [PATCH 00/13] cpuidle: psci: Support hierarchical CPU arrangement Ulf Hansson 2019-10-18 8:10 ` Ulf Hansson
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