From: Marc Zyngier <maz@kernel.org> To: kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org Cc: Eric Auger <eric.auger@redhat.com>, James Morse <james.morse@arm.com>, Julien Thierry <julien.thierry.kdev@gmail.com>, Suzuki K Poulose <suzuki.poulose@arm.com>, Thomas Gleixner <tglx@linutronix.de>, Jason Cooper <jason@lakedaemon.net>, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Andrew Murray <Andrew.Murray@arm.com>, Zenghui Yu <yuzenghui@huawei.com>, Jayachandran C <jnair@marvell.com>, Robert Richter <rrichter@marvell.com> Subject: [PATCH v2 24/36] irqchip/gic-v4.1: Plumb skeletal VSGI irqchip Date: Sun, 27 Oct 2019 14:42:22 +0000 [thread overview] Message-ID: <20191027144234.8395-25-maz@kernel.org> (raw) In-Reply-To: <20191027144234.8395-1-maz@kernel.org> Since GICv4.1 has the capability to inject 16 SGIs into each VPE, and that I'm keen not to invent too many specific interfaces to manupulate these interrupts, let's pretend that each of these SGIs is an actual Linux interrupt. For that matter, let's introduce a minimal irqchip and irqdomain setup that will get fleshed up in the following patches. Signed-off-by: Marc Zyngier <maz@kernel.org> --- drivers/irqchip/irq-gic-v3-its.c | 68 +++++++++++++++++++++++++++++- drivers/irqchip/irq-gic-v4.c | 8 +++- include/linux/irqchip/arm-gic-v4.h | 9 +++- 3 files changed, 81 insertions(+), 4 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 991a70b457b4..6a3952d3c379 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -3581,6 +3581,67 @@ static struct irq_chip its_vpe_4_1_irq_chip = { .irq_set_vcpu_affinity = its_vpe_4_1_set_vcpu_affinity, }; +static int its_sgi_set_affinity(struct irq_data *d, + const struct cpumask *mask_val, + bool force) +{ + return -EINVAL; +} + +static struct irq_chip its_sgi_irq_chip = { + .name = "GICv4.1-sgi", + .irq_set_affinity = its_sgi_set_affinity, +}; + +static int its_sgi_irq_domain_alloc(struct irq_domain *domain, + unsigned int virq, unsigned int nr_irqs, + void *args) +{ + struct its_vpe *vpe = args; + int i; + + /* Yes, we do want 16 SGIs */ + WARN_ON(nr_irqs != 16); + + for (i = 0; i < 16; i++) { + vpe->sgi_config[i].priority = 0; + vpe->sgi_config[i].enabled = false; + vpe->sgi_config[i].group = false; + + irq_domain_set_hwirq_and_chip(domain, virq + i, i, + &its_sgi_irq_chip, vpe); + irq_set_status_flags(virq + i, IRQ_DISABLE_UNLAZY); + } + + return 0; +} + +static void its_sgi_irq_domain_free(struct irq_domain *domain, + unsigned int virq, + unsigned int nr_irqs) +{ + /* Nothing to do */ +} + +static int its_sgi_irq_domain_activate(struct irq_domain *domain, + struct irq_data *d, bool reserve) +{ + return 0; +} + +static void its_sgi_irq_domain_deactivate(struct irq_domain *domain, + struct irq_data *d) +{ + /* Nothing to do */ +} + +static struct irq_domain_ops its_sgi_domain_ops = { + .alloc = its_sgi_irq_domain_alloc, + .free = its_sgi_irq_domain_free, + .activate = its_sgi_irq_domain_activate, + .deactivate = its_sgi_irq_domain_deactivate, +}; + static int its_vpe_id_alloc(void) { return ida_simple_get(&its_vpeid_ida, 0, ITS_MAX_VPEID, GFP_KERNEL); @@ -4622,8 +4683,13 @@ int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, rdists->has_rvpeid = false; if (has_v4 & rdists->has_vlpis) { + struct irq_domain_ops *sgi_ops = NULL; + + if (has_v4_1) + sgi_ops = &its_sgi_domain_ops; + if (its_init_vpe_domain() || - its_init_v4(parent_domain, &its_vpe_domain_ops)) { + its_init_v4(parent_domain, &its_vpe_domain_ops, sgi_ops)) { rdists->has_vlpis = false; pr_err("ITS: Disabling GICv4 support\n"); } diff --git a/drivers/irqchip/irq-gic-v4.c b/drivers/irqchip/irq-gic-v4.c index 45969927cc81..c01910d53f9e 100644 --- a/drivers/irqchip/irq-gic-v4.c +++ b/drivers/irqchip/irq-gic-v4.c @@ -85,6 +85,7 @@ static struct irq_domain *gic_domain; static const struct irq_domain_ops *vpe_domain_ops; +static const struct irq_domain_ops *sgi_domain_ops; int its_alloc_vcpu_irqs(struct its_vm *vm) { @@ -216,12 +217,15 @@ int its_prop_update_vlpi(int irq, u8 config, bool inv) return irq_set_vcpu_affinity(irq, &info); } -int its_init_v4(struct irq_domain *domain, const struct irq_domain_ops *ops) +int its_init_v4(struct irq_domain *domain, + const struct irq_domain_ops *vpe_ops, + const struct irq_domain_ops *sgi_ops) { if (domain) { pr_info("ITS: Enabling GICv4 support\n"); gic_domain = domain; - vpe_domain_ops = ops; + vpe_domain_ops = vpe_ops; + sgi_domain_ops = sgi_ops; return 0; } diff --git a/include/linux/irqchip/arm-gic-v4.h b/include/linux/irqchip/arm-gic-v4.h index edbaa37fd3f1..03bbd0aed2e2 100644 --- a/include/linux/irqchip/arm-gic-v4.h +++ b/include/linux/irqchip/arm-gic-v4.h @@ -47,6 +47,11 @@ struct its_vpe { }; /* GICv4.1 implementations */ struct { + struct { + u8 priority; + bool enabled; + bool group; + } sgi_config[16]; atomic_t vmapp_count; }; }; @@ -116,6 +121,8 @@ int its_unmap_vlpi(int irq); int its_prop_update_vlpi(int irq, u8 config, bool inv); struct irq_domain_ops; -int its_init_v4(struct irq_domain *domain, const struct irq_domain_ops *ops); +int its_init_v4(struct irq_domain *domain, + const struct irq_domain_ops *vpe_ops, + const struct irq_domain_ops *sgi_ops); #endif -- 2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org> To: kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Jason Cooper <jason@lakedaemon.net>, Robert Richter <rrichter@marvell.com>, Jayachandran C <jnair@marvell.com>, Thomas Gleixner <tglx@linutronix.de> Subject: [PATCH v2 24/36] irqchip/gic-v4.1: Plumb skeletal VSGI irqchip Date: Sun, 27 Oct 2019 14:42:22 +0000 [thread overview] Message-ID: <20191027144234.8395-25-maz@kernel.org> (raw) In-Reply-To: <20191027144234.8395-1-maz@kernel.org> Since GICv4.1 has the capability to inject 16 SGIs into each VPE, and that I'm keen not to invent too many specific interfaces to manupulate these interrupts, let's pretend that each of these SGIs is an actual Linux interrupt. For that matter, let's introduce a minimal irqchip and irqdomain setup that will get fleshed up in the following patches. Signed-off-by: Marc Zyngier <maz@kernel.org> --- drivers/irqchip/irq-gic-v3-its.c | 68 +++++++++++++++++++++++++++++- drivers/irqchip/irq-gic-v4.c | 8 +++- include/linux/irqchip/arm-gic-v4.h | 9 +++- 3 files changed, 81 insertions(+), 4 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 991a70b457b4..6a3952d3c379 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -3581,6 +3581,67 @@ static struct irq_chip its_vpe_4_1_irq_chip = { .irq_set_vcpu_affinity = its_vpe_4_1_set_vcpu_affinity, }; +static int its_sgi_set_affinity(struct irq_data *d, + const struct cpumask *mask_val, + bool force) +{ + return -EINVAL; +} + +static struct irq_chip its_sgi_irq_chip = { + .name = "GICv4.1-sgi", + .irq_set_affinity = its_sgi_set_affinity, +}; + +static int its_sgi_irq_domain_alloc(struct irq_domain *domain, + unsigned int virq, unsigned int nr_irqs, + void *args) +{ + struct its_vpe *vpe = args; + int i; + + /* Yes, we do want 16 SGIs */ + WARN_ON(nr_irqs != 16); + + for (i = 0; i < 16; i++) { + vpe->sgi_config[i].priority = 0; + vpe->sgi_config[i].enabled = false; + vpe->sgi_config[i].group = false; + + irq_domain_set_hwirq_and_chip(domain, virq + i, i, + &its_sgi_irq_chip, vpe); + irq_set_status_flags(virq + i, IRQ_DISABLE_UNLAZY); + } + + return 0; +} + +static void its_sgi_irq_domain_free(struct irq_domain *domain, + unsigned int virq, + unsigned int nr_irqs) +{ + /* Nothing to do */ +} + +static int its_sgi_irq_domain_activate(struct irq_domain *domain, + struct irq_data *d, bool reserve) +{ + return 0; +} + +static void its_sgi_irq_domain_deactivate(struct irq_domain *domain, + struct irq_data *d) +{ + /* Nothing to do */ +} + +static struct irq_domain_ops its_sgi_domain_ops = { + .alloc = its_sgi_irq_domain_alloc, + .free = its_sgi_irq_domain_free, + .activate = its_sgi_irq_domain_activate, + .deactivate = its_sgi_irq_domain_deactivate, +}; + static int its_vpe_id_alloc(void) { return ida_simple_get(&its_vpeid_ida, 0, ITS_MAX_VPEID, GFP_KERNEL); @@ -4622,8 +4683,13 @@ int __init its_init(struct fwnode_handle *handle, struct rdists *rdists, rdists->has_rvpeid = false; if (has_v4 & rdists->has_vlpis) { + struct irq_domain_ops *sgi_ops = NULL; + + if (has_v4_1) + sgi_ops = &its_sgi_domain_ops; + if (its_init_vpe_domain() || - its_init_v4(parent_domain, &its_vpe_domain_ops)) { + its_init_v4(parent_domain, &its_vpe_domain_ops, sgi_ops)) { rdists->has_vlpis = false; pr_err("ITS: Disabling GICv4 support\n"); } diff --git a/drivers/irqchip/irq-gic-v4.c b/drivers/irqchip/irq-gic-v4.c index 45969927cc81..c01910d53f9e 100644 --- a/drivers/irqchip/irq-gic-v4.c +++ b/drivers/irqchip/irq-gic-v4.c @@ -85,6 +85,7 @@ static struct irq_domain *gic_domain; static const struct irq_domain_ops *vpe_domain_ops; +static const struct irq_domain_ops *sgi_domain_ops; int its_alloc_vcpu_irqs(struct its_vm *vm) { @@ -216,12 +217,15 @@ int its_prop_update_vlpi(int irq, u8 config, bool inv) return irq_set_vcpu_affinity(irq, &info); } -int its_init_v4(struct irq_domain *domain, const struct irq_domain_ops *ops) +int its_init_v4(struct irq_domain *domain, + const struct irq_domain_ops *vpe_ops, + const struct irq_domain_ops *sgi_ops) { if (domain) { pr_info("ITS: Enabling GICv4 support\n"); gic_domain = domain; - vpe_domain_ops = ops; + vpe_domain_ops = vpe_ops; + sgi_domain_ops = sgi_ops; return 0; } diff --git a/include/linux/irqchip/arm-gic-v4.h b/include/linux/irqchip/arm-gic-v4.h index edbaa37fd3f1..03bbd0aed2e2 100644 --- a/include/linux/irqchip/arm-gic-v4.h +++ b/include/linux/irqchip/arm-gic-v4.h @@ -47,6 +47,11 @@ struct its_vpe { }; /* GICv4.1 implementations */ struct { + struct { + u8 priority; + bool enabled; + bool group; + } sgi_config[16]; atomic_t vmapp_count; }; }; @@ -116,6 +121,8 @@ int its_unmap_vlpi(int irq); int its_prop_update_vlpi(int irq, u8 config, bool inv); struct irq_domain_ops; -int its_init_v4(struct irq_domain *domain, const struct irq_domain_ops *ops); +int its_init_v4(struct irq_domain *domain, + const struct irq_domain_ops *vpe_ops, + const struct irq_domain_ops *sgi_ops); #endif -- 2.20.1 _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
next prev parent reply other threads:[~2019-10-27 14:45 UTC|newest] Thread overview: 151+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-10-27 14:41 [PATCH v2 00/36] irqchip/gic-v4: GICv4.1 architecture support Marc Zyngier 2019-10-27 14:41 ` Marc Zyngier 2019-10-27 14:41 ` [PATCH v2 01/36] KVM: arm64: vgic-v4: Move the GICv4 residency flow to be driven by vcpu_load/put Marc Zyngier 2019-10-27 14:41 ` Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 02/36] irqchip/gic-v3-its: Factor out wait_for_syncr primitive Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-10-28 9:20 ` Zenghui Yu 2019-10-28 9:20 ` Zenghui Yu 2019-11-20 13:21 ` [tip: irq/core] " tip-bot2 for Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 03/36] irqchip/gic-v3-its: Allow LPI invalidation via the DirectLPI interface Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-10-31 8:49 ` Zenghui Yu 2019-10-31 8:49 ` Zenghui Yu 2019-11-01 13:26 ` Marc Zyngier 2019-11-01 13:26 ` Marc Zyngier 2019-11-05 10:30 ` Zenghui Yu 2019-11-05 10:30 ` Zenghui Yu 2019-11-05 12:12 ` Marc Zyngier 2019-11-05 12:12 ` Marc Zyngier 2019-11-20 13:21 ` [tip: irq/core] " tip-bot2 for Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 04/36] irqchip/gic-v3-its: Make is_v4 use a TYPER copy Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-10-28 9:34 ` Zenghui Yu 2019-10-28 9:34 ` Zenghui Yu 2019-10-28 10:52 ` Marc Zyngier 2019-10-28 10:52 ` Marc Zyngier 2019-11-20 13:21 ` [tip: irq/core] " tip-bot2 for Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 05/36] irqchip/gic-v3-its: Kill its->ite_size and use TYPER copy instead Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-10-28 9:40 ` Zenghui Yu 2019-10-28 9:40 ` Zenghui Yu 2019-11-20 13:21 ` [tip: irq/core] " tip-bot2 for Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 06/36] irqchip/gic-v3-its: Kill its->device_ids " Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-10-31 6:33 ` Zenghui Yu 2019-10-31 6:33 ` Zenghui Yu 2019-10-31 8:30 ` Marc Zyngier 2019-10-31 8:30 ` Marc Zyngier 2019-10-31 9:08 ` Zenghui Yu 2019-10-31 9:08 ` Zenghui Yu 2019-11-20 13:21 ` [tip: irq/core] " tip-bot2 for Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 07/36] irqchip/gic-v3-its: Add get_vlpi_map() helper Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-10-31 3:54 ` Zenghui Yu 2019-10-31 3:54 ` Zenghui Yu 2019-11-20 13:21 ` [tip: irq/core] irqchip/gic-v3-its: Add its_vlpi_map helpers tip-bot2 for Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 08/36] irqchip/gic-v3: Detect GICv4.1 supporting RVPEID Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-10-31 11:34 ` Zenghui Yu 2019-10-31 11:34 ` Zenghui Yu 2019-10-27 14:42 ` [PATCH v2 09/36] irqchip/gic-v3: Add GICv4.1 VPEID size discovery Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-10-31 12:02 ` Zenghui Yu 2019-10-31 12:02 ` Zenghui Yu 2019-11-01 15:13 ` Marc Zyngier 2019-11-01 15:13 ` Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 10/36] irqchip/gic-v3: Workaround Cavium TX1 erratum when reading GICD_TYPER2 Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2020-03-15 9:55 ` [tip: irq/urgent] irqchip/gic-v3: Workaround Cavium erratum 38539 " tip-bot2 for Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 11/36] irqchip/gic-v4.1: VPE table (aka GICR_VPROPBASER) allocation Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-12-24 7:10 ` Zenghui Yu 2019-12-24 7:10 ` Zenghui Yu 2019-12-24 9:19 ` Marc Zyngier 2019-12-24 9:19 ` Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 12/36] irqchip/gic-v4.1: Implement the v4.1 flavour of VMAPP Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-11-01 10:58 ` Zenghui Yu 2019-11-01 10:58 ` Zenghui Yu 2019-11-13 8:02 ` Zenghui Yu 2019-11-13 8:02 ` Zenghui Yu 2019-11-13 9:47 ` Marc Zyngier 2019-11-13 9:47 ` Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 13/36] irqchip/gic-v4.1: Don't use the VPE proxy if RVPEID is set Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-11-01 11:05 ` Zenghui Yu 2019-11-01 11:05 ` Zenghui Yu 2019-12-18 14:39 ` Marc Zyngier 2019-12-18 14:39 ` Marc Zyngier 2019-12-19 3:05 ` Zenghui Yu 2019-12-19 3:05 ` Zenghui Yu 2019-10-27 14:42 ` [PATCH v2 14/36] irqchip/gic-v4.1: Implement the v4.1 flavour of VMOVP Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-11-01 11:10 ` Zenghui Yu 2019-11-01 11:10 ` Zenghui Yu 2019-10-27 14:42 ` [PATCH v2 15/36] irqchip/gic-v4.1: Plumb skeletal VPE irqchip Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-11-01 11:13 ` Zenghui Yu 2019-11-01 11:13 ` Zenghui Yu 2019-10-27 14:42 ` [PATCH v2 16/36] irqchip/gic-v4.1: Add mask/unmask doorbell callbacks Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-11-01 11:23 ` Zenghui Yu 2019-11-01 11:23 ` Zenghui Yu 2019-12-18 15:06 ` Marc Zyngier 2019-12-18 15:06 ` Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 17/36] irqchip/gic-v4.1: Add VPE residency callback Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-11-01 11:34 ` Zenghui Yu 2019-11-01 11:34 ` Zenghui Yu 2019-10-27 14:42 ` [PATCH v2 18/36] irqchip/gic-v4.1: Add VPE eviction callback Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-11-01 11:39 ` Zenghui Yu 2019-11-01 11:39 ` Zenghui Yu 2019-10-27 14:42 ` [PATCH v2 19/36] irqchip/gic-v4.1: Add VPE INVALL callback Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-11-01 11:51 ` Zenghui Yu 2019-11-01 11:51 ` Zenghui Yu 2019-12-18 14:18 ` Marc Zyngier 2019-12-18 14:18 ` Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 20/36] irqchip/gic-v4.1: Suppress per-VLPI doorbell Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-11-01 12:17 ` Zenghui Yu 2019-11-01 12:17 ` Zenghui Yu 2019-10-27 14:42 ` [PATCH v2 21/36] irqchip/gic-v4.1: Allow direct invalidation of VLPIs Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-11-01 12:30 ` Zenghui Yu 2019-11-01 12:30 ` Zenghui Yu 2019-10-27 14:42 ` [PATCH v2 22/36] irqchip/gic-v4.1: Advertise support v4.1 to KVM Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-11-01 12:55 ` Zenghui Yu 2019-11-01 12:55 ` Zenghui Yu 2019-12-18 14:48 ` Marc Zyngier 2019-12-18 14:48 ` Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 23/36] irqchip/gic-v4.1: Map the ITS SGIR register page Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier [this message] 2019-10-27 14:42 ` [PATCH v2 24/36] irqchip/gic-v4.1: Plumb skeletal VSGI irqchip Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 25/36] irqchip/gic-v4.1: Add initial SGI configuration Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 26/36] irqchip/gic-v4.1: Plumb mask/unmask SGI callbacks Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 27/36] irqchip/gic-v4.1: Plumb get/set_irqchip_state " Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 28/36] irqchip/gic-v4.1: Plumb set_vcpu_affinity " Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 29/36] irqchip/gic-v4.1: Move doorbell management to the GICv4 abstraction layer Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 30/36] irqchip/gic-v4.1: Add VSGI allocation/teardown Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 31/36] irqchip/gic-v4.1: Add VSGI property setup Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 32/36] irqchip/gic-v4.1: Eagerly vmap vPEs Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 33/36] KVM: arm64: GICv4.1: Let doorbells be auto-enabled Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 34/36] KVM: arm64: GICv4.1: Add direct injection capability to SGI registers Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 35/36] KVM: arm64: GICv4.1: Configure SGIs as HW interrupts Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier 2019-10-27 14:42 ` [PATCH v2 36/36] KVM: arm64: GICv4.1: Expose HW-based SGIs in debugfs Marc Zyngier 2019-10-27 14:42 ` Marc Zyngier
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