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From: Rob Herring <robh@kernel.org>
To: Andrew Murray <andrew.murray@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	bcm-kernel-feedback-list@broadcom.com,
	Christoph Hellwig <hch@infradead.org>,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Heiko Stuebner <heiko@sntech.de>,
	Hou Zhiqiang <Zhiqiang.Hou@nxp.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>,
	Ley Foon Tan <lftan@altera.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	linux-mediatek@lists.infradead.org,
	linux-renesas-soc@vger.kernel.org,
	linux-rockchip@lists.infradead.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Michal Simek <michal.simek@xilinx.com>,
	Ray Jui <rjui@broadcom.com>,
	rfi@lists.rocketboards.org, Ryder Lee <ryder.lee@mediatek.com>,
	Scott Branden <sbranden@broadcom.com>,
	Shawn Lin <shawn.lin@rock-chips.com>,
	Simon Horman <horms@verge.net.au>,
	Srinath Mannam <srinath.mannam@broadcom.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Toan Le <toan@os.amperecomputing.com>,
	Tom Joseph <tjoseph@cadence.com>, Will Deacon <will@kernel.org>
Subject: [PATCH v3 09/25] PCI: mobiveil: Use pci_parse_request_of_pci_ranges()
Date: Mon, 28 Oct 2019 11:32:40 -0500	[thread overview]
Message-ID: <20191028163256.8004-10-robh@kernel.org> (raw)
In-Reply-To: <20191028163256.8004-1-robh@kernel.org>

Convert the Mobiveil host bridge to use the common
pci_parse_request_of_pci_ranges().

There's no need to assign the resources to a temporary list first. Just
use bridge->windows directly and remove all the temporary list handling.

Cc: Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>
Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
---
 drivers/pci/controller/pcie-mobiveil.c | 26 +++++++-------------------
 1 file changed, 7 insertions(+), 19 deletions(-)

diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c
index a45a6447b01d..4eab8624ce4d 100644
--- a/drivers/pci/controller/pcie-mobiveil.c
+++ b/drivers/pci/controller/pcie-mobiveil.c
@@ -140,7 +140,6 @@ struct mobiveil_msi {			/* MSI information */
 
 struct mobiveil_pcie {
 	struct platform_device *pdev;
-	struct list_head resources;
 	void __iomem *config_axi_slave_base;	/* endpoint config base */
 	void __iomem *csr_axi_slave_base;	/* root port config base */
 	void __iomem *apb_csr_base;	/* MSI register base */
@@ -575,6 +574,7 @@ static void mobiveil_pcie_enable_msi(struct mobiveil_pcie *pcie)
 
 static int mobiveil_host_init(struct mobiveil_pcie *pcie)
 {
+	struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie);
 	u32 value, pab_ctrl, type;
 	struct resource_entry *win;
 
@@ -631,7 +631,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie)
 	program_ib_windows(pcie, WIN_NUM_0, 0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE);
 
 	/* Get the I/O and memory ranges from DT */
-	resource_list_for_each_entry(win, &pcie->resources) {
+	resource_list_for_each_entry(win, &bridge->windows) {
 		if (resource_type(win->res) == IORESOURCE_MEM)
 			type = MEM_WINDOW_TYPE;
 		else if (resource_type(win->res) == IORESOURCE_IO)
@@ -857,7 +857,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
 	struct pci_bus *child;
 	struct pci_host_bridge *bridge;
 	struct device *dev = &pdev->dev;
-	resource_size_t iobase;
 	int ret;
 
 	/* allocate the PCIe port */
@@ -875,11 +874,8 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
 		return ret;
 	}
 
-	INIT_LIST_HEAD(&pcie->resources);
-
 	/* parse the host bridge base addresses from the device tree file */
-	ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff,
-						    &pcie->resources, &iobase);
+	ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, NULL);
 	if (ret) {
 		dev_err(dev, "Getting bridge resources failed\n");
 		return ret;
@@ -892,24 +888,19 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
 	ret = mobiveil_host_init(pcie);
 	if (ret) {
 		dev_err(dev, "Failed to initialize host\n");
-		goto error;
+		return ret;
 	}
 
 	/* initialize the IRQ domains */
 	ret = mobiveil_pcie_init_irq_domain(pcie);
 	if (ret) {
 		dev_err(dev, "Failed creating IRQ Domain\n");
-		goto error;
+		return ret;
 	}
 
 	irq_set_chained_handler_and_data(pcie->irq, mobiveil_pcie_isr, pcie);
 
-	ret = devm_request_pci_bus_resources(dev, &pcie->resources);
-	if (ret)
-		goto error;
-
 	/* Initialize bridge */
-	list_splice_init(&pcie->resources, &bridge->windows);
 	bridge->dev.parent = dev;
 	bridge->sysdata = pcie;
 	bridge->busnr = pcie->root_bus_nr;
@@ -920,13 +911,13 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
 	ret = mobiveil_bringup_link(pcie);
 	if (ret) {
 		dev_info(dev, "link bring-up failed\n");
-		goto error;
+		return ret;
 	}
 
 	/* setup the kernel resources for the newly added PCIe root bus */
 	ret = pci_scan_root_bus_bridge(bridge);
 	if (ret)
-		goto error;
+		return ret;
 
 	bus = bridge->bus;
 
@@ -936,9 +927,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
 	pci_bus_add_devices(bus);
 
 	return 0;
-error:
-	pci_free_resource_list(&pcie->resources);
-	return ret;
 }
 
 static const struct of_device_id mobiveil_pcie_of_match[] = {
-- 
2.20.1


WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Andrew Murray <andrew.murray@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Heiko Stuebner <heiko@sntech.de>,
	Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>,
	linux-pci@vger.kernel.org, Shawn Lin <shawn.lin@rock-chips.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Toan Le <toan@os.amperecomputing.com>,
	Will Deacon <will@kernel.org>, Ryder Lee <ryder.lee@mediatek.com>,
	Michal Simek <michal.simek@xilinx.com>,
	Christoph Hellwig <hch@infradead.org>,
	linux-rockchip@lists.infradead.org,
	bcm-kernel-feedback-list@broadcom.com,
	Linus Walleij <linus.walleij@linaro.org>,
	Ray Jui <rjui@broadcom.com>, Hou Zhiqiang <Zhiqiang.Hou@nxp.com>,
	Simon Horman <horms@verge.net.au>,
	linux-mediatek@lists.infradead.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	linux-arm-kernel@lists.infradead.org,
	Scott Branden <sbranden@broadcom.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	rfi@lists.rocketboards.org, linux-renesas-soc@vger.kernel.org,
	Tom Joseph <tjoseph@cadence>
Subject: [PATCH v3 09/25] PCI: mobiveil: Use pci_parse_request_of_pci_ranges()
Date: Mon, 28 Oct 2019 11:32:40 -0500	[thread overview]
Message-ID: <20191028163256.8004-10-robh@kernel.org> (raw)
In-Reply-To: <20191028163256.8004-1-robh@kernel.org>

Convert the Mobiveil host bridge to use the common
pci_parse_request_of_pci_ranges().

There's no need to assign the resources to a temporary list first. Just
use bridge->windows directly and remove all the temporary list handling.

Cc: Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>
Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
---
 drivers/pci/controller/pcie-mobiveil.c | 26 +++++++-------------------
 1 file changed, 7 insertions(+), 19 deletions(-)

diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c
index a45a6447b01d..4eab8624ce4d 100644
--- a/drivers/pci/controller/pcie-mobiveil.c
+++ b/drivers/pci/controller/pcie-mobiveil.c
@@ -140,7 +140,6 @@ struct mobiveil_msi {			/* MSI information */
 
 struct mobiveil_pcie {
 	struct platform_device *pdev;
-	struct list_head resources;
 	void __iomem *config_axi_slave_base;	/* endpoint config base */
 	void __iomem *csr_axi_slave_base;	/* root port config base */
 	void __iomem *apb_csr_base;	/* MSI register base */
@@ -575,6 +574,7 @@ static void mobiveil_pcie_enable_msi(struct mobiveil_pcie *pcie)
 
 static int mobiveil_host_init(struct mobiveil_pcie *pcie)
 {
+	struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie);
 	u32 value, pab_ctrl, type;
 	struct resource_entry *win;
 
@@ -631,7 +631,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie)
 	program_ib_windows(pcie, WIN_NUM_0, 0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE);
 
 	/* Get the I/O and memory ranges from DT */
-	resource_list_for_each_entry(win, &pcie->resources) {
+	resource_list_for_each_entry(win, &bridge->windows) {
 		if (resource_type(win->res) == IORESOURCE_MEM)
 			type = MEM_WINDOW_TYPE;
 		else if (resource_type(win->res) == IORESOURCE_IO)
@@ -857,7 +857,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
 	struct pci_bus *child;
 	struct pci_host_bridge *bridge;
 	struct device *dev = &pdev->dev;
-	resource_size_t iobase;
 	int ret;
 
 	/* allocate the PCIe port */
@@ -875,11 +874,8 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
 		return ret;
 	}
 
-	INIT_LIST_HEAD(&pcie->resources);
-
 	/* parse the host bridge base addresses from the device tree file */
-	ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff,
-						    &pcie->resources, &iobase);
+	ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, NULL);
 	if (ret) {
 		dev_err(dev, "Getting bridge resources failed\n");
 		return ret;
@@ -892,24 +888,19 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
 	ret = mobiveil_host_init(pcie);
 	if (ret) {
 		dev_err(dev, "Failed to initialize host\n");
-		goto error;
+		return ret;
 	}
 
 	/* initialize the IRQ domains */
 	ret = mobiveil_pcie_init_irq_domain(pcie);
 	if (ret) {
 		dev_err(dev, "Failed creating IRQ Domain\n");
-		goto error;
+		return ret;
 	}
 
 	irq_set_chained_handler_and_data(pcie->irq, mobiveil_pcie_isr, pcie);
 
-	ret = devm_request_pci_bus_resources(dev, &pcie->resources);
-	if (ret)
-		goto error;
-
 	/* Initialize bridge */
-	list_splice_init(&pcie->resources, &bridge->windows);
 	bridge->dev.parent = dev;
 	bridge->sysdata = pcie;
 	bridge->busnr = pcie->root_bus_nr;
@@ -920,13 +911,13 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
 	ret = mobiveil_bringup_link(pcie);
 	if (ret) {
 		dev_info(dev, "link bring-up failed\n");
-		goto error;
+		return ret;
 	}
 
 	/* setup the kernel resources for the newly added PCIe root bus */
 	ret = pci_scan_root_bus_bridge(bridge);
 	if (ret)
-		goto error;
+		return ret;
 
 	bus = bridge->bus;
 
@@ -936,9 +927,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
 	pci_bus_add_devices(bus);
 
 	return 0;
-error:
-	pci_free_resource_list(&pcie->resources);
-	return ret;
 }
 
 static const struct of_device_id mobiveil_pcie_of_match[] = {
-- 
2.20.1

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Andrew Murray <andrew.murray@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Heiko Stuebner <heiko@sntech.de>,
	Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>,
	linux-pci@vger.kernel.org, Shawn Lin <shawn.lin@rock-chips.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Toan Le <toan@os.amperecomputing.com>,
	Will Deacon <will@kernel.org>, Ryder Lee <ryder.lee@mediatek.com>,
	Michal Simek <michal.simek@xilinx.com>,
	Christoph Hellwig <hch@infradead.org>,
	linux-rockchip@lists.infradead.org,
	bcm-kernel-feedback-list@broadcom.com,
	Linus Walleij <linus.walleij@linaro.org>,
	Ray Jui <rjui@broadcom.com>, Hou Zhiqiang <Zhiqiang.Hou@nxp.com>,
	Simon Horman <horms@verge.net.au>,
	linux-mediatek@lists.infradead.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	linux-arm-kernel@lists.infradead.org,
	Scott Branden <sbranden@broadcom.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	rfi@lists.rocketboards.org, linux-renesas-soc@vger.kernel.org,
	Tom Joseph <tjoseph@cadence.com>,
	Srinath Mannam <srinath.mannam@broadcom.com>,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Ley Foon Tan <lftan@altera.com>
Subject: [PATCH v3 09/25] PCI: mobiveil: Use pci_parse_request_of_pci_ranges()
Date: Mon, 28 Oct 2019 11:32:40 -0500	[thread overview]
Message-ID: <20191028163256.8004-10-robh@kernel.org> (raw)
In-Reply-To: <20191028163256.8004-1-robh@kernel.org>

Convert the Mobiveil host bridge to use the common
pci_parse_request_of_pci_ranges().

There's no need to assign the resources to a temporary list first. Just
use bridge->windows directly and remove all the temporary list handling.

Cc: Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>
Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
---
 drivers/pci/controller/pcie-mobiveil.c | 26 +++++++-------------------
 1 file changed, 7 insertions(+), 19 deletions(-)

diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c
index a45a6447b01d..4eab8624ce4d 100644
--- a/drivers/pci/controller/pcie-mobiveil.c
+++ b/drivers/pci/controller/pcie-mobiveil.c
@@ -140,7 +140,6 @@ struct mobiveil_msi {			/* MSI information */
 
 struct mobiveil_pcie {
 	struct platform_device *pdev;
-	struct list_head resources;
 	void __iomem *config_axi_slave_base;	/* endpoint config base */
 	void __iomem *csr_axi_slave_base;	/* root port config base */
 	void __iomem *apb_csr_base;	/* MSI register base */
@@ -575,6 +574,7 @@ static void mobiveil_pcie_enable_msi(struct mobiveil_pcie *pcie)
 
 static int mobiveil_host_init(struct mobiveil_pcie *pcie)
 {
+	struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie);
 	u32 value, pab_ctrl, type;
 	struct resource_entry *win;
 
@@ -631,7 +631,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie)
 	program_ib_windows(pcie, WIN_NUM_0, 0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE);
 
 	/* Get the I/O and memory ranges from DT */
-	resource_list_for_each_entry(win, &pcie->resources) {
+	resource_list_for_each_entry(win, &bridge->windows) {
 		if (resource_type(win->res) == IORESOURCE_MEM)
 			type = MEM_WINDOW_TYPE;
 		else if (resource_type(win->res) == IORESOURCE_IO)
@@ -857,7 +857,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
 	struct pci_bus *child;
 	struct pci_host_bridge *bridge;
 	struct device *dev = &pdev->dev;
-	resource_size_t iobase;
 	int ret;
 
 	/* allocate the PCIe port */
@@ -875,11 +874,8 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
 		return ret;
 	}
 
-	INIT_LIST_HEAD(&pcie->resources);
-
 	/* parse the host bridge base addresses from the device tree file */
-	ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff,
-						    &pcie->resources, &iobase);
+	ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, NULL);
 	if (ret) {
 		dev_err(dev, "Getting bridge resources failed\n");
 		return ret;
@@ -892,24 +888,19 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
 	ret = mobiveil_host_init(pcie);
 	if (ret) {
 		dev_err(dev, "Failed to initialize host\n");
-		goto error;
+		return ret;
 	}
 
 	/* initialize the IRQ domains */
 	ret = mobiveil_pcie_init_irq_domain(pcie);
 	if (ret) {
 		dev_err(dev, "Failed creating IRQ Domain\n");
-		goto error;
+		return ret;
 	}
 
 	irq_set_chained_handler_and_data(pcie->irq, mobiveil_pcie_isr, pcie);
 
-	ret = devm_request_pci_bus_resources(dev, &pcie->resources);
-	if (ret)
-		goto error;
-
 	/* Initialize bridge */
-	list_splice_init(&pcie->resources, &bridge->windows);
 	bridge->dev.parent = dev;
 	bridge->sysdata = pcie;
 	bridge->busnr = pcie->root_bus_nr;
@@ -920,13 +911,13 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
 	ret = mobiveil_bringup_link(pcie);
 	if (ret) {
 		dev_info(dev, "link bring-up failed\n");
-		goto error;
+		return ret;
 	}
 
 	/* setup the kernel resources for the newly added PCIe root bus */
 	ret = pci_scan_root_bus_bridge(bridge);
 	if (ret)
-		goto error;
+		return ret;
 
 	bus = bridge->bus;
 
@@ -936,9 +927,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
 	pci_bus_add_devices(bus);
 
 	return 0;
-error:
-	pci_free_resource_list(&pcie->resources);
-	return ret;
 }
 
 static const struct of_device_id mobiveil_pcie_of_match[] = {
-- 
2.20.1


_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Andrew Murray <andrew.murray@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Heiko Stuebner <heiko@sntech.de>,
	Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>,
	linux-pci@vger.kernel.org, Shawn Lin <shawn.lin@rock-chips.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Toan Le <toan@os.amperecomputing.com>,
	Will Deacon <will@kernel.org>, Ryder Lee <ryder.lee@mediatek.com>,
	Michal Simek <michal.simek@xilinx.com>,
	Christoph Hellwig <hch@infradead.org>,
	linux-rockchip@lists.infradead.org,
	bcm-kernel-feedback-list@broadcom.com,
	Linus Walleij <linus.walleij@linaro.org>,
	Ray Jui <rjui@broadcom.com>, Hou Zhiqiang <Zhiqiang.Hou@nxp.com>,
	Simon Horman <horms@verge.net.au>,
	linux-mediatek@lists.infradead.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	linux-arm-kernel@lists.infradead.org,
	Scott Branden <sbranden@broadcom.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	rfi@lists.rocketboards.org, linux-renesas-soc@vger.kernel.org,
	Tom Joseph <tjoseph@cadence.com>,
	Srinath Mannam <srinath.mannam@broadcom.com>,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Ley Foon Tan <lftan@altera.com>
Subject: [PATCH v3 09/25] PCI: mobiveil: Use pci_parse_request_of_pci_ranges()
Date: Mon, 28 Oct 2019 11:32:40 -0500	[thread overview]
Message-ID: <20191028163256.8004-10-robh@kernel.org> (raw)
In-Reply-To: <20191028163256.8004-1-robh@kernel.org>

Convert the Mobiveil host bridge to use the common
pci_parse_request_of_pci_ranges().

There's no need to assign the resources to a temporary list first. Just
use bridge->windows directly and remove all the temporary list handling.

Cc: Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>
Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
---
 drivers/pci/controller/pcie-mobiveil.c | 26 +++++++-------------------
 1 file changed, 7 insertions(+), 19 deletions(-)

diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c
index a45a6447b01d..4eab8624ce4d 100644
--- a/drivers/pci/controller/pcie-mobiveil.c
+++ b/drivers/pci/controller/pcie-mobiveil.c
@@ -140,7 +140,6 @@ struct mobiveil_msi {			/* MSI information */
 
 struct mobiveil_pcie {
 	struct platform_device *pdev;
-	struct list_head resources;
 	void __iomem *config_axi_slave_base;	/* endpoint config base */
 	void __iomem *csr_axi_slave_base;	/* root port config base */
 	void __iomem *apb_csr_base;	/* MSI register base */
@@ -575,6 +574,7 @@ static void mobiveil_pcie_enable_msi(struct mobiveil_pcie *pcie)
 
 static int mobiveil_host_init(struct mobiveil_pcie *pcie)
 {
+	struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie);
 	u32 value, pab_ctrl, type;
 	struct resource_entry *win;
 
@@ -631,7 +631,7 @@ static int mobiveil_host_init(struct mobiveil_pcie *pcie)
 	program_ib_windows(pcie, WIN_NUM_0, 0, 0, MEM_WINDOW_TYPE, IB_WIN_SIZE);
 
 	/* Get the I/O and memory ranges from DT */
-	resource_list_for_each_entry(win, &pcie->resources) {
+	resource_list_for_each_entry(win, &bridge->windows) {
 		if (resource_type(win->res) == IORESOURCE_MEM)
 			type = MEM_WINDOW_TYPE;
 		else if (resource_type(win->res) == IORESOURCE_IO)
@@ -857,7 +857,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
 	struct pci_bus *child;
 	struct pci_host_bridge *bridge;
 	struct device *dev = &pdev->dev;
-	resource_size_t iobase;
 	int ret;
 
 	/* allocate the PCIe port */
@@ -875,11 +874,8 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
 		return ret;
 	}
 
-	INIT_LIST_HEAD(&pcie->resources);
-
 	/* parse the host bridge base addresses from the device tree file */
-	ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff,
-						    &pcie->resources, &iobase);
+	ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, NULL);
 	if (ret) {
 		dev_err(dev, "Getting bridge resources failed\n");
 		return ret;
@@ -892,24 +888,19 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
 	ret = mobiveil_host_init(pcie);
 	if (ret) {
 		dev_err(dev, "Failed to initialize host\n");
-		goto error;
+		return ret;
 	}
 
 	/* initialize the IRQ domains */
 	ret = mobiveil_pcie_init_irq_domain(pcie);
 	if (ret) {
 		dev_err(dev, "Failed creating IRQ Domain\n");
-		goto error;
+		return ret;
 	}
 
 	irq_set_chained_handler_and_data(pcie->irq, mobiveil_pcie_isr, pcie);
 
-	ret = devm_request_pci_bus_resources(dev, &pcie->resources);
-	if (ret)
-		goto error;
-
 	/* Initialize bridge */
-	list_splice_init(&pcie->resources, &bridge->windows);
 	bridge->dev.parent = dev;
 	bridge->sysdata = pcie;
 	bridge->busnr = pcie->root_bus_nr;
@@ -920,13 +911,13 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
 	ret = mobiveil_bringup_link(pcie);
 	if (ret) {
 		dev_info(dev, "link bring-up failed\n");
-		goto error;
+		return ret;
 	}
 
 	/* setup the kernel resources for the newly added PCIe root bus */
 	ret = pci_scan_root_bus_bridge(bridge);
 	if (ret)
-		goto error;
+		return ret;
 
 	bus = bridge->bus;
 
@@ -936,9 +927,6 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
 	pci_bus_add_devices(bus);
 
 	return 0;
-error:
-	pci_free_resource_list(&pcie->resources);
-	return ret;
 }
 
 static const struct of_device_id mobiveil_pcie_of_match[] = {
-- 
2.20.1


_______________________________________________
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  parent reply	other threads:[~2019-10-28 16:33 UTC|newest]

Thread overview: 196+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-28 16:32 [PATCH v3 00/25] PCI host resource consolidation Rob Herring
2019-10-28 16:32 ` Rob Herring
2019-10-28 16:32 ` Rob Herring
2019-10-28 16:32 ` Rob Herring
2019-10-28 16:32 ` [PATCH v3 01/25] resource: Add a resource_list_first_type helper Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32 ` [PATCH v3 02/25] PCI: Export pci_parse_request_of_pci_ranges() Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32 ` [PATCH v3 03/25] PCI: aardvark: Use pci_parse_request_of_pci_ranges() Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32 ` [PATCH v3 04/25] PCI: altera: " Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32 ` [PATCH v3 05/25] PCI: dwc: " Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32 ` [PATCH v3 06/25] PCI: faraday: " Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-11-03 19:12   ` Linus Walleij
2019-11-03 19:12     ` Linus Walleij
2019-11-03 19:12     ` Linus Walleij
2019-11-03 19:12     ` Linus Walleij
2019-10-28 16:32 ` [PATCH v3 07/25] PCI: iproc: " Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-29 15:58   ` Srinath Mannam
2019-10-29 15:58     ` Srinath Mannam
2019-10-29 15:58     ` Srinath Mannam
2019-10-29 15:58     ` Srinath Mannam
2019-10-29 17:09     ` Florian Fainelli
2019-10-29 17:09       ` Florian Fainelli
2019-10-29 17:09       ` Florian Fainelli
2019-10-29 17:09       ` Florian Fainelli
2019-10-28 16:32 ` [PATCH v3 08/25] PCI: mediatek: " Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32 ` Rob Herring [this message]
2019-10-28 16:32   ` [PATCH v3 09/25] PCI: mobiveil: " Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-29  9:00   ` Z.q. Hou
2019-10-29  9:00     ` Z.q. Hou
2019-10-29  9:00     ` Z.q. Hou
2019-10-29  9:00     ` Z.q. Hou
2019-10-28 16:32 ` [PATCH v3 10/25] PCI: rockchip: " Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-12-05 17:56   ` Enric Balletbo Serra
2019-12-05 17:56     ` Enric Balletbo Serra
2019-12-05 17:56     ` Enric Balletbo Serra
2019-12-05 17:56     ` Enric Balletbo Serra
2019-12-06 13:52     ` Lorenzo Pieralisi
2019-12-06 13:52       ` Lorenzo Pieralisi
2019-12-06 13:52       ` Lorenzo Pieralisi
2019-12-06 13:52       ` Lorenzo Pieralisi
2019-12-06 14:09     ` Lorenzo Pieralisi
2019-12-06 14:09       ` Lorenzo Pieralisi
2019-12-06 14:09       ` Lorenzo Pieralisi
2019-12-06 14:09       ` Lorenzo Pieralisi
2019-12-06 14:59       ` Enric Balletbo Serra
2019-12-06 14:59         ` Enric Balletbo Serra
2019-12-06 14:59         ` Enric Balletbo Serra
2019-12-06 14:59         ` Enric Balletbo Serra
2019-10-28 16:32 ` [PATCH v3 11/25] PCI: rockchip: Drop storing driver private outbound resource data Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-12-06 15:36   ` Lorenzo Pieralisi
2019-12-06 15:36     ` Lorenzo Pieralisi
2019-12-06 15:36     ` Lorenzo Pieralisi
2019-12-06 15:36     ` Lorenzo Pieralisi
2019-12-10 17:33     ` Enric Balletbo Serra
2019-12-10 17:33       ` Enric Balletbo Serra
2019-12-10 17:33       ` Enric Balletbo Serra
2019-12-10 17:33       ` Enric Balletbo Serra
2019-12-11  9:39       ` Enric Balletbo Serra
2019-12-11  9:39         ` Enric Balletbo Serra
2019-12-11  9:39         ` Enric Balletbo Serra
2019-12-11  9:39         ` Enric Balletbo Serra
2019-10-28 16:32 ` [PATCH v3 12/25] PCI: v3-semi: Use pci_parse_request_of_pci_ranges() Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32 ` [PATCH v3 13/25] PCI: xgene: " Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32 ` [PATCH v3 14/25] PCI: xilinx: " Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32 ` [PATCH v3 15/25] PCI: xilinx-nwl: " Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32 ` [PATCH v3 16/25] PCI: versatile: " Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32 ` [PATCH v3 17/25] PCI: versatile: Remove usage of PHYS_OFFSET Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32 ` [PATCH v3 18/25] PCI: versatile: Enable COMPILE_TEST Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32 ` [PATCH v3 19/25] PCI: of: Add inbound resource parsing to helpers Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-29 11:07   ` Lorenzo Pieralisi
2019-10-29 11:07     ` Lorenzo Pieralisi
2019-10-29 11:07     ` Lorenzo Pieralisi
2019-10-29 11:07     ` Lorenzo Pieralisi
2019-10-29 15:56     ` Srinath Mannam
2019-10-29 15:56       ` Srinath Mannam
2019-10-29 15:56       ` Srinath Mannam
2019-10-29 15:56       ` Srinath Mannam
2019-10-29 17:34       ` Lorenzo Pieralisi
2019-10-29 17:34         ` Lorenzo Pieralisi
2019-10-29 17:34         ` Lorenzo Pieralisi
2019-10-29 17:34         ` Lorenzo Pieralisi
2019-10-30  6:44         ` Srinath Mannam
2019-10-30  6:44           ` Srinath Mannam
2019-10-30  6:44           ` Srinath Mannam
2019-10-30  6:44           ` Srinath Mannam
2019-10-30 11:48           ` Lorenzo Pieralisi
2019-10-30 11:48             ` Lorenzo Pieralisi
2019-10-30 11:48             ` Lorenzo Pieralisi
2019-10-30 11:48             ` Lorenzo Pieralisi
2019-10-30 12:49             ` Robin Murphy
2019-10-30 12:49               ` Robin Murphy
2019-10-30 12:49               ` Robin Murphy
2019-10-30 12:49               ` Robin Murphy
2019-10-30 14:56               ` Lorenzo Pieralisi
2019-10-30 14:56                 ` Lorenzo Pieralisi
2019-10-30 14:56                 ` Lorenzo Pieralisi
2019-10-30 14:56                 ` Lorenzo Pieralisi
2019-10-30 22:18                 ` Rob Herring
2019-10-30 22:18                   ` Rob Herring
2019-10-30 22:18                   ` Rob Herring
2019-10-30 22:18                   ` Rob Herring
2019-10-31 10:09                   ` Lorenzo Pieralisi
2019-10-31 10:09                     ` Lorenzo Pieralisi
2019-10-31 10:09                     ` Lorenzo Pieralisi
2019-10-31 10:09                     ` Lorenzo Pieralisi
2019-10-29 22:12     ` Bjorn Helgaas
2019-10-29 22:12       ` Bjorn Helgaas
2019-10-29 22:12       ` Bjorn Helgaas
2019-10-29 22:12       ` Bjorn Helgaas
2019-10-28 16:32 ` [PATCH v3 20/25] PCI: ftpci100: Use inbound resources for setup Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32 ` [PATCH v3 21/25] PCI: v3-semi: " Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32 ` [PATCH v3 22/25] PCI: xgene: " Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32 ` [PATCH v3 23/25] PCI: iproc: " Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-29 15:59   ` Srinath Mannam
2019-10-29 15:59     ` Srinath Mannam
2019-10-29 15:59     ` Srinath Mannam
2019-10-29 15:59     ` Srinath Mannam
2019-10-28 16:32 ` [PATCH v3 24/25] PCI: rcar: " Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32 ` [PATCH v3 25/25] PCI: Make devm_of_pci_get_host_bridge_resources() static Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-28 16:32   ` Rob Herring
2019-10-31 10:57 ` [PATCH v3 00/25] PCI host resource consolidation Lorenzo Pieralisi
2019-10-31 10:57   ` Lorenzo Pieralisi
2019-10-31 10:57   ` Lorenzo Pieralisi
2019-10-31 10:57   ` Lorenzo Pieralisi

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