From: Dmitry Osipenko <digetx@gmail.com> To: Thierry Reding <thierry.reding@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com>, Peter De Schrijver <pdeschrijver@nvidia.com>, Mikko Perttunen <mperttunen@nvidia.com>, Georgi Djakov <georgi.djakov@linaro.org>, Rob Herring <robh+dt@kernel.org> Cc: linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org Subject: [PATCH v1 23/29] memory: tegra124-emc: Register as interconnect provider Date: Mon, 18 Nov 2019 23:02:41 +0300 [thread overview] Message-ID: <20191118200247.3567-24-digetx@gmail.com> (raw) In-Reply-To: <20191118200247.3567-1-digetx@gmail.com> EMC now provides MC with memory bandwidth using interconnect API. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- drivers/memory/tegra/tegra124-emc.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/memory/tegra/tegra124-emc.c b/drivers/memory/tegra/tegra124-emc.c index 2c73260654ba..c9478dcbeece 100644 --- a/drivers/memory/tegra/tegra124-emc.c +++ b/drivers/memory/tegra/tegra124-emc.c @@ -25,6 +25,7 @@ #define EMC_FBIO_CFG5 0x104 #define EMC_FBIO_CFG5_DRAM_TYPE_MASK 0x3 #define EMC_FBIO_CFG5_DRAM_TYPE_SHIFT 0 +#define EMC_FBIO_CFG5_DRAM_WIDTH_X64 BIT(4) #define EMC_INTSTATUS 0x0 #define EMC_INTSTATUS_CLKCHANGE_COMPLETE BIT(4) @@ -1080,11 +1081,28 @@ static void emc_debugfs_init(struct device *dev, struct tegra_emc *emc) dev_err(dev, "failed to create debugfs entry\n"); } +static unsigned int emc_dram_data_bus_width_bytes(struct tegra_emc *emc) +{ + unsigned int bus_width; + u32 emc_cfg; + + emc_cfg = readl_relaxed(emc->regs + EMC_FBIO_CFG5); + if (emc_cfg & EMC_FBIO_CFG5_DRAM_WIDTH_X64) + bus_width = 64; + else + bus_width = 32; + + dev_info(emc->dev, "DRAM data-bus width: %ubit\n", bus_width); + + return bus_width / 8; +} + static int tegra_emc_probe(struct platform_device *pdev) { struct platform_device *mc; struct device_node *np; struct tegra_emc *emc; + unsigned int bus_width; u32 ram_code; int err; @@ -1146,6 +1164,12 @@ static int tegra_emc_probe(struct platform_device *pdev) if (IS_ENABLED(CONFIG_DEBUG_FS)) emc_debugfs_init(&pdev->dev, emc); + bus_width = emc_dram_data_bus_width_bytes(emc); + + err = tegra_icc_emc_setup_interconnect(&pdev->dev, bus_width); + if (err) + dev_err(&pdev->dev, "failed to initialize ICC: %d\n", err); + return 0; }; -- 2.23.0
WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Osipenko <digetx@gmail.com> To: Thierry Reding <thierry.reding@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com>, Peter De Schrijver <pdeschrijver@nvidia.com>, Mikko Perttunen <mperttunen@nvidia.com>, Georgi Djakov <georgi.djakov@linaro.org>, Rob Herring <robh+dt@kernel.org> Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Subject: [PATCH v1 23/29] memory: tegra124-emc: Register as interconnect provider Date: Mon, 18 Nov 2019 23:02:41 +0300 [thread overview] Message-ID: <20191118200247.3567-24-digetx@gmail.com> (raw) Message-ID: <20191118200241.cdB3KhFC0a6Zg-kKvcEbBOTbf0i-kNpfuh5Rt0QeB9A@z> (raw) In-Reply-To: <20191118200247.3567-1-digetx@gmail.com> EMC now provides MC with memory bandwidth using interconnect API. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- drivers/memory/tegra/tegra124-emc.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/memory/tegra/tegra124-emc.c b/drivers/memory/tegra/tegra124-emc.c index 2c73260654ba..c9478dcbeece 100644 --- a/drivers/memory/tegra/tegra124-emc.c +++ b/drivers/memory/tegra/tegra124-emc.c @@ -25,6 +25,7 @@ #define EMC_FBIO_CFG5 0x104 #define EMC_FBIO_CFG5_DRAM_TYPE_MASK 0x3 #define EMC_FBIO_CFG5_DRAM_TYPE_SHIFT 0 +#define EMC_FBIO_CFG5_DRAM_WIDTH_X64 BIT(4) #define EMC_INTSTATUS 0x0 #define EMC_INTSTATUS_CLKCHANGE_COMPLETE BIT(4) @@ -1080,11 +1081,28 @@ static void emc_debugfs_init(struct device *dev, struct tegra_emc *emc) dev_err(dev, "failed to create debugfs entry\n"); } +static unsigned int emc_dram_data_bus_width_bytes(struct tegra_emc *emc) +{ + unsigned int bus_width; + u32 emc_cfg; + + emc_cfg = readl_relaxed(emc->regs + EMC_FBIO_CFG5); + if (emc_cfg & EMC_FBIO_CFG5_DRAM_WIDTH_X64) + bus_width = 64; + else + bus_width = 32; + + dev_info(emc->dev, "DRAM data-bus width: %ubit\n", bus_width); + + return bus_width / 8; +} + static int tegra_emc_probe(struct platform_device *pdev) { struct platform_device *mc; struct device_node *np; struct tegra_emc *emc; + unsigned int bus_width; u32 ram_code; int err; @@ -1146,6 +1164,12 @@ static int tegra_emc_probe(struct platform_device *pdev) if (IS_ENABLED(CONFIG_DEBUG_FS)) emc_debugfs_init(&pdev->dev, emc); + bus_width = emc_dram_data_bus_width_bytes(emc); + + err = tegra_icc_emc_setup_interconnect(&pdev->dev, bus_width); + if (err) + dev_err(&pdev->dev, "failed to initialize ICC: %d\n", err); + return 0; }; -- 2.23.0 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2019-11-18 20:02 UTC|newest] Thread overview: 92+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-11-18 20:02 [PATCH v1 00/29] Introduce memory interconnect for NVIDIA Tegra SoCs Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 01/29] dt-bindings: memory: tegra20: mc: Document new interconnect property Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 02/29] dt-bindings: memory: tegra20: emc: " Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-19 6:21 ` Thierry Reding 2019-11-19 6:21 ` Thierry Reding 2019-11-19 16:57 ` Dmitry Osipenko 2019-11-19 16:57 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 03/29] dt-bindings: memory: tegra30: mc: " Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 04/29] dt-bindings: memory: tegra30: emc: " Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 05/29] dt-bindings: memory: tegra124: mc: " Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 06/29] dt-bindings: memory: tegra124: emc: " Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 07/29] dt-bindings: host1x: Document new interconnect properties Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 08/29] dt-bindings: interconnect: tegra: Add initial IDs Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-19 6:25 ` Thierry Reding 2019-11-19 6:25 ` Thierry Reding 2019-11-19 16:56 ` Dmitry Osipenko 2019-11-19 16:56 ` Dmitry Osipenko 2019-11-21 17:14 ` Dmitry Osipenko 2019-11-21 17:14 ` Dmitry Osipenko 2019-11-25 11:32 ` Thierry Reding 2019-11-25 11:32 ` Thierry Reding 2019-11-28 20:06 ` Dmitry Osipenko 2019-11-28 20:06 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 09/29] ARM: tegra: Add interconnect properties to Tegra20 device-tree Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 10/29] ARM: tegra: Add interconnect properties to Tegra30 device-tree Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 11/29] ARM: tegra: Add interconnect properties to Tegra124 device-tree Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-19 6:27 ` Thierry Reding 2019-11-19 6:27 ` Thierry Reding 2019-11-18 20:02 ` [PATCH v1 12/29] interconnect: Add memory interconnection providers for NVIDIA Tegra SoCs Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-19 6:30 ` Thierry Reding 2019-11-19 6:30 ` Thierry Reding 2019-11-19 16:58 ` Dmitry Osipenko 2019-11-19 16:58 ` Dmitry Osipenko 2019-11-21 17:33 ` Dmitry Osipenko 2019-11-21 17:33 ` Dmitry Osipenko 2019-11-19 6:31 ` Thierry Reding 2019-11-19 6:31 ` Thierry Reding 2019-11-19 16:59 ` Dmitry Osipenko 2019-11-19 16:59 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 13/29] memory: tegra: Register as interconnect provider Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 14/29] memory: tegra: Add interconnect nodes for Terga20 display controllers Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-19 6:34 ` Thierry Reding 2019-11-19 6:34 ` Thierry Reding 2019-11-18 20:02 ` [PATCH v1 15/29] memory: tegra: Add interconnect nodes for Terga30 " Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 16/29] memory: tegra: Add interconnect nodes for Terga124 " Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 17/29] memory: tegra20-emc: Use devm_platform_ioremap_resource Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 18/29] memory: tegra20-emc: Continue probing if timings/IRQ are missing in device-tree Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 19/29] memory: tegra20-emc: Register as interconnect provider Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 20/29] memory: tegra30-emc: Continue probing if timings are missing in device-tree Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 21/29] memory: tegra30-emc: Register as interconnect provider Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 22/29] memory: tegra124-emc: Use devm_platform_ioremap_resource Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko [this message] 2019-11-18 20:02 ` [PATCH v1 23/29] memory: tegra124-emc: Register as interconnect provider Dmitry Osipenko 2019-11-19 16:57 ` Dmitry Osipenko 2019-11-19 16:57 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 24/29] drm/tegra: dc: Use devm_platform_ioremap_resource Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 25/29] drm/tegra: dc: Release PM and RGB output when client's registration fails Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 26/29] drm/tegra: dc: Support memory bandwidth management Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 27/29] ARM: tegra: Enable interconnect API in tegra_defconfig Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 28/29] ARM: multi_v7_defconfig: Enable NVIDIA Tegra interconnect providers Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 29/29] MAINTAINERS: Add maintainers for NVIDIA Tegra interconnect drivers Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-19 6:19 ` [PATCH v1 00/29] Introduce memory interconnect for NVIDIA Tegra SoCs Thierry Reding 2019-11-19 6:19 ` Thierry Reding
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