From: Mark Brown <broonie@kernel.org> To: John Garry <john.garry@huawei.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>, tudor.ambarus@microchip.com, linux-kernel@vger.kernel.org, chenxiang66@hisilicon.com, linuxarm@huawei.com, linux-spi@vger.kernel.org, marek.vasut@gmail.com, linux-mtd@lists.infradead.org, xuejiancheng@hisilicon.com, fengsheng5@huawei.com, Mika Westerberg <mika.westerberg@linux.intel.com>, wanghuiqiang <wanghuiqiang@huawei.com>, liusimin4@huawei.com Subject: Re: [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller driver Date: Mon, 13 Jan 2020 11:42:56 +0000 [thread overview] Message-ID: <20200113114256.GH3897@sirena.org.uk> (raw) In-Reply-To: <612a3c5d-69a4-af6b-5c79-c3fb853193ab@huawei.com> [-- Attachment #1: Type: text/plain, Size: 953 bytes --] On Mon, Jan 13, 2020 at 10:09:27AM +0000, John Garry wrote: > On 10/01/2020 19:31, Andy Shevchenko wrote: > > PRP method is only for vendors to *test* the hardware in ACPI environment. > > The proper method is to allocate correct ACPI ID. > Yes, that would seem the proper thing to do. So the SPI NOR driver is based > on micron m25p80 and compatible string is "jedec,spi-nor", so I don't know > who should or would do this registration. The idiomatic approach appears to be for individual board vendors to allocate IDs, you do end up with multiple IDs from multiple vendors for the same thing. > BTW, Do any of these sensors you mention have any ACPI standardization? In general there's not really much standardizaiton for devices, the bindings that do exist aren't really centrally documented and the Windows standard is just to have the basic device registration in the firmware and do all properties based on quirking based on DMI information. [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 488 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie@kernel.org> To: John Garry <john.garry@huawei.com> Cc: chenxiang66@hisilicon.com, linux-kernel@vger.kernel.org, tudor.ambarus@microchip.com, liusimin4@huawei.com, linuxarm@huawei.com, linux-spi@vger.kernel.org, marek.vasut@gmail.com, linux-mtd@lists.infradead.org, xuejiancheng@hisilicon.com, Andy Shevchenko <andriy.shevchenko@linux.intel.com>, Mika Westerberg <mika.westerberg@linux.intel.com>, wanghuiqiang <wanghuiqiang@huawei.com>, fengsheng5@huawei.com Subject: Re: [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller driver Date: Mon, 13 Jan 2020 11:42:56 +0000 [thread overview] Message-ID: <20200113114256.GH3897@sirena.org.uk> (raw) In-Reply-To: <612a3c5d-69a4-af6b-5c79-c3fb853193ab@huawei.com> [-- Attachment #1.1: Type: text/plain, Size: 953 bytes --] On Mon, Jan 13, 2020 at 10:09:27AM +0000, John Garry wrote: > On 10/01/2020 19:31, Andy Shevchenko wrote: > > PRP method is only for vendors to *test* the hardware in ACPI environment. > > The proper method is to allocate correct ACPI ID. > Yes, that would seem the proper thing to do. So the SPI NOR driver is based > on micron m25p80 and compatible string is "jedec,spi-nor", so I don't know > who should or would do this registration. The idiomatic approach appears to be for individual board vendors to allocate IDs, you do end up with multiple IDs from multiple vendors for the same thing. > BTW, Do any of these sensors you mention have any ACPI standardization? In general there's not really much standardizaiton for devices, the bindings that do exist aren't really centrally documented and the Windows standard is just to have the basic device registration in the firmware and do all properties based on quirking based on DMI information. [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 488 bytes --] [-- Attachment #2: Type: text/plain, Size: 144 bytes --] ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2020-01-13 11:43 UTC|newest] Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-12-09 14:08 [PATCH v2 0/3] HiSilicon v3xx SFC driver John Garry 2019-12-09 14:08 ` John Garry 2019-12-09 14:08 ` [PATCH v2 1/3] mtd: spi-nor: hisi-sfc: Try to provide some clarity on which SFC we are John Garry 2019-12-09 14:08 ` John Garry 2020-01-16 11:03 ` Tudor.Ambarus 2020-01-16 11:03 ` Tudor.Ambarus 2019-12-09 14:08 ` [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller driver John Garry 2019-12-09 14:08 ` John Garry 2020-01-09 15:54 ` John Garry 2020-01-09 15:54 ` John Garry 2020-01-09 21:28 ` Mark Brown 2020-01-09 21:28 ` Mark Brown 2020-01-10 11:55 ` John Garry 2020-01-10 11:55 ` John Garry 2020-01-10 11:55 ` John Garry 2020-01-10 14:07 ` Mark Brown 2020-01-10 14:07 ` Mark Brown 2020-01-10 14:07 ` Mark Brown 2020-01-10 14:58 ` John Garry 2020-01-10 14:58 ` John Garry 2020-01-10 15:12 ` Mark Brown 2020-01-10 15:12 ` Mark Brown 2020-01-10 16:09 ` John Garry 2020-01-10 16:09 ` John Garry 2020-01-10 19:31 ` Andy Shevchenko 2020-01-10 19:31 ` Andy Shevchenko 2020-01-10 19:31 ` Andy Shevchenko 2020-01-13 10:09 ` John Garry 2020-01-13 10:09 ` John Garry 2020-01-13 11:42 ` Mark Brown [this message] 2020-01-13 11:42 ` Mark Brown 2020-01-13 13:01 ` John Garry 2020-01-13 13:01 ` John Garry 2020-01-13 14:06 ` Mark Brown 2020-01-13 14:06 ` Mark Brown 2020-01-13 14:17 ` Andy Shevchenko 2020-01-13 14:17 ` Andy Shevchenko 2020-01-13 14:17 ` Andy Shevchenko 2020-01-13 14:27 ` Mark Brown 2020-01-13 14:27 ` Mark Brown 2020-01-13 14:27 ` Mark Brown 2020-01-13 14:34 ` Andy Shevchenko 2020-01-13 14:34 ` Andy Shevchenko 2020-01-13 14:34 ` Andy Shevchenko 2020-01-31 10:08 ` John Garry 2020-01-31 10:08 ` John Garry 2020-01-31 11:39 ` Andy Shevchenko 2020-01-31 11:39 ` Andy Shevchenko 2020-01-31 11:39 ` Andy Shevchenko 2020-01-31 12:03 ` John Garry 2020-01-31 12:03 ` John Garry 2020-01-31 12:03 ` John Garry 2020-01-31 15:46 ` Andy Shevchenko 2020-01-31 15:46 ` Andy Shevchenko 2020-01-31 15:46 ` Andy Shevchenko 2020-01-31 16:26 ` John Garry 2020-01-31 16:26 ` John Garry 2020-01-31 16:26 ` John Garry 2020-02-01 11:34 ` Mark Brown 2020-02-01 11:34 ` Mark Brown 2020-02-01 11:32 ` Mark Brown 2020-02-01 11:32 ` Mark Brown 2020-01-10 19:59 ` Applied "spi: Add HiSilicon v3xx SPI NOR flash controller driver" to the spi tree Mark Brown 2020-01-10 19:59 ` Mark Brown 2020-01-10 19:59 ` Mark Brown 2019-12-09 14:08 ` [PATCH v2 3/3] MAINTAINERS: Add a maintainer for the HiSilicon v3xx SFC driver John Garry 2019-12-09 14:08 ` John Garry 2020-01-10 19:59 ` Applied "MAINTAINERS: Add a maintainer for the HiSilicon v3xx SFC driver" to the spi tree Mark Brown 2020-01-10 19:59 ` Mark Brown 2020-01-10 19:59 ` Mark Brown 2019-12-16 14:52 ` [PATCH v2 0/3] HiSilicon v3xx SFC driver John Garry 2019-12-16 14:52 ` John Garry 2019-12-16 14:56 ` Mark Brown 2019-12-16 14:56 ` Mark Brown
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