From: "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com> To: akpm@linux-foundation.org, peterz@infradead.org, will@kernel.org Cc: linux-mm@kvack.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com> Subject: [PATCH v3 3/9] asm-generic/tlb: Avoid potential double flush Date: Tue, 14 Jan 2020 15:31:39 +0530 [thread overview] Message-ID: <20200114100145.365527-4-aneesh.kumar@linux.ibm.com> (raw) In-Reply-To: <20200114100145.365527-1-aneesh.kumar@linux.ibm.com> From: Peter Zijlstra <peterz@infradead.org> Aneesh reported that: tlb_flush_mmu() tlb_flush_mmu_tlbonly() tlb_flush() <-- #1 tlb_flush_mmu_free() tlb_table_flush() tlb_table_invalidate() tlb_flush_mmu_tlbonly() tlb_flush() <-- #2 does two TLBIs when tlb->fullmm, because __tlb_reset_range() will not clear tlb->end in that case. Observe that any caller to __tlb_adjust_range() also sets at least one of the tlb->freed_tables || tlb->cleared_p* bits, and those are unconditionally cleared by __tlb_reset_range(). Change the condition for actually issuing TLBI to having one of those bits set, as opposed to having tlb->end != 0. Reported-by: "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> --- include/asm-generic/tlb.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/include/asm-generic/tlb.h b/include/asm-generic/tlb.h index 9e22ac369d1d..b36b3bef5661 100644 --- a/include/asm-generic/tlb.h +++ b/include/asm-generic/tlb.h @@ -402,7 +402,12 @@ tlb_update_vma_flags(struct mmu_gather *tlb, struct vm_area_struct *vma) { } static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb) { - if (!tlb->end) + /* + * Anything calling __tlb_adjust_range() also sets at least one of + * these bits. + */ + if (!(tlb->freed_tables || tlb->cleared_ptes || tlb->cleared_pmds || + tlb->cleared_puds || tlb->cleared_p4ds)) return; tlb_flush(tlb); -- 2.24.1
WARNING: multiple messages have this Message-ID (diff)
From: "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com> To: akpm@linux-foundation.org, peterz@infradead.org, will@kernel.org Cc: linux-mm@kvack.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com> Subject: [PATCH v3 3/9] asm-generic/tlb: Avoid potential double flush Date: Tue, 14 Jan 2020 15:31:39 +0530 [thread overview] Message-ID: <20200114100145.365527-4-aneesh.kumar@linux.ibm.com> (raw) Message-ID: <20200114100139.24vZ7JGTpQiHnu1IesNcX85215jdCLqfBQBzclXScxw@z> (raw) In-Reply-To: <20200114100145.365527-1-aneesh.kumar@linux.ibm.com> From: Peter Zijlstra <peterz@infradead.org> Aneesh reported that: tlb_flush_mmu() tlb_flush_mmu_tlbonly() tlb_flush() <-- #1 tlb_flush_mmu_free() tlb_table_flush() tlb_table_invalidate() tlb_flush_mmu_tlbonly() tlb_flush() <-- #2 does two TLBIs when tlb->fullmm, because __tlb_reset_range() will not clear tlb->end in that case. Observe that any caller to __tlb_adjust_range() also sets at least one of the tlb->freed_tables || tlb->cleared_p* bits, and those are unconditionally cleared by __tlb_reset_range(). Change the condition for actually issuing TLBI to having one of those bits set, as opposed to having tlb->end != 0. Reported-by: "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com> --- include/asm-generic/tlb.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/include/asm-generic/tlb.h b/include/asm-generic/tlb.h index 9e22ac369d1d..b36b3bef5661 100644 --- a/include/asm-generic/tlb.h +++ b/include/asm-generic/tlb.h @@ -402,7 +402,12 @@ tlb_update_vma_flags(struct mmu_gather *tlb, struct vm_area_struct *vma) { } static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb) { - if (!tlb->end) + /* + * Anything calling __tlb_adjust_range() also sets at least one of + * these bits. + */ + if (!(tlb->freed_tables || tlb->cleared_ptes || tlb->cleared_pmds || + tlb->cleared_puds || tlb->cleared_p4ds)) return; tlb_flush(tlb); -- 2.24.1
next prev parent reply other threads:[~2020-01-14 10:07 UTC|newest] Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-01-14 10:01 [PATCH v3 0/9] Fixup page directory freeing Aneesh Kumar K.V 2020-01-14 10:01 ` [PATCH v3 1/9] powerpc/mmu_gather: Enable RCU_TABLE_FREE even for !SMP case Aneesh Kumar K.V 2020-01-14 10:01 ` Aneesh Kumar K.V 2020-01-14 10:01 ` [PATCH v3 2/9] mm/mmu_gather: Invalidate TLB correctly on batch allocation failure and flush Aneesh Kumar K.V 2020-01-14 10:01 ` Aneesh Kumar K.V [this message] 2020-01-14 10:01 ` [PATCH v3 3/9] asm-generic/tlb: Avoid potential double flush Aneesh Kumar K.V 2020-01-14 10:01 ` [PATCH v3 4/9] asm-gemeric/tlb: Remove stray function declarations Aneesh Kumar K.V 2020-01-14 10:01 ` [PATCH v3 5/9] asm-generic/tlb: Add missing CONFIG symbol Aneesh Kumar K.V 2020-01-14 10:01 ` Aneesh Kumar K.V 2020-01-14 10:01 ` [PATCH v3 6/9] asm-generic/tlb: Rename HAVE_RCU_TABLE_FREE Aneesh Kumar K.V 2020-01-14 10:01 ` [PATCH v3 7/9] asm-generic/tlb: Rename HAVE_MMU_GATHER_PAGE_SIZE Aneesh Kumar K.V 2020-01-14 10:01 ` [PATCH v3 8/9] asm-generic/tlb: Rename HAVE_MMU_GATHER_NO_GATHER Aneesh Kumar K.V 2020-01-14 10:01 ` [PATCH v3 9/9] asm-generic/tlb: Provide MMU_GATHER_TABLE_FREE Aneesh Kumar K.V 2020-01-14 10:50 ` [PATCH v3 0/9] Fixup page directory freeing Peter Zijlstra 2020-01-14 12:28 ` Aneesh Kumar K.V 2020-01-15 0:25 ` Andrew Morton 2020-01-15 14:47 ` Aneesh Kumar K.V
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