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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 12/15] target/arm: adjust program counter for wfi exception in AArch32
Date: Fri, 17 Jan 2020 14:28:13 +0000	[thread overview]
Message-ID: <20200117142816.15110-13-peter.maydell@linaro.org> (raw)
In-Reply-To: <20200117142816.15110-1-peter.maydell@linaro.org>

From: Jeff Kubascik <jeff.kubascik@dornerworks.com>

The wfi instruction can be configured to be trapped by a higher exception
level, such as the EL2 hypervisor. When the instruction is trapped, the
program counter should contain the address of the wfi instruction that
caused the exception. The program counter is adjusted for this in the wfi op
helper function.

However, this correction is done to env->pc, which only applies to AArch64
mode. For AArch32, the program counter is stored in env->regs[15]. This
adds an if-else statement to modify the correct program counter location
based on the the current CPU mode.

Signed-off-by: Jeff Kubascik <jeff.kubascik@dornerworks.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/op_helper.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c
index e5a346cb87a..27d16ad9ad9 100644
--- a/target/arm/op_helper.c
+++ b/target/arm/op_helper.c
@@ -295,7 +295,12 @@ void HELPER(wfi)(CPUARMState *env, uint32_t insn_len)
     }
 
     if (target_el) {
-        env->pc -= insn_len;
+        if (env->aarch64) {
+            env->pc -= insn_len;
+        } else {
+            env->regs[15] -= insn_len;
+        }
+
         raise_exception(env, EXCP_UDEF, syn_wfx(1, 0xe, 0, insn_len == 2),
                         target_el);
     }
-- 
2.20.1



  parent reply	other threads:[~2020-01-17 14:33 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-17 14:28 [PULL 00/15] target-arm queue Peter Maydell
2020-01-17 14:28 ` [PULL 01/15] hw/misc: Add the STM32F4xx Sysconfig device Peter Maydell
2020-01-17 14:28 ` [PULL 02/15] hw/misc: Add the STM32F4xx EXTI device Peter Maydell
2020-01-17 14:28 ` [PULL 03/15] hw/arm: Add the STM32F4xx SoC Peter Maydell
2020-01-17 14:28 ` [PULL 04/15] hw/arm: Add the Netduino Plus 2 Peter Maydell
2020-01-17 14:28 ` [PULL 05/15] tests/boot_linux_console: Add initrd test for the CubieBoard Peter Maydell
2020-01-17 14:28 ` [PULL 06/15] tests/boot_linux_console: Add a SD card " Peter Maydell
2020-01-17 14:28 ` [PULL 07/15] hw/arm/allwinner-a10: Move SoC definitions out of header Peter Maydell
2020-01-17 14:28 ` [PULL 08/15] hw/arm/allwinner-a10: Simplify by passing IRQs with qdev_pass_gpios() Peter Maydell
2020-01-17 14:28 ` [PULL 09/15] hw/arm/allwinner-a10: Remove local qemu_irq variables Peter Maydell
2020-01-17 14:28 ` [PULL 10/15] target/arm/arm-semi: fix SYS_OPEN to return nonzero filehandle Peter Maydell
2020-01-17 14:28 ` [PULL 11/15] i.MX: add an emulation for RNGC Peter Maydell
2020-01-17 14:28 ` Peter Maydell [this message]
2020-01-17 14:28 ` [PULL 13/15] arm/gicv3: update virtual irq state after IAR register read Peter Maydell
2020-01-17 14:28 ` [PULL 14/15] target/arm: Return correct IL bit in merge_syn_data_abort Peter Maydell
2020-01-17 14:28 ` [PULL 15/15] target/arm: Set ISSIs16Bit in make_issinfo Peter Maydell
2020-01-17 18:03 ` [PULL 00/15] target-arm queue Peter Maydell

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