From: Vladimir Oltean <olteanv@gmail.com>
To: broonie@kernel.org
Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
shawnguo@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com,
devicetree@vger.kernel.org, eha@deif.com, angelo@sysam.it,
andrew.smirnov@gmail.com, gustavo@embeddedor.com,
weic@nvidia.com, mhosny@nvidia.com, michael@walle.cc,
peng.ma@nxp.com
Subject: [PATCH v5 01/12] spi: spi-fsl-dspi: Don't access reserved fields in SPI_MCR
Date: Wed, 18 Mar 2020 02:15:52 +0200 [thread overview]
Message-ID: <20200318001603.9650-2-olteanv@gmail.com> (raw)
In-Reply-To: <20200318001603.9650-1-olteanv@gmail.com>
From: Vladimir Oltean <vladimir.oltean@nxp.com>
The SPI_MCR_PCSIS macro assumes that the controller has a number of chip
select signals equal to 6. That is not always the case, but actually is
described through the driver-specific "spi-num-chipselects" device tree
binding. LS1028A for example only has 4 chip selects.
Don't write to the upper bits of the PCSIS field, which are reserved in
the reference manual.
Fixes: 349ad66c0ab0 ("spi:Add Freescale DSPI driver for Vybrid VF610 platform")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
---
Changes in v5:
None.
Changes in v4:
None.
Changes in v3:
None.
Changes in v2:
Remove duplicate phrase in commit message.
drivers/spi/spi-fsl-dspi.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c
index 50e3382f0c50..6ca35881881b 100644
--- a/drivers/spi/spi-fsl-dspi.c
+++ b/drivers/spi/spi-fsl-dspi.c
@@ -22,7 +22,7 @@
#define SPI_MCR 0x00
#define SPI_MCR_MASTER BIT(31)
-#define SPI_MCR_PCSIS (0x3F << 16)
+#define SPI_MCR_PCSIS(x) ((x) << 16)
#define SPI_MCR_CLR_TXF BIT(11)
#define SPI_MCR_CLR_RXF BIT(10)
#define SPI_MCR_XSPI BIT(3)
@@ -1200,7 +1200,10 @@ static const struct regmap_config dspi_xspi_regmap_config[] = {
static void dspi_init(struct fsl_dspi *dspi)
{
- unsigned int mcr = SPI_MCR_PCSIS;
+ unsigned int mcr;
+
+ /* Set idle states for all chip select signals to high */
+ mcr = SPI_MCR_PCSIS(GENMASK(dspi->ctlr->num_chipselect - 1, 0));
if (dspi->devtype_data->trans_mode == DSPI_XSPI_MODE)
mcr |= SPI_MCR_XSPI;
--
2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Vladimir Oltean <olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
Cc: linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
eha-/iRVSOupHO4@public.gmane.org,
angelo-BIYBQhTR83Y@public.gmane.org,
andrew.smirnov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
gustavo-L1vi/lXTdts+Va1GwOuvDg@public.gmane.org,
weic-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
mhosny-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
michael-QKn5cuLxLXY@public.gmane.org,
peng.ma-3arQi8VN3Tc@public.gmane.org
Subject: [PATCH v5 01/12] spi: spi-fsl-dspi: Don't access reserved fields in SPI_MCR
Date: Wed, 18 Mar 2020 02:15:52 +0200 [thread overview]
Message-ID: <20200318001603.9650-2-olteanv@gmail.com> (raw)
In-Reply-To: <20200318001603.9650-1-olteanv-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Vladimir Oltean <vladimir.oltean-3arQi8VN3Tc@public.gmane.org>
The SPI_MCR_PCSIS macro assumes that the controller has a number of chip
select signals equal to 6. That is not always the case, but actually is
described through the driver-specific "spi-num-chipselects" device tree
binding. LS1028A for example only has 4 chip selects.
Don't write to the upper bits of the PCSIS field, which are reserved in
the reference manual.
Fixes: 349ad66c0ab0 ("spi:Add Freescale DSPI driver for Vybrid VF610 platform")
Signed-off-by: Vladimir Oltean <vladimir.oltean-3arQi8VN3Tc@public.gmane.org>
---
Changes in v5:
None.
Changes in v4:
None.
Changes in v3:
None.
Changes in v2:
Remove duplicate phrase in commit message.
drivers/spi/spi-fsl-dspi.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c
index 50e3382f0c50..6ca35881881b 100644
--- a/drivers/spi/spi-fsl-dspi.c
+++ b/drivers/spi/spi-fsl-dspi.c
@@ -22,7 +22,7 @@
#define SPI_MCR 0x00
#define SPI_MCR_MASTER BIT(31)
-#define SPI_MCR_PCSIS (0x3F << 16)
+#define SPI_MCR_PCSIS(x) ((x) << 16)
#define SPI_MCR_CLR_TXF BIT(11)
#define SPI_MCR_CLR_RXF BIT(10)
#define SPI_MCR_XSPI BIT(3)
@@ -1200,7 +1200,10 @@ static const struct regmap_config dspi_xspi_regmap_config[] = {
static void dspi_init(struct fsl_dspi *dspi)
{
- unsigned int mcr = SPI_MCR_PCSIS;
+ unsigned int mcr;
+
+ /* Set idle states for all chip select signals to high */
+ mcr = SPI_MCR_PCSIS(GENMASK(dspi->ctlr->num_chipselect - 1, 0));
if (dspi->devtype_data->trans_mode == DSPI_XSPI_MODE)
mcr |= SPI_MCR_XSPI;
--
2.17.1
next prev parent reply other threads:[~2020-03-18 0:17 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-18 0:15 [PATCH v5 00/12] NXP DSPI bugfixes and support for LS1028A Vladimir Oltean
2020-03-18 0:15 ` Vladimir Oltean
2020-03-18 0:15 ` Vladimir Oltean [this message]
2020-03-18 0:15 ` [PATCH v5 01/12] spi: spi-fsl-dspi: Don't access reserved fields in SPI_MCR Vladimir Oltean
2020-03-18 0:15 ` [PATCH v5 02/12] spi: spi-fsl-dspi: Fix little endian access to PUSHR CMD and TXDATA Vladimir Oltean
2020-03-18 0:15 ` Vladimir Oltean
2020-03-18 0:15 ` [PATCH v5 03/12] spi: spi-fsl-dspi: Fix bits-per-word acceleration in DMA mode Vladimir Oltean
2020-03-18 0:15 ` Vladimir Oltean
2020-03-18 0:15 ` [PATCH v5 04/12] spi: spi-fsl-dspi: Avoid reading more data than written in EOQ mode Vladimir Oltean
2020-03-18 0:15 ` Vladimir Oltean
2020-03-18 0:15 ` [PATCH v5 05/12] spi: spi-fsl-dspi: Protect against races on dspi->words_in_flight Vladimir Oltean
2020-03-18 0:15 ` Vladimir Oltean
2020-03-18 22:45 ` Applied "spi: spi-fsl-dspi: Protect against races on dspi->words_in_flight" to the spi tree Mark Brown
2020-03-18 22:45 ` Mark Brown
2020-03-18 0:15 ` [PATCH v5 06/12] spi: spi-fsl-dspi: Replace interruptible wait queue with a simple completion Vladimir Oltean
2020-03-18 0:15 ` [PATCH v5 07/12] spi: spi-fsl-dspi: Avoid NULL pointer in dspi_slave_abort for non-DMA mode Vladimir Oltean
2020-03-18 0:15 ` Vladimir Oltean
2020-03-18 0:15 ` [PATCH v5 08/12] spi: spi-fsl-dspi: Fix interrupt-less DMA mode taking an XSPI code path Vladimir Oltean
2020-03-18 0:16 ` [PATCH v5 09/12] spi: spi-fsl-dspi: Move invariant configs out of dspi_transfer_one_message Vladimir Oltean
2020-03-18 0:16 ` Vladimir Oltean
2020-03-18 0:16 ` [PATCH v5 10/12] spi: spi-fsl-dspi: Add support for LS1028A Vladimir Oltean
2020-03-18 0:16 ` [PATCH v5 11/12] arm64: dts: ls1028a: Specify the DMA channels for the DSPI controllers Vladimir Oltean
2020-04-20 14:36 ` Shawn Guo
2020-03-18 0:16 ` [PATCH v5 12/12] arm64: dts: ls1028a-rdb: Add a spidev node for the mikroBUS Vladimir Oltean
2020-03-18 0:16 ` Vladimir Oltean
2020-04-20 14:38 ` Shawn Guo
2020-04-20 15:10 ` Vladimir Oltean
2020-04-21 3:00 ` Shawn Guo
2020-04-20 18:06 ` Geert Uytterhoeven
2020-04-20 18:10 ` Vladimir Oltean
2020-03-18 19:03 ` [PATCH v5 00/12] NXP DSPI bugfixes and support for LS1028A Michael Walle
2020-03-18 19:03 ` Michael Walle
2020-03-18 19:05 ` Vladimir Oltean
2020-03-18 19:05 ` Vladimir Oltean
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