From: Dmitry Osipenko <digetx@gmail.com> To: "Thierry Reding" <thierry.reding@gmail.com>, "Jonathan Hunter" <jonathanh@nvidia.com>, "Artur Świgoń" <a.swigon@samsung.com>, "Georgi Djakov" <georgi.djakov@linaro.org>, "Rob Herring" <robh+dt@kernel.org> Cc: linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org Subject: [PATCH v2 03/22] dt-bindings: memory: tegra30: mc: Document new interconnect property Date: Mon, 30 Mar 2020 04:08:45 +0300 [thread overview] Message-ID: <20200330010904.27643-4-digetx@gmail.com> (raw) In-Reply-To: <20200330010904.27643-1-digetx@gmail.com> Memory controller is interconnected with memory clients and with the external memory controller. Document new interconnect property which turns memory controller into interconnect provider. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- .../bindings/memory-controllers/nvidia,tegra30-mc.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-mc.yaml index 4b9196c83291..083676676d0d 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-mc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-mc.yaml @@ -57,6 +57,9 @@ properties: "#iommu-cells": const: 1 + "#interconnect-cells": + const: 1 + patternProperties: "^emc-timings-[0-9]+$": type: object @@ -121,6 +124,7 @@ required: - clock-names - "#reset-cells" - "#iommu-cells" + - "#interconnect-cells" additionalProperties: false @@ -136,6 +140,7 @@ examples: #iommu-cells = <1>; #reset-cells = <1>; + #interconnect-cells = <1>; emc-timings-1 { nvidia,ram-code = <1>; -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Osipenko <digetx@gmail.com> To: "Thierry Reding" <thierry.reding@gmail.com>, "Jonathan Hunter" <jonathanh@nvidia.com>, "Artur Świgoń" <a.swigon@samsung.com>, "Georgi Djakov" <georgi.djakov@linaro.org>, "Rob Herring" <robh+dt@kernel.org> Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Subject: [PATCH v2 03/22] dt-bindings: memory: tegra30: mc: Document new interconnect property Date: Mon, 30 Mar 2020 04:08:45 +0300 [thread overview] Message-ID: <20200330010904.27643-4-digetx@gmail.com> (raw) In-Reply-To: <20200330010904.27643-1-digetx@gmail.com> Memory controller is interconnected with memory clients and with the external memory controller. Document new interconnect property which turns memory controller into interconnect provider. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- .../bindings/memory-controllers/nvidia,tegra30-mc.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-mc.yaml index 4b9196c83291..083676676d0d 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-mc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-mc.yaml @@ -57,6 +57,9 @@ properties: "#iommu-cells": const: 1 + "#interconnect-cells": + const: 1 + patternProperties: "^emc-timings-[0-9]+$": type: object @@ -121,6 +124,7 @@ required: - clock-names - "#reset-cells" - "#iommu-cells" + - "#interconnect-cells" additionalProperties: false @@ -136,6 +140,7 @@ examples: #iommu-cells = <1>; #reset-cells = <1>; + #interconnect-cells = <1>; emc-timings-1 { nvidia,ram-code = <1>; -- 2.25.1 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2020-03-30 1:08 UTC|newest] Thread overview: 94+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-03-30 1:08 [PATCH v2 00/22] Introduce memory interconnect for NVIDIA Tegra SoCs Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko 2020-03-30 1:08 ` [PATCH v2 01/22] dt-bindings: memory: tegra20: mc: Document new interconnect property Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko 2020-04-10 17:05 ` Rob Herring 2020-04-10 17:05 ` Rob Herring 2020-03-30 1:08 ` [PATCH v2 02/22] dt-bindings: memory: tegra20: emc: " Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko [not found] ` <20200330010904.27643-3-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-04-10 17:06 ` Rob Herring 2020-04-10 17:06 ` Rob Herring 2020-04-10 17:06 ` Rob Herring 2020-03-30 1:08 ` Dmitry Osipenko [this message] 2020-03-30 1:08 ` [PATCH v2 03/22] dt-bindings: memory: tegra30: mc: " Dmitry Osipenko [not found] ` <20200330010904.27643-4-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-04-10 17:06 ` Rob Herring 2020-04-10 17:06 ` Rob Herring 2020-04-10 17:06 ` Rob Herring 2020-03-30 1:08 ` [PATCH v2 06/22] dt-bindings: memory: tegra20: Add memory client IDs Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko [not found] ` <20200330010904.27643-7-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-04-10 17:10 ` Rob Herring 2020-04-10 17:10 ` Rob Herring 2020-04-10 17:10 ` Rob Herring [not found] ` <20200330010904.27643-1-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-03-30 1:08 ` [PATCH v2 04/22] dt-bindings: memory: tegra30: emc: Document new interconnect property Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko [not found] ` <20200330010904.27643-5-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-04-10 17:07 ` Rob Herring 2020-04-10 17:07 ` Rob Herring 2020-04-10 17:07 ` Rob Herring 2020-03-30 1:08 ` [PATCH v2 05/22] dt-bindings: host1x: Document new interconnect properties Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko [not found] ` <20200330010904.27643-6-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-04-10 17:09 ` Rob Herring 2020-04-10 17:09 ` Rob Herring 2020-04-10 17:09 ` Rob Herring 2020-04-10 18:28 ` Dmitry Osipenko 2020-04-10 18:28 ` Dmitry Osipenko 2020-04-10 18:28 ` Dmitry Osipenko 2020-03-30 1:08 ` [PATCH v2 07/22] dt-bindings: memory: tegra30: Add memory client IDs Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko [not found] ` <20200330010904.27643-8-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-04-10 17:10 ` Rob Herring 2020-04-10 17:10 ` Rob Herring 2020-04-10 17:10 ` Rob Herring 2020-03-30 1:08 ` [PATCH v2 08/22] ARM: tegra: Add interconnect properties to Tegra20 device-tree Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko 2020-03-30 1:08 ` [PATCH v2 09/22] ARM: tegra: Add interconnect properties to Tegra30 device-tree Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko 2020-03-30 1:08 ` [PATCH v2 13/22] memory: tegra20-emc: Continue probing if timings are missing in device-tree Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko 2020-03-30 1:08 ` [PATCH v2 16/22] memory: tegra30-emc: " Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko 2020-03-30 1:08 ` [PATCH v2 17/22] memory: tegra30-emc: Register as interconnect provider Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko [not found] ` <20200330010904.27643-18-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-04-13 12:44 ` Georgi Djakov 2020-04-13 12:44 ` Georgi Djakov 2020-04-13 12:44 ` Georgi Djakov [not found] ` <d8e39d8b-b3f3-4a30-cb5a-67fcbe18a957-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> 2020-04-13 15:18 ` Dmitry Osipenko 2020-04-13 15:18 ` Dmitry Osipenko 2020-04-13 15:18 ` Dmitry Osipenko 2020-03-30 1:09 ` [PATCH v2 19/22] drm/tegra: dc: Tune up high priority request controls for Tegra20 Dmitry Osipenko 2020-03-30 1:09 ` Dmitry Osipenko 2020-03-30 1:09 ` Dmitry Osipenko 2020-03-30 1:09 ` [PATCH v2 20/22] drm/tegra: dc: Extend debug stats with total number of events Dmitry Osipenko 2020-03-30 1:09 ` Dmitry Osipenko 2020-03-30 1:09 ` Dmitry Osipenko 2020-03-30 1:09 ` [PATCH v2 21/22] ARM: tegra: Enable interconnect API in tegra_defconfig Dmitry Osipenko 2020-03-30 1:09 ` Dmitry Osipenko 2020-03-30 1:09 ` Dmitry Osipenko 2020-03-30 1:09 ` [PATCH v2 22/22] ARM: multi_v7_defconfig: Enable interconnect API Dmitry Osipenko 2020-03-30 1:09 ` Dmitry Osipenko 2020-03-30 1:09 ` Dmitry Osipenko 2020-03-30 1:08 ` [PATCH v2 10/22] interconnect: Relax requirement in of_icc_get_from_provider() Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko 2020-03-30 1:08 ` [PATCH v2 11/22] memory: tegra: Register as interconnect provider Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko [not found] ` <20200330010904.27643-12-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2020-04-13 12:43 ` Georgi Djakov 2020-04-13 12:43 ` Georgi Djakov 2020-04-13 12:43 ` Georgi Djakov [not found] ` <70f724d6-5cb2-0ebe-ffc1-5dbb77d9dc74-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> 2020-04-13 15:01 ` Dmitry Osipenko 2020-04-13 15:01 ` Dmitry Osipenko 2020-04-13 15:01 ` Dmitry Osipenko 2020-03-30 1:08 ` [PATCH v2 12/22] memory: tegra20-emc: Use devm_platform_ioremap_resource Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko 2020-03-30 1:08 ` [PATCH v2 14/22] memory: tegra20-emc: Register as interconnect provider Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko 2020-03-30 1:08 ` [PATCH v2 15/22] memory: tegra20-emc: Create tegra20-devfreq device Dmitry Osipenko 2020-03-30 1:08 ` Dmitry Osipenko 2020-03-30 1:09 ` [PATCH v2 18/22] drm/tegra: dc: Support memory bandwidth management Dmitry Osipenko 2020-03-30 1:09 ` Dmitry Osipenko
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20200330010904.27643-4-digetx@gmail.com \ --to=digetx@gmail.com \ --cc=a.swigon@samsung.com \ --cc=devicetree@vger.kernel.org \ --cc=dri-devel@lists.freedesktop.org \ --cc=georgi.djakov@linaro.org \ --cc=jonathanh@nvidia.com \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-pm@vger.kernel.org \ --cc=linux-tegra@vger.kernel.org \ --cc=robh+dt@kernel.org \ --cc=thierry.reding@gmail.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.