From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v3 3/5] drm/i915: Introduce for_each_dbuf_slice_in_mask macro
Date: Mon, 30 Mar 2020 19:07:06 +0300 [thread overview]
Message-ID: <20200330160705.GM13686@intel.com> (raw)
In-Reply-To: <20200330122354.24752-4-stanislav.lisovskiy@intel.com>
On Mon, Mar 30, 2020 at 03:23:52PM +0300, Stanislav Lisovskiy wrote:
> We quite often need now to iterate only particular dbuf slices
> in mask, whether they are active or related to particular crtc.
>
> Let's make our life a bit easier and use a macro for that.
>
> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.h | 7 +++++++
> drivers/gpu/drm/i915/display/intel_display_power.h | 3 +++
> 2 files changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index adb1225a3480..c898285f0dc3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -187,6 +187,13 @@ enum plane_id {
> for ((__p) = PLANE_PRIMARY; (__p) < I915_MAX_PLANES; (__p)++) \
> for_each_if((__crtc)->plane_ids_mask & BIT(__p))
>
> +#define for_each_dbuf_slice_in_mask(__slice, __mask) \
Please stick to established conventions.
> + for ((__slice) = 0; (__slice) < I915_MAX_DBUF_SLICES; (__slice)++) \
> + for_each_if((1 << (__slice)) & (__mask))
> +
> +#define for_each_dbuf_slice(__slice) \
> + for_each_dbuf_slice_in_mask(__slice, (1 << I915_MAX_DBUF_SLICES) - 1)
> +
> enum port {
> PORT_NONE = -1,
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
> index da64a5edae7a..468e8fb0203a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.h
> @@ -311,8 +311,11 @@ intel_display_power_put_async(struct drm_i915_private *i915,
> enum dbuf_slice {
> DBUF_S1,
> DBUF_S2,
> + DBUF_SLICE_MAX
> };
>
> +#define I915_DBUF_MAX_SLICES DBUF_SLICE_MAX
> +
Huh?
> #define with_intel_display_power(i915, domain, wf) \
> for ((wf) = intel_display_power_get((i915), (domain)); (wf); \
> intel_display_power_put_async((i915), (domain), (wf)), (wf) = 0)
> --
> 2.24.1.485.gad05a3d8e5
--
Ville Syrjälä
Intel
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next prev parent reply other threads:[~2020-03-30 16:07 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-30 12:23 [Intel-gfx] [PATCH v3 0/5] Consider DBuf bandwidth when calculating CDCLK Stanislav Lisovskiy
2020-03-30 12:23 ` [Intel-gfx] [PATCH v3 1/5] drm/i915: Decouple cdclk calculation from modeset checks Stanislav Lisovskiy
2020-03-30 15:44 ` Ville Syrjälä
2020-04-07 7:33 ` [Intel-gfx] [PATCH v4 " Stanislav Lisovskiy
2020-04-07 16:15 ` Ville Syrjälä
2020-03-30 12:23 ` [Intel-gfx] [PATCH v3 2/5] drm/i915: Force recalculate min_cdclk if planes config changed Stanislav Lisovskiy
2020-03-30 16:18 ` Ville Syrjälä
2020-03-30 17:56 ` Lisovskiy, Stanislav
2020-04-07 7:36 ` [Intel-gfx] [PATCH v4 " Stanislav Lisovskiy
2020-03-30 12:23 ` [Intel-gfx] [PATCH v3 3/5] drm/i915: Introduce for_each_dbuf_slice_in_mask macro Stanislav Lisovskiy
2020-03-30 16:07 ` Ville Syrjälä [this message]
2020-04-07 7:38 ` [Intel-gfx] [PATCH v4 " Stanislav Lisovskiy
2020-03-30 12:23 ` [Intel-gfx] [PATCH v3 4/5] drm/i915: Adjust CDCLK accordingly to our DBuf bw needs Stanislav Lisovskiy
2020-03-30 17:07 ` Ville Syrjälä
2020-03-30 18:16 ` Lisovskiy, Stanislav
2020-04-07 16:26 ` Ville Syrjälä
2020-04-07 7:39 ` [Intel-gfx] [PATCH v4 " Stanislav Lisovskiy
2020-03-30 12:23 ` [Intel-gfx] [PATCH v3 5/5] drm/i915: Remove unneeded hack now for CDCLK Stanislav Lisovskiy
2020-03-30 18:07 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Consider DBuf bandwidth when calculating CDCLK (rev3) Patchwork
2020-04-07 8:03 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Consider DBuf bandwidth when calculating CDCLK (rev7) Patchwork
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