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From: Klaus Jensen <its@irrelevant.dk>
To: qemu-block@nongnu.org
Cc: Kevin Wolf <kwolf@redhat.com>,
	Beata Michalska <beata.michalska@linaro.org>,
	Klaus Jensen <k.jensen@samsung.com>,
	qemu-devel@nongnu.org, Max Reitz <mreitz@redhat.com>,
	Klaus Jensen <its@irrelevant.dk>, Keith Busch <kbusch@kernel.org>,
	Javier Gonzalez <javier.gonz@samsung.com>,
	Maxim Levitsky <mlevitsk@redhat.com>
Subject: [PATCH v7 09/48] nvme: add max_ioqpairs device parameter
Date: Wed, 15 Apr 2020 07:51:01 +0200	[thread overview]
Message-ID: <20200415055140.466900-10-its@irrelevant.dk> (raw)
In-Reply-To: <20200415055140.466900-1-its@irrelevant.dk>

From: Klaus Jensen <k.jensen@samsung.com>

The num_queues device paramater has a slightly confusing meaning because
it accounts for the admin queue pair which is not really optional.
Secondly, it is really a maximum value of queues allowed.

Add a new max_ioqpairs parameter that only accounts for I/O queue pairs,
but keep num_queues for compatibility.

Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
---
 hw/block/nvme.c | 45 ++++++++++++++++++++++++++-------------------
 hw/block/nvme.h |  4 +++-
 2 files changed, 29 insertions(+), 20 deletions(-)

diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index 03278726422d..f45909dad480 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -19,7 +19,7 @@
  *      -drive file=<file>,if=none,id=<drive_id>
  *      -device nvme,drive=<drive_id>,serial=<serial>,id=<id[optional]>, \
  *              cmb_size_mb=<cmb_size_mb[optional]>, \
- *              num_queues=<N[optional]>
+ *              max_ioqpairs=<N[optional]>
  *
  * Note cmb_size_mb denotes size of CMB in MB. CMB is assumed to be at
  * offset 0 in BAR2 and supports only WDS, RDS and SQS for now.
@@ -27,6 +27,7 @@
 
 #include "qemu/osdep.h"
 #include "qemu/units.h"
+#include "qemu/error-report.h"
 #include "hw/block/block.h"
 #include "hw/pci/msix.h"
 #include "hw/pci/pci.h"
@@ -72,12 +73,12 @@ static void nvme_addr_read(NvmeCtrl *n, hwaddr addr, void *buf, int size)
 
 static int nvme_check_sqid(NvmeCtrl *n, uint16_t sqid)
 {
-    return sqid < n->params.num_queues && n->sq[sqid] != NULL ? 0 : -1;
+    return sqid < n->params.max_ioqpairs + 1 && n->sq[sqid] != NULL ? 0 : -1;
 }
 
 static int nvme_check_cqid(NvmeCtrl *n, uint16_t cqid)
 {
-    return cqid < n->params.num_queues && n->cq[cqid] != NULL ? 0 : -1;
+    return cqid < n->params.max_ioqpairs + 1 && n->cq[cqid] != NULL ? 0 : -1;
 }
 
 static void nvme_inc_cq_tail(NvmeCQueue *cq)
@@ -639,7 +640,7 @@ static uint16_t nvme_create_cq(NvmeCtrl *n, NvmeCmd *cmd)
         trace_nvme_dev_err_invalid_create_cq_addr(prp1);
         return NVME_INVALID_FIELD | NVME_DNR;
     }
-    if (unlikely(vector > n->params.num_queues)) {
+    if (unlikely(vector > n->params.max_ioqpairs + 1)) {
         trace_nvme_dev_err_invalid_create_cq_vector(vector);
         return NVME_INVALID_IRQ_VECTOR | NVME_DNR;
     }
@@ -803,8 +804,8 @@ static uint16_t nvme_get_feature(NvmeCtrl *n, NvmeCmd *cmd, NvmeRequest *req)
         trace_nvme_dev_getfeat_vwcache(result ? "enabled" : "disabled");
         break;
     case NVME_NUMBER_OF_QUEUES:
-        result = cpu_to_le32((n->params.num_queues - 2) |
-                             ((n->params.num_queues - 2) << 16));
+        result = cpu_to_le32((n->params.max_ioqpairs - 1) |
+                             ((n->params.max_ioqpairs - 1) << 16));
         trace_nvme_dev_getfeat_numq(result);
         break;
     case NVME_TIMESTAMP:
@@ -848,10 +849,10 @@ static uint16_t nvme_set_feature(NvmeCtrl *n, NvmeCmd *cmd, NvmeRequest *req)
     case NVME_NUMBER_OF_QUEUES:
         trace_nvme_dev_setfeat_numq((dw11 & 0xFFFF) + 1,
                                     ((dw11 >> 16) & 0xFFFF) + 1,
-                                    n->params.num_queues - 1,
-                                    n->params.num_queues - 1);
-        req->cqe.result = cpu_to_le32((n->params.num_queues - 2) |
-                                      ((n->params.num_queues - 2) << 16));
+                                    n->params.max_ioqpairs,
+                                    n->params.max_ioqpairs);
+        req->cqe.result = cpu_to_le32((n->params.max_ioqpairs - 1) |
+                                      ((n->params.max_ioqpairs - 1) << 16));
         break;
     case NVME_TIMESTAMP:
         return nvme_set_feature_timestamp(n, cmd);
@@ -924,12 +925,12 @@ static void nvme_clear_ctrl(NvmeCtrl *n)
 
     blk_drain(n->conf.blk);
 
-    for (i = 0; i < n->params.num_queues; i++) {
+    for (i = 0; i < n->params.max_ioqpairs + 1; i++) {
         if (n->sq[i] != NULL) {
             nvme_free_sq(n->sq[i], n);
         }
     }
-    for (i = 0; i < n->params.num_queues; i++) {
+    for (i = 0; i < n->params.max_ioqpairs + 1; i++) {
         if (n->cq[i] != NULL) {
             nvme_free_cq(n->cq[i], n);
         }
@@ -1330,9 +1331,15 @@ static void nvme_realize(PCIDevice *pci_dev, Error **errp)
     int64_t bs_size;
     uint8_t *pci_conf;
 
-    if (!n->params.num_queues) {
-        error_setg(errp, "num_queues can't be zero");
-        return;
+    if (n->params.num_queues) {
+        warn_report("nvme: num_queues is deprecated; please use max_ioqpairs "
+                    "instead");
+
+        n->params.max_ioqpairs = n->params.num_queues - 1;
+    }
+
+    if (!n->params.max_ioqpairs) {
+        error_setg(errp, "max_ioqpairs can't be less than 1");
     }
 
     if (!n->conf.blk) {
@@ -1363,19 +1370,19 @@ static void nvme_realize(PCIDevice *pci_dev, Error **errp)
     pcie_endpoint_cap_init(pci_dev, 0x80);
 
     n->num_namespaces = 1;
-    n->reg_size = pow2ceil(0x1000 + 2 * n->params.num_queues * 4);
+    n->reg_size = pow2ceil(0x1008 + 2 * (n->params.max_ioqpairs) * 4);
     n->ns_size = bs_size / (uint64_t)n->num_namespaces;
 
     n->namespaces = g_new0(NvmeNamespace, n->num_namespaces);
-    n->sq = g_new0(NvmeSQueue *, n->params.num_queues);
-    n->cq = g_new0(NvmeCQueue *, n->params.num_queues);
+    n->sq = g_new0(NvmeSQueue *, n->params.max_ioqpairs + 1);
+    n->cq = g_new0(NvmeCQueue *, n->params.max_ioqpairs + 1);
 
     memory_region_init_io(&n->iomem, OBJECT(n), &nvme_mmio_ops, n,
                           "nvme", n->reg_size);
     pci_register_bar(pci_dev, 0,
         PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_64,
         &n->iomem);
-    msix_init_exclusive_bar(pci_dev, n->params.num_queues, 4, NULL);
+    msix_init_exclusive_bar(pci_dev, n->params.max_ioqpairs + 1, 4, NULL);
 
     id->vid = cpu_to_le16(pci_get_word(pci_conf + PCI_VENDOR_ID));
     id->ssvid = cpu_to_le16(pci_get_word(pci_conf + PCI_SUBSYSTEM_VENDOR_ID));
diff --git a/hw/block/nvme.h b/hw/block/nvme.h
index 9957c4a200e2..98f5b9479244 100644
--- a/hw/block/nvme.h
+++ b/hw/block/nvme.h
@@ -6,11 +6,13 @@
 #define DEFINE_NVME_PROPERTIES(_state, _props) \
     DEFINE_PROP_STRING("serial", _state, _props.serial), \
     DEFINE_PROP_UINT32("cmb_size_mb", _state, _props.cmb_size_mb, 0), \
-    DEFINE_PROP_UINT32("num_queues", _state, _props.num_queues, 64)
+    DEFINE_PROP_UINT32("num_queues", _state, _props.num_queues, 0), \
+    DEFINE_PROP_UINT32("max_ioqpairs", _state, _props.max_ioqpairs, 64)
 
 typedef struct NvmeParams {
     char     *serial;
     uint32_t num_queues;
+    uint32_t max_ioqpairs;
     uint32_t cmb_size_mb;
 } NvmeParams;
 
-- 
2.26.0



  parent reply	other threads:[~2020-04-15  5:59 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-15  5:50 [PATCH v7 00/48] nvme: support NVMe v1.3d, SGLs and multiple namespaces Klaus Jensen
2020-04-15  5:50 ` [PATCH v7 01/48] nvme: rename trace events to nvme_dev Klaus Jensen
2020-04-15  5:50 ` [PATCH v7 02/48] nvme: remove superfluous breaks Klaus Jensen
2020-04-15  6:57   ` Philippe Mathieu-Daudé
2020-04-15  5:50 ` [PATCH v7 03/48] nvme: move device parameters to separate struct Klaus Jensen
2020-04-15  6:58   ` Philippe Mathieu-Daudé
2020-04-15  5:50 ` [PATCH v7 04/48] nvme: bump spec data structures to v1.3 Klaus Jensen
2020-04-15  5:50 ` [PATCH v7 05/48] nvme: use constants in identify Klaus Jensen
2020-04-15  7:01   ` Philippe Mathieu-Daudé
2020-04-15  5:50 ` [PATCH v7 06/48] nvme: refactor nvme_addr_read Klaus Jensen
2020-04-15  7:03   ` Philippe Mathieu-Daudé
2020-04-15  7:46     ` Klaus Birkelund Jensen
2020-04-15  5:50 ` [PATCH v7 07/48] nvme: add support for the abort command Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 08/48] nvme: fix pci doorbell size calculation Klaus Jensen
2020-04-15  5:51 ` Klaus Jensen [this message]
2020-04-15  5:51 ` [PATCH v7 10/48] nvme: remove redundant cmbloc/cmbsz members Klaus Jensen
2020-04-15  7:10   ` Philippe Mathieu-Daudé
2020-04-15  7:19     ` Klaus Birkelund Jensen
2020-04-15  7:48       ` Philippe Mathieu-Daudé
2020-04-15  5:51 ` [PATCH v7 11/48] nvme: refactor device realization Klaus Jensen
2020-04-15  7:14   ` Philippe Mathieu-Daudé
2020-04-15  7:25     ` Klaus Birkelund Jensen
2020-04-15  7:55       ` Philippe Mathieu-Daudé
2020-04-15  8:18         ` Klaus Birkelund Jensen
2020-04-15  5:51 ` [PATCH v7 12/48] nvme: add temperature threshold feature Klaus Jensen
2020-04-15  7:19   ` Philippe Mathieu-Daudé
2020-04-15  7:24     ` Klaus Birkelund Jensen
2020-04-15  7:28       ` Klaus Birkelund Jensen
2020-04-15  7:45         ` Philippe Mathieu-Daudé
2020-04-15  5:51 ` [PATCH v7 13/48] nvme: add support for the get log page command Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 14/48] nvme: add support for the asynchronous event request command Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 15/48] nvme: add missing mandatory features Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 16/48] nvme: additional tracing Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 17/48] nvme: make sure ncqr and nsqr is valid Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 18/48] nvme: add log specific field to trace events Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 19/48] nvme: support identify namespace descriptor list Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 20/48] nvme: enforce valid queue creation sequence Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 21/48] nvme: provide the mandatory subnqn field Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 22/48] nvme: bump supported version to v1.3 Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 23/48] nvme: memset preallocated requests structures Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 24/48] nvme: add mapping helpers Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 25/48] nvme: replace dma_acct with blk_acct equivalent Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 26/48] nvme: remove redundant has_sg member Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 27/48] nvme: refactor dma read/write Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 28/48] nvme: pass request along for tracing Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 29/48] nvme: add request mapping helper Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 30/48] nvme: verify validity of prp lists in the cmb Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 31/48] nvme: refactor request bounds checking Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 32/48] nvme: add check for mdts Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 33/48] nvme: be consistent about zeros vs zeroes Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 34/48] nvme: refactor NvmeRequest Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 35/48] nvme: remove NvmeCmd parameter Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 36/48] nvme: allow multiple aios per command Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 37/48] nvme: add nvme_check_rw helper Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 38/48] nvme: use preallocated qsg/iov in nvme_dma_prp Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 39/48] pci: pass along the return value of dma_memory_rw Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 40/48] nvme: handle dma errors Klaus Jensen
2020-04-15  7:26   ` Philippe Mathieu-Daudé
2020-04-15  5:51 ` [PATCH v7 41/48] nvme: harden cmb access Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 42/48] nvme: add support for scatter gather lists Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 43/48] nvme: add support for sgl bit bucket descriptor Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 44/48] nvme: refactor identify active namespace id list Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 45/48] nvme: support multiple namespaces Klaus Jensen
2020-04-15  7:38   ` Philippe Mathieu-Daudé
2020-04-15  8:02     ` Klaus Birkelund Jensen
2020-04-15  5:51 ` [PATCH v7 46/48] pci: allocate pci id for nvme Klaus Jensen
2020-04-21  9:19   ` Gerd Hoffmann
2020-04-15  5:51 ` [PATCH v7 47/48] nvme: change controller pci id Klaus Jensen
2020-04-15  5:51 ` [PATCH v7 48/48] nvme: make lba data size configurable Klaus Jensen
2020-04-15  7:40   ` Philippe Mathieu-Daudé
2020-04-15  7:17 ` [PATCH v7 00/48] nvme: support NVMe v1.3d, SGLs and multiple namespaces no-reply
2020-04-15  8:02 ` no-reply

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