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From: Vignesh Raghavendra <vigneshr@ti.com>
To: Tudor Ambarus <tudor.ambarus@microchip.com>,
	Mark Brown <broonie@kernel.org>
Cc: Vignesh Raghavendra <vigneshr@ti.com>,
	Boris Brezillon <bbrezillon@kernel.org>,
	Ramuthevar Vadivel Murugan 
	<vadivel.muruganx.ramuthevar@linux.intel.com>,
	<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<linux-spi@vger.kernel.org>, <simon.k.r.goldschmidt@gmail.com>,
	<dinguyen@kernel.org>, <marex@denx.de>
Subject: [PATCH 2/6] mtd: spi-nor: cadence-quadspi: Provide a way to disable DAC mode
Date: Sat, 9 May 2020 00:24:07 +0530	[thread overview]
Message-ID: <20200508185411.487-3-vigneshr@ti.com> (raw)
In-Reply-To: <20200508185411.487-1-vigneshr@ti.com>

Currently direct access mode is used on platforms that have AHB window
(memory mapped window) larger than flash size. This feature is limited
to TI platforms as non TI platforms have < 1MB of AHB window.
Therefore introduce a driver quirk to disable DAC mode and set it for
non TI compatibles. This is in preparation to move to spi-mem framework
where flash geometry cannot be known.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
---
 drivers/mtd/spi-nor/controllers/cadence-quadspi.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/spi-nor/controllers/cadence-quadspi.c b/drivers/mtd/spi-nor/controllers/cadence-quadspi.c
index fa54f85e16d7..4d2e732b85b1 100644
--- a/drivers/mtd/spi-nor/controllers/cadence-quadspi.c
+++ b/drivers/mtd/spi-nor/controllers/cadence-quadspi.c
@@ -34,6 +34,7 @@
 
 /* Quirks */
 #define CQSPI_NEEDS_WR_DELAY		BIT(0)
+#define CQSPI_DISABLE_DAC_MODE		BIT(1)
 
 /* Capabilities mask */
 #define CQSPI_BASE_HWCAPS_MASK					\
@@ -1254,7 +1255,8 @@ static int cqspi_setup_flash(struct cqspi_st *cqspi, struct device_node *np)
 
 		f_pdata->registered = true;
 
-		if (mtd->size <= cqspi->ahb_size) {
+		if (mtd->size <= cqspi->ahb_size &&
+		    !(ddata->quirks & CQSPI_DISABLE_DAC_MODE)) {
 			f_pdata->use_direct_mode = true;
 			dev_dbg(nor->dev, "using direct mode for %s\n",
 				mtd->name);
@@ -1450,6 +1452,7 @@ static const struct dev_pm_ops cqspi__dev_pm_ops = {
 
 static const struct cqspi_driver_platdata cdns_qspi = {
 	.hwcaps_mask = CQSPI_BASE_HWCAPS_MASK,
+	.quirks = CQSPI_DISABLE_DAC_MODE,
 };
 
 static const struct cqspi_driver_platdata k2g_qspi = {
-- 
2.26.2


WARNING: multiple messages have this Message-ID (diff)
From: Vignesh Raghavendra <vigneshr@ti.com>
To: Tudor Ambarus <tudor.ambarus@microchip.com>,
	Mark Brown <broonie@kernel.org>
Cc: marex@denx.de, Vignesh Raghavendra <vigneshr@ti.com>,
	Boris Brezillon <bbrezillon@kernel.org>,
	dinguyen@kernel.org, simon.k.r.goldschmidt@gmail.com,
	linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
	Ramuthevar Vadivel Murugan
	<vadivel.muruganx.ramuthevar@linux.intel.com>,
	linux-mtd@lists.infradead.org
Subject: [PATCH 2/6] mtd: spi-nor: cadence-quadspi: Provide a way to disable DAC mode
Date: Sat, 9 May 2020 00:24:07 +0530	[thread overview]
Message-ID: <20200508185411.487-3-vigneshr@ti.com> (raw)
In-Reply-To: <20200508185411.487-1-vigneshr@ti.com>

Currently direct access mode is used on platforms that have AHB window
(memory mapped window) larger than flash size. This feature is limited
to TI platforms as non TI platforms have < 1MB of AHB window.
Therefore introduce a driver quirk to disable DAC mode and set it for
non TI compatibles. This is in preparation to move to spi-mem framework
where flash geometry cannot be known.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
---
 drivers/mtd/spi-nor/controllers/cadence-quadspi.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/spi-nor/controllers/cadence-quadspi.c b/drivers/mtd/spi-nor/controllers/cadence-quadspi.c
index fa54f85e16d7..4d2e732b85b1 100644
--- a/drivers/mtd/spi-nor/controllers/cadence-quadspi.c
+++ b/drivers/mtd/spi-nor/controllers/cadence-quadspi.c
@@ -34,6 +34,7 @@
 
 /* Quirks */
 #define CQSPI_NEEDS_WR_DELAY		BIT(0)
+#define CQSPI_DISABLE_DAC_MODE		BIT(1)
 
 /* Capabilities mask */
 #define CQSPI_BASE_HWCAPS_MASK					\
@@ -1254,7 +1255,8 @@ static int cqspi_setup_flash(struct cqspi_st *cqspi, struct device_node *np)
 
 		f_pdata->registered = true;
 
-		if (mtd->size <= cqspi->ahb_size) {
+		if (mtd->size <= cqspi->ahb_size &&
+		    !(ddata->quirks & CQSPI_DISABLE_DAC_MODE)) {
 			f_pdata->use_direct_mode = true;
 			dev_dbg(nor->dev, "using direct mode for %s\n",
 				mtd->name);
@@ -1450,6 +1452,7 @@ static const struct dev_pm_ops cqspi__dev_pm_ops = {
 
 static const struct cqspi_driver_platdata cdns_qspi = {
 	.hwcaps_mask = CQSPI_BASE_HWCAPS_MASK,
+	.quirks = CQSPI_DISABLE_DAC_MODE,
 };
 
 static const struct cqspi_driver_platdata k2g_qspi = {
-- 
2.26.2


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http://lists.infradead.org/mailman/listinfo/linux-mtd/

  parent reply	other threads:[~2020-05-08 18:54 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-08 18:54 [PATCH 0/6] mtd: spi-nor: Move cadence-qaudspi to spi-mem framework Vignesh Raghavendra
2020-05-08 18:54 ` Vignesh Raghavendra
2020-05-08 18:54 ` [PATCH 1/6] mtd: spi-nor: cadence-quadspi: Drop cdns,is-decoded-cs property Vignesh Raghavendra
2020-05-08 18:54   ` [PATCH 1/6] mtd: spi-nor: cadence-quadspi: Drop cdns, is-decoded-cs property Vignesh Raghavendra
2020-05-26  9:31   ` [PATCH 1/6] mtd: spi-nor: cadence-quadspi: Drop cdns,is-decoded-cs property Vignesh Raghavendra
2020-05-26  9:31     ` Vignesh Raghavendra
2020-05-08 18:54 ` Vignesh Raghavendra [this message]
2020-05-08 18:54   ` [PATCH 2/6] mtd: spi-nor: cadence-quadspi: Provide a way to disable DAC mode Vignesh Raghavendra
2020-05-28 18:37   ` Tudor.Ambarus
2020-05-28 18:37     ` Tudor.Ambarus
2020-05-08 18:54 ` [PATCH 3/6] mtd: spi-nor: cadence-quadspi: Don't initialize rx_dma_complete on failure Vignesh Raghavendra
2020-05-08 18:54   ` Vignesh Raghavendra
2020-05-08 18:54 ` [PATCH 4/6] mtd: spi-nor: cadence-quadspi: Fix error path on failure to acquire reset lines Vignesh Raghavendra
2020-05-08 18:54   ` Vignesh Raghavendra
2020-05-08 18:54 ` [PATCH 5/6] mtd: spi-nor: Convert cadence-quadspi to use spi-mem framework Vignesh Raghavendra
2020-05-08 18:54   ` Vignesh Raghavendra
2020-05-08 18:54 ` [PATCH 6/6] spi: Move cadence-quadspi driver to drivers/spi/ Vignesh Raghavendra
2020-05-08 18:54   ` Vignesh Raghavendra
2020-05-11 10:20 ` [PATCH 0/6] mtd: spi-nor: Move cadence-qaudspi to spi-mem framework Ramuthevar, Vadivel MuruganX
2020-05-11 10:20   ` Ramuthevar, Vadivel MuruganX

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