From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org
Cc: Andre Przywara <andre.przywara@arm.com>,
Christoffer Dall <christoffer.dall@arm.com>,
Dave Martin <Dave.Martin@arm.com>,
Jintack Lim <jintack@cs.columbia.edu>,
Alexandru Elisei <alexandru.elisei@arm.com>,
George Cherian <gcherian@marvell.com>,
"Zengtao (B)" <prime.zeng@hisilicon.com>,
Andrew Scull <ascull@google.com>, Will Deacon <will@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
James Morse <james.morse@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
kernel-team@android.com
Subject: [PATCH v2 03/17] arm64: Document SW reserved PTE/PMD bits in Stage-2 descriptors
Date: Mon, 15 Jun 2020 14:27:05 +0100 [thread overview]
Message-ID: <20200615132719.1932408-4-maz@kernel.org> (raw)
In-Reply-To: <20200615132719.1932408-1-maz@kernel.org>
Advertise bits [58:55] as reserved for SW in the S2 descriptors.
Reviewed-by: Andrew Scull <ascull@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/include/asm/pgtable-hwdef.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h
index 9c91a8f93a0e..de0b603955f4 100644
--- a/arch/arm64/include/asm/pgtable-hwdef.h
+++ b/arch/arm64/include/asm/pgtable-hwdef.h
@@ -178,10 +178,12 @@
#define PTE_S2_RDONLY (_AT(pteval_t, 1) << 6) /* HAP[2:1] */
#define PTE_S2_RDWR (_AT(pteval_t, 3) << 6) /* HAP[2:1] */
#define PTE_S2_XN (_AT(pteval_t, 2) << 53) /* XN[1:0] */
+#define PTE_S2_SW_RESVD (_AT(pteval_t, 15) << 55) /* Reserved for SW */
#define PMD_S2_RDONLY (_AT(pmdval_t, 1) << 6) /* HAP[2:1] */
#define PMD_S2_RDWR (_AT(pmdval_t, 3) << 6) /* HAP[2:1] */
#define PMD_S2_XN (_AT(pmdval_t, 2) << 53) /* XN[1:0] */
+#define PMD_S2_SW_RESVD (_AT(pmdval_t, 15) << 55) /* Reserved for SW */
#define PUD_S2_RDONLY (_AT(pudval_t, 1) << 6) /* HAP[2:1] */
#define PUD_S2_RDWR (_AT(pudval_t, 3) << 6) /* HAP[2:1] */
--
2.27.0
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org
Cc: kernel-team@android.com, Will Deacon <will@kernel.org>,
Andre Przywara <andre.przywara@arm.com>,
Dave Martin <Dave.Martin@arm.com>,
George Cherian <gcherian@marvell.com>,
"Zengtao \(B\)" <prime.zeng@hisilicon.com>,
Catalin Marinas <catalin.marinas@arm.com>
Subject: [PATCH v2 03/17] arm64: Document SW reserved PTE/PMD bits in Stage-2 descriptors
Date: Mon, 15 Jun 2020 14:27:05 +0100 [thread overview]
Message-ID: <20200615132719.1932408-4-maz@kernel.org> (raw)
In-Reply-To: <20200615132719.1932408-1-maz@kernel.org>
Advertise bits [58:55] as reserved for SW in the S2 descriptors.
Reviewed-by: Andrew Scull <ascull@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/include/asm/pgtable-hwdef.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h
index 9c91a8f93a0e..de0b603955f4 100644
--- a/arch/arm64/include/asm/pgtable-hwdef.h
+++ b/arch/arm64/include/asm/pgtable-hwdef.h
@@ -178,10 +178,12 @@
#define PTE_S2_RDONLY (_AT(pteval_t, 1) << 6) /* HAP[2:1] */
#define PTE_S2_RDWR (_AT(pteval_t, 3) << 6) /* HAP[2:1] */
#define PTE_S2_XN (_AT(pteval_t, 2) << 53) /* XN[1:0] */
+#define PTE_S2_SW_RESVD (_AT(pteval_t, 15) << 55) /* Reserved for SW */
#define PMD_S2_RDONLY (_AT(pmdval_t, 1) << 6) /* HAP[2:1] */
#define PMD_S2_RDWR (_AT(pmdval_t, 3) << 6) /* HAP[2:1] */
#define PMD_S2_XN (_AT(pmdval_t, 2) << 53) /* XN[1:0] */
+#define PMD_S2_SW_RESVD (_AT(pmdval_t, 15) << 55) /* Reserved for SW */
#define PUD_S2_RDONLY (_AT(pudval_t, 1) << 6) /* HAP[2:1] */
#define PUD_S2_RDWR (_AT(pudval_t, 3) << 6) /* HAP[2:1] */
--
2.27.0
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
kernel-team@android.com, Will Deacon <will@kernel.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Andre Przywara <andre.przywara@arm.com>,
Christoffer Dall <christoffer.dall@arm.com>,
Dave Martin <Dave.Martin@arm.com>,
George Cherian <gcherian@marvell.com>,
James Morse <james.morse@arm.com>,
Andrew Scull <ascull@google.com>,
"Zengtao \(B\)" <prime.zeng@hisilicon.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Jintack Lim <jintack@cs.columbia.edu>,
Julien Thierry <julien.thierry.kdev@gmail.com>
Subject: [PATCH v2 03/17] arm64: Document SW reserved PTE/PMD bits in Stage-2 descriptors
Date: Mon, 15 Jun 2020 14:27:05 +0100 [thread overview]
Message-ID: <20200615132719.1932408-4-maz@kernel.org> (raw)
In-Reply-To: <20200615132719.1932408-1-maz@kernel.org>
Advertise bits [58:55] as reserved for SW in the S2 descriptors.
Reviewed-by: Andrew Scull <ascull@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/include/asm/pgtable-hwdef.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h
index 9c91a8f93a0e..de0b603955f4 100644
--- a/arch/arm64/include/asm/pgtable-hwdef.h
+++ b/arch/arm64/include/asm/pgtable-hwdef.h
@@ -178,10 +178,12 @@
#define PTE_S2_RDONLY (_AT(pteval_t, 1) << 6) /* HAP[2:1] */
#define PTE_S2_RDWR (_AT(pteval_t, 3) << 6) /* HAP[2:1] */
#define PTE_S2_XN (_AT(pteval_t, 2) << 53) /* XN[1:0] */
+#define PTE_S2_SW_RESVD (_AT(pteval_t, 15) << 55) /* Reserved for SW */
#define PMD_S2_RDONLY (_AT(pmdval_t, 1) << 6) /* HAP[2:1] */
#define PMD_S2_RDWR (_AT(pmdval_t, 3) << 6) /* HAP[2:1] */
#define PMD_S2_XN (_AT(pmdval_t, 2) << 53) /* XN[1:0] */
+#define PMD_S2_SW_RESVD (_AT(pmdval_t, 15) << 55) /* Reserved for SW */
#define PUD_S2_RDONLY (_AT(pudval_t, 1) << 6) /* HAP[2:1] */
#define PUD_S2_RDWR (_AT(pudval_t, 3) << 6) /* HAP[2:1] */
--
2.27.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-06-15 13:27 UTC|newest]
Thread overview: 99+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-15 13:27 [PATCH v2 00/17] KVM: arm64: Preliminary NV patches Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` [PATCH v2 01/17] KVM: arm64: Factor out stage 2 page table data from struct kvm Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-16 15:59 ` Alexandru Elisei
2020-06-16 15:59 ` Alexandru Elisei
2020-06-16 15:59 ` Alexandru Elisei
2020-06-16 16:18 ` Marc Zyngier
2020-06-16 16:18 ` Marc Zyngier
2020-06-16 16:18 ` Marc Zyngier
2020-06-17 12:58 ` Alexandru Elisei
2020-06-17 12:58 ` Alexandru Elisei
2020-06-17 12:58 ` Alexandru Elisei
2020-06-25 12:19 ` Alexandru Elisei
2020-06-25 12:19 ` Alexandru Elisei
2020-06-25 12:19 ` Alexandru Elisei
2020-07-06 12:17 ` Marc Zyngier
2020-07-06 12:17 ` Marc Zyngier
2020-07-06 12:17 ` Marc Zyngier
2020-07-06 15:49 ` Alexandru Elisei
2020-07-06 15:49 ` Alexandru Elisei
2020-07-06 15:49 ` Alexandru Elisei
2020-06-17 12:40 ` Marc Zyngier
2020-06-17 12:40 ` Marc Zyngier
2020-06-17 12:40 ` Marc Zyngier
2020-06-25 12:49 ` Alexandru Elisei
2020-06-25 12:49 ` Alexandru Elisei
2020-06-25 12:49 ` Alexandru Elisei
2020-07-13 9:47 ` Andrew Scull
2020-07-13 9:47 ` Andrew Scull
2020-07-13 9:47 ` Andrew Scull
2020-07-13 14:20 ` Marc Zyngier
2020-07-13 14:20 ` Marc Zyngier
2020-07-13 14:20 ` Marc Zyngier
2020-06-15 13:27 ` [PATCH v2 02/17] arm64: Detect the ARMv8.4 TTL feature Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier [this message]
2020-06-15 13:27 ` [PATCH v2 03/17] arm64: Document SW reserved PTE/PMD bits in Stage-2 descriptors Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` [PATCH v2 04/17] arm64: Add level-hinted TLB invalidation helper Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-25 16:24 ` Alexandru Elisei
2020-06-25 16:24 ` Alexandru Elisei
2020-06-25 16:24 ` Alexandru Elisei
2020-06-15 13:27 ` [PATCH v2 05/17] KVM: arm64: Use TTL hint in when invalidating stage-2 translations Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-26 13:14 ` Alexandru Elisei
2020-06-26 13:14 ` Alexandru Elisei
2020-06-26 13:14 ` Alexandru Elisei
2020-06-15 13:27 ` [PATCH v2 06/17] KVM: arm64: Introduce accessor for ctxt->sys_reg Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-26 15:39 ` Alexandru Elisei
2020-06-26 15:39 ` Alexandru Elisei
2020-06-26 15:39 ` Alexandru Elisei
2020-07-06 12:15 ` Marc Zyngier
2020-07-06 12:15 ` Marc Zyngier
2020-07-06 12:15 ` Marc Zyngier
2020-07-06 12:35 ` Alexandru Elisei
2020-07-06 12:35 ` Alexandru Elisei
2020-07-06 12:35 ` Alexandru Elisei
2020-06-15 13:27 ` [PATCH v2 07/17] KVM: arm64: hyp: Use ctxt_sys_reg/__vcpu_sys_reg instead of raw sys_regs access Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` [PATCH v2 08/17] KVM: arm64: sve: Use __vcpu_sys_reg() " Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` [PATCH v2 09/17] KVM: arm64: pauth: Use ctxt_sys_reg() " Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` [PATCH v2 10/17] KVM: arm64: debug: " Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` [PATCH v2 11/17] KVM: arm64: Make struct kvm_regs userspace-only Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` [PATCH v2 12/17] KVM: arm64: Move ELR_EL1 to the system register array Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` [PATCH v2 13/17] KVM: arm64: Move SP_EL1 " Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` [PATCH v2 14/17] KVM: arm64: Disintegrate SPSR array Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` [PATCH v2 15/17] KVM: arm64: Move SPSR_EL1 to the system register array Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` [PATCH v2 16/17] KVM: arm64: timers: Rename kvm_timer_sync_hwstate to kvm_timer_sync_user Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` [PATCH v2 17/17] KVM: arm64: timers: Move timer registers to the sys_regs file Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
2020-06-15 13:27 ` Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200615132719.1932408-4-maz@kernel.org \
--to=maz@kernel.org \
--cc=Dave.Martin@arm.com \
--cc=alexandru.elisei@arm.com \
--cc=andre.przywara@arm.com \
--cc=ascull@google.com \
--cc=catalin.marinas@arm.com \
--cc=christoffer.dall@arm.com \
--cc=gcherian@marvell.com \
--cc=james.morse@arm.com \
--cc=jintack@cs.columbia.edu \
--cc=julien.thierry.kdev@gmail.com \
--cc=kernel-team@android.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=mark.rutland@arm.com \
--cc=prime.zeng@hisilicon.com \
--cc=suzuki.poulose@arm.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.