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From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: xen-devel@lists.xenproject.org, Wei Liu <wl@xen.org>,
	Jan Beulich <jbeulich@suse.com>,
	paul@xen.org
Subject: Re: [PATCH for-4.14 8/8] x86/hvm: enable emulated PIT for PVH dom0
Date: Mon, 15 Jun 2020 17:47:59 +0200	[thread overview]
Message-ID: <20200615154759.GH735@Air-de-Roger> (raw)
In-Reply-To: <b68cede9-360e-cc4f-d88b-737ee83e654e@citrix.com>

On Mon, Jun 15, 2020 at 04:33:33PM +0100, Andrew Cooper wrote:
> On 12/06/2020 16:56, Roger Pau Monne wrote:
> > Some video BIOS require a PIT in order to work properly, hence classic
> > PV dom0 gets partial access to the physical PIT as long as it's not in
> > use by Xen.
> 
> Is this actually true today?

TBH I have no idea and asked the same thing myself.

> I can believe that it may have been necessary on old hardware, but the
> structure of systems has changed massively over the past 20 years, and
> the PIT is very legacy these days.

I also wondered whether video BIOSes really changed in the last 20
years, I really have no idea. FWIW, Wikipedia still lists PIT as being
used by video BIOSes on x86 systems [0] but there are no references to
specific models or video BIOSes.

Alternatively we could add this as a Xen command line option, ie:
dom0=pit or some such. It's however not very nice to not get output
because the video BIOS doesn't function properly due to lack of PIT.

Thanks, Roger.

[0] https://en.wikipedia.org/wiki/Intel_8253#IBM_PC_programming_tips_and_hints


  reply	other threads:[~2020-06-15 15:48 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-12 15:56 [PATCH for-4.14 0/8] x86/vpt: fixes for vpt and enable vPIT for PVH dom0 Roger Pau Monne
2020-06-12 15:56 ` [PATCH for-4.14 1/8] x86/hvm: fix vIO-APIC build without IRQ0_SPECIAL_ROUTING Roger Pau Monne
2020-06-15 10:00   ` Paul Durrant
2020-06-15 11:44     ` Roger Pau Monné
2020-06-12 15:56 ` [PATCH for-4.14 2/8] x86/hvm: don't force vCPU 0 for IRQ 0 when using fixed destination mode Roger Pau Monne
2020-06-18 13:43   ` Jan Beulich
2020-06-18 13:48     ` Roger Pau Monné
2020-06-18 14:08       ` Jan Beulich
2020-06-18 14:18         ` Roger Pau Monné
2020-06-18 14:29           ` Jan Beulich
2020-06-18 14:49             ` Roger Pau Monné
2020-06-18 15:16               ` Jan Beulich
2020-06-12 15:56 ` [PATCH for-4.14 3/8] x86/hvm: fix ISA IRQ 0 handling when set as lowest priority mode in IO APIC Roger Pau Monne
2020-06-18 14:26   ` Jan Beulich
2020-06-18 14:55     ` Roger Pau Monné
2020-06-18 15:20       ` Jan Beulich
2020-06-12 15:56 ` [PATCH for-4.14 4/8] x86/vpt: only try to resume timers belonging to enabled devices Roger Pau Monne
2020-06-18 14:37   ` Jan Beulich
2020-06-18 14:56     ` Roger Pau Monné
2020-06-12 15:56 ` [PATCH for-4.14 5/8] x86/hvm: only translate ISA interrupts to GSIs in virtual timers Roger Pau Monne
2020-06-18 14:47   ` Jan Beulich
2020-06-18 15:03     ` Roger Pau Monné
2020-06-12 15:56 ` [PATCH for-4.14 6/8] x86/vpt: fix injection to remote vCPU Roger Pau Monne
2020-06-18 15:12   ` Jan Beulich
2020-06-18 17:14     ` Roger Pau Monné
2020-06-19 12:37       ` Jan Beulich
2020-06-12 15:56 ` [PATCH for-4.14 7/8] x86/hvm: add hardware domain support to hvm_isa_irq_to_gsi Roger Pau Monne
2020-06-18 15:37   ` Jan Beulich
2020-06-12 15:56 ` [PATCH for-4.14 8/8] x86/hvm: enable emulated PIT for PVH dom0 Roger Pau Monne
2020-06-15 15:33   ` Andrew Cooper
2020-06-15 15:47     ` Roger Pau Monné [this message]
2020-06-18 16:05   ` Jan Beulich
2020-06-29 14:46     ` Roger Pau Monné

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