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From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: xen-devel@lists.xenproject.org,
	Andrew Cooper <andrew.cooper3@citrix.com>, Wei Liu <wl@xen.org>,
	paul@xen.org
Subject: Re: [PATCH for-4.14 2/8] x86/hvm: don't force vCPU 0 for IRQ 0 when using fixed destination mode
Date: Thu, 18 Jun 2020 16:49:36 +0200	[thread overview]
Message-ID: <20200618144936.GS735@Air-de-Roger> (raw)
In-Reply-To: <69de3bdb-b521-798b-a727-fd8f20ee6294@suse.com>

On Thu, Jun 18, 2020 at 04:29:59PM +0200, Jan Beulich wrote:
> On 18.06.2020 16:18, Roger Pau Monné wrote:
> > On Thu, Jun 18, 2020 at 04:08:28PM +0200, Jan Beulich wrote:
> >> On 18.06.2020 15:48, Roger Pau Monné wrote:
> >>> On Thu, Jun 18, 2020 at 03:43:00PM +0200, Jan Beulich wrote:
> >>>> On 12.06.2020 17:56, Roger Pau Monne wrote:
> >>>>> When the IO APIC pin mapped to the ISA IRQ 0 has been configured to
> >>>>> use fixed delivery mode do not forcefully route interrupts to vCPU 0,
> >>>>> as the OS might have setup those interrupts to be injected to a
> >>>>> different vCPU, and injecting to vCPU 0 can cause the OS to miss such
> >>>>> interrupts or errors to happen due to unexpected vectors being
> >>>>> injected on vCPU 0.
> >>>>>
> >>>>> In order to fix remove such handling altogether for fixed destination
> >>>>> mode pins and just inject them according to the data setup in the
> >>>>> IO-APIC entry.
> >>>>>
> >>>>> Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
> >>>>
> >>>> Technically
> >>>> Reviewed-by: Jan Beulich <jbeulich@suse.com>
> >>>>
> >>>> I wonder though why this was done in the first place - it very much
> >>>> feels like a workaround for certain guest behavior, and hence
> >>>> getting rid of it may mean a certain risk of regressions. Not a
> >>>> very good point in time to make risky changes ...
> >>>
> >>> We can defer to after the release I guess, but I will still ask for
> >>> the changes to be backported.
> >>
> >> That's fine, albeit if we decide to delay it until 4.15 was branched,
> >> then I think we want to also wait longer than usual until it would hit
> >> the stable trees. Unfortunately c8e79412c001's description is of no
> >> help to understand what or why "time jumps" may result from delivering
> >> the interrupt as requested.
> > 
> > Yes, I've also looked at the original commit and have no idea what it
> > was actually trying to fix, and why delivering to vCPU 0 fixed it.
> > FWIW, I tried delivering to a different vCPU and it seems to work
> > fine.
> 
> Right, I too was thinking that delivering to a "stable" CPU might be
> all that's needed. In patch 3 this may then call for latching that
> CPU, and preferring it over what vlapic_lowest_prio() produces.

Yes, I also considered that route for the lowest priority mode (which
is dealt with in the next patch), but for fixed mode we need to
delivered to the listed vCPUs, there's no trick we can play here
IMO.

Roger.


  reply	other threads:[~2020-06-18 14:50 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-12 15:56 [PATCH for-4.14 0/8] x86/vpt: fixes for vpt and enable vPIT for PVH dom0 Roger Pau Monne
2020-06-12 15:56 ` [PATCH for-4.14 1/8] x86/hvm: fix vIO-APIC build without IRQ0_SPECIAL_ROUTING Roger Pau Monne
2020-06-15 10:00   ` Paul Durrant
2020-06-15 11:44     ` Roger Pau Monné
2020-06-12 15:56 ` [PATCH for-4.14 2/8] x86/hvm: don't force vCPU 0 for IRQ 0 when using fixed destination mode Roger Pau Monne
2020-06-18 13:43   ` Jan Beulich
2020-06-18 13:48     ` Roger Pau Monné
2020-06-18 14:08       ` Jan Beulich
2020-06-18 14:18         ` Roger Pau Monné
2020-06-18 14:29           ` Jan Beulich
2020-06-18 14:49             ` Roger Pau Monné [this message]
2020-06-18 15:16               ` Jan Beulich
2020-06-12 15:56 ` [PATCH for-4.14 3/8] x86/hvm: fix ISA IRQ 0 handling when set as lowest priority mode in IO APIC Roger Pau Monne
2020-06-18 14:26   ` Jan Beulich
2020-06-18 14:55     ` Roger Pau Monné
2020-06-18 15:20       ` Jan Beulich
2020-06-12 15:56 ` [PATCH for-4.14 4/8] x86/vpt: only try to resume timers belonging to enabled devices Roger Pau Monne
2020-06-18 14:37   ` Jan Beulich
2020-06-18 14:56     ` Roger Pau Monné
2020-06-12 15:56 ` [PATCH for-4.14 5/8] x86/hvm: only translate ISA interrupts to GSIs in virtual timers Roger Pau Monne
2020-06-18 14:47   ` Jan Beulich
2020-06-18 15:03     ` Roger Pau Monné
2020-06-12 15:56 ` [PATCH for-4.14 6/8] x86/vpt: fix injection to remote vCPU Roger Pau Monne
2020-06-18 15:12   ` Jan Beulich
2020-06-18 17:14     ` Roger Pau Monné
2020-06-19 12:37       ` Jan Beulich
2020-06-12 15:56 ` [PATCH for-4.14 7/8] x86/hvm: add hardware domain support to hvm_isa_irq_to_gsi Roger Pau Monne
2020-06-18 15:37   ` Jan Beulich
2020-06-12 15:56 ` [PATCH for-4.14 8/8] x86/hvm: enable emulated PIT for PVH dom0 Roger Pau Monne
2020-06-15 15:33   ` Andrew Cooper
2020-06-15 15:47     ` Roger Pau Monné
2020-06-18 16:05   ` Jan Beulich
2020-06-29 14:46     ` Roger Pau Monné

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