From: Lars Povlsen <lars.povlsen@microchip.com>
To: Mark Brown <broonie@kernel.org>, SoC Team <soc@kernel.org>
Cc: Lars Povlsen <lars.povlsen@microchip.com>,
Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>,
<linux-spi@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
Serge Semin <fancer.lancer@gmail.com>,
Serge Semin <Sergey.Semin@baikalelectronics.ru>
Subject: [PATCH v2 2/6] arm64: dts: sparx5: Add SPI controller
Date: Fri, 19 Jun 2020 13:31:17 +0200 [thread overview]
Message-ID: <20200619113121.9984-3-lars.povlsen@microchip.com> (raw)
In-Reply-To: <20200619113121.9984-1-lars.povlsen@microchip.com>
This adds a SPI controller to the Microchip Sparx5 SoC
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
---
arch/arm64/boot/dts/microchip/sparx5.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi
index 7e811e24f0e99..2404bcc08b89d 100644
--- a/arch/arm64/boot/dts/microchip/sparx5.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi
@@ -14,6 +14,7 @@ / {
#size-cells = <1>;
aliases {
+ spi0 = &spi0;
serial0 = &uart0;
serial1 = &uart1;
};
@@ -155,6 +156,19 @@ uart1: serial@600102000 {
status = "disabled";
};
+ spi0: spi@600104000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "microchip,sparx5-spi";
+ reg = <0x6 0x00104000 0x40>;
+ num-cs = <16>;
+ reg-io-width = <4>;
+ reg-shift = <2>;
+ clocks = <&ahb_clk>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
timer1: timer@600105000 {
compatible = "snps,dw-apb-timer";
reg = <0x6 0x00105000 0x1000>;
--
2.27.0
WARNING: multiple messages have this Message-ID (diff)
From: Lars Povlsen <lars.povlsen@microchip.com>
To: Mark Brown <broonie@kernel.org>, SoC Team <soc@kernel.org>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Serge Semin <fancer.lancer@gmail.com>,
linux-spi@vger.kernel.org,
Serge Semin <Sergey.Semin@baikalelectronics.ru>,
Lars Povlsen <lars.povlsen@microchip.com>,
Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 2/6] arm64: dts: sparx5: Add SPI controller
Date: Fri, 19 Jun 2020 13:31:17 +0200 [thread overview]
Message-ID: <20200619113121.9984-3-lars.povlsen@microchip.com> (raw)
In-Reply-To: <20200619113121.9984-1-lars.povlsen@microchip.com>
This adds a SPI controller to the Microchip Sparx5 SoC
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
---
arch/arm64/boot/dts/microchip/sparx5.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/microchip/sparx5.dtsi b/arch/arm64/boot/dts/microchip/sparx5.dtsi
index 7e811e24f0e99..2404bcc08b89d 100644
--- a/arch/arm64/boot/dts/microchip/sparx5.dtsi
+++ b/arch/arm64/boot/dts/microchip/sparx5.dtsi
@@ -14,6 +14,7 @@ / {
#size-cells = <1>;
aliases {
+ spi0 = &spi0;
serial0 = &uart0;
serial1 = &uart1;
};
@@ -155,6 +156,19 @@ uart1: serial@600102000 {
status = "disabled";
};
+ spi0: spi@600104000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "microchip,sparx5-spi";
+ reg = <0x6 0x00104000 0x40>;
+ num-cs = <16>;
+ reg-io-width = <4>;
+ reg-shift = <2>;
+ clocks = <&ahb_clk>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
timer1: timer@600105000 {
compatible = "snps,dw-apb-timer";
reg = <0x6 0x00105000 0x1000>;
--
2.27.0
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next prev parent reply other threads:[~2020-06-19 11:32 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-19 11:31 [PATCH v2 0/6] spi: Adding support for Microchip Sparx5 SoC Lars Povlsen
2020-06-19 11:31 ` Lars Povlsen
2020-06-19 11:31 ` [PATCH v2 1/6] spi: dw: Add support for RX sample delay register Lars Povlsen
2020-06-19 11:31 ` Lars Povlsen
2020-06-19 11:31 ` Lars Povlsen [this message]
2020-06-19 11:31 ` [PATCH v2 2/6] arm64: dts: sparx5: Add SPI controller Lars Povlsen
2020-06-19 11:31 ` [PATCH v2 3/6] spi: dw: Add Microchip Sparx5 support Lars Povlsen
2020-06-19 11:31 ` Lars Povlsen
2020-06-19 12:11 ` Mark Brown
2020-06-22 10:46 ` Lars Povlsen
[not found] ` <20200622121706.GF4560@sirena.org.uk>
2020-06-23 13:53 ` Lars Povlsen
2020-06-23 14:08 ` Mark Brown
2020-07-02 10:05 ` Lars Povlsen
2020-07-02 10:05 ` Lars Povlsen
2020-06-19 11:31 ` [PATCH v2 4/6] dt-bindings: snps,dw-apb-ssi: Add sparx5, SPI slave snps,rx-sample-delay-ns and microchip,spi-interface2 properties Lars Povlsen
2020-06-19 11:31 ` [PATCH v2 4/6] dt-bindings: snps, dw-apb-ssi: Add sparx5, SPI slave snps, rx-sample-delay-ns and microchip, spi-interface2 properties Lars Povlsen
2020-06-19 11:31 ` [PATCH v2 5/6] arm64: dts: sparx5: Add spi-nor support Lars Povlsen
2020-06-19 11:31 ` Lars Povlsen
2020-06-19 11:31 ` [PATCH v2 6/6] arm64: dts: sparx5: Add spi-nand devices Lars Povlsen
2020-06-19 11:31 ` Lars Povlsen
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