From: Zhenyu Ye <yezhenyu2@huawei.com>
To: <catalin.marinas@arm.com>, <will@kernel.org>,
<suzuki.poulose@arm.com>, <maz@kernel.org>,
<steven.price@arm.com>, <guohanjun@huawei.com>, <olof@lixom.net>
Cc: <yezhenyu2@huawei.com>, <linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linux-arch@vger.kernel.org>,
<linux-mm@kvack.org>, <arm@kernel.org>, <xiexiangyou@huawei.com>,
<prime.zeng@hisilicon.com>, <zhangshaokun@hisilicon.com>,
<kuhn.chenqun@huawei.com>
Subject: [PATCH v2 0/2] arm64: tlb: add support for TLBI RANGE instructions
Date: Fri, 10 Jul 2020 17:44:18 +0800 [thread overview]
Message-ID: <20200710094420.517-1-yezhenyu2@huawei.com> (raw)
NOTICE: this series are based on the arm64 for-next/tlbi branch:
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git for-next/tlbi
--
ARMv8.4-TLBI provides TLBI invalidation instruction that apply to a
range of input addresses. This series add support for this feature.
--
ChangeList:
v2:
- remove the __tlbi_last_level() macro.
- add check for parameters in __TLBI_VADDR_RANGE macro.
RFC patches:
- Link: https://lore.kernel.org/linux-arm-kernel/20200708124031.1414-1-yezhenyu2@huawei.com/
Zhenyu Ye (2):
arm64: tlb: Detect the ARMv8.4 TLBI RANGE feature
arm64: tlb: Use the TLBI RANGE feature in arm64
arch/arm64/include/asm/cpucaps.h | 3 +-
arch/arm64/include/asm/sysreg.h | 3 +
arch/arm64/include/asm/tlbflush.h | 138 +++++++++++++++++++++++-------
arch/arm64/kernel/cpufeature.c | 10 +++
4 files changed, 124 insertions(+), 30 deletions(-)
--
2.19.1
WARNING: multiple messages have this Message-ID (diff)
From: Zhenyu Ye <yezhenyu2@huawei.com>
To: catalin.marinas@arm.com, will@kernel.org, suzuki.poulose@arm.com,
maz@kernel.org, steven.price@arm.com, guohanjun@huawei.com,
olof@lixom.net
Cc: yezhenyu2@huawei.com, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org,
linux-mm@kvack.org, arm@kernel.org, xiexiangyou@huawei.com,
prime.zeng@hisilicon.com, zhangshaokun@hisilicon.com,
kuhn.chenqun@huawei.com
Subject: [PATCH v2 0/2] arm64: tlb: add support for TLBI RANGE instructions
Date: Fri, 10 Jul 2020 17:44:18 +0800 [thread overview]
Message-ID: <20200710094420.517-1-yezhenyu2@huawei.com> (raw)
NOTICE: this series are based on the arm64 for-next/tlbi branch:
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git for-next/tlbi
--
ARMv8.4-TLBI provides TLBI invalidation instruction that apply to a
range of input addresses. This series add support for this feature.
WARNING: multiple messages have this Message-ID (diff)
From: Zhenyu Ye <yezhenyu2@huawei.com>
To: catalin.marinas@arm.com, will@kernel.org, suzuki.poulose@arm.com,
maz@kernel.org, steven.price@arm.com, guohanjun@huawei.com,
olof@lixom.net
Cc: yezhenyu2@huawei.com, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org,
linux-mm@kvack.org, arm@kernel.org, xiexiangyou@huawei.com,
prime.zeng@hisilicon.com, zhangshaokun@hisilicon.com,
kuhn.chenqun@huawei.com
Subject: [PATCH v2 0/2] arm64: tlb: add support for TLBI RANGE instructions
Date: Fri, 10 Jul 2020 17:44:18 +0800 [thread overview]
Message-ID: <20200710094420.517-1-yezhenyu2@huawei.com> (raw)
Message-ID: <20200710094418.4QEN8iN7Tc0z4bY0YaK4-PQIgaRfQ3EznqujlVtnsFw@z> (raw)
NOTICE: this series are based on the arm64 for-next/tlbi branch:
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git for-next/tlbi
--
ARMv8.4-TLBI provides TLBI invalidation instruction that apply to a
range of input addresses. This series add support for this feature.
--
ChangeList:
v2:
- remove the __tlbi_last_level() macro.
- add check for parameters in __TLBI_VADDR_RANGE macro.
RFC patches:
- Link: https://lore.kernel.org/linux-arm-kernel/20200708124031.1414-1-yezhenyu2@huawei.com/
Zhenyu Ye (2):
arm64: tlb: Detect the ARMv8.4 TLBI RANGE feature
arm64: tlb: Use the TLBI RANGE feature in arm64
arch/arm64/include/asm/cpucaps.h | 3 +-
arch/arm64/include/asm/sysreg.h | 3 +
arch/arm64/include/asm/tlbflush.h | 138 +++++++++++++++++++++++-------
arch/arm64/kernel/cpufeature.c | 10 +++
4 files changed, 124 insertions(+), 30 deletions(-)
--
2.19.1
WARNING: multiple messages have this Message-ID (diff)
From: Zhenyu Ye <yezhenyu2@huawei.com>
To: <catalin.marinas@arm.com>, <will@kernel.org>,
<suzuki.poulose@arm.com>, <maz@kernel.org>,
<steven.price@arm.com>, <guohanjun@huawei.com>, <olof@lixom.net>
Cc: linux-arch@vger.kernel.org, yezhenyu2@huawei.com,
linux-kernel@vger.kernel.org, xiexiangyou@huawei.com,
zhangshaokun@hisilicon.com, linux-mm@kvack.org, arm@kernel.org,
prime.zeng@hisilicon.com, kuhn.chenqun@huawei.com,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 0/2] arm64: tlb: add support for TLBI RANGE instructions
Date: Fri, 10 Jul 2020 17:44:18 +0800 [thread overview]
Message-ID: <20200710094420.517-1-yezhenyu2@huawei.com> (raw)
NOTICE: this series are based on the arm64 for-next/tlbi branch:
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git for-next/tlbi
--
ARMv8.4-TLBI provides TLBI invalidation instruction that apply to a
range of input addresses. This series add support for this feature.
--
ChangeList:
v2:
- remove the __tlbi_last_level() macro.
- add check for parameters in __TLBI_VADDR_RANGE macro.
RFC patches:
- Link: https://lore.kernel.org/linux-arm-kernel/20200708124031.1414-1-yezhenyu2@huawei.com/
Zhenyu Ye (2):
arm64: tlb: Detect the ARMv8.4 TLBI RANGE feature
arm64: tlb: Use the TLBI RANGE feature in arm64
arch/arm64/include/asm/cpucaps.h | 3 +-
arch/arm64/include/asm/sysreg.h | 3 +
arch/arm64/include/asm/tlbflush.h | 138 +++++++++++++++++++++++-------
arch/arm64/kernel/cpufeature.c | 10 +++
4 files changed, 124 insertions(+), 30 deletions(-)
--
2.19.1
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next reply other threads:[~2020-07-10 9:44 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-10 9:44 Zhenyu Ye [this message]
2020-07-10 9:44 ` [PATCH v2 0/2] arm64: tlb: add support for TLBI RANGE instructions Zhenyu Ye
2020-07-10 9:44 ` Zhenyu Ye
2020-07-10 9:44 ` Zhenyu Ye
2020-07-10 9:44 ` [PATCH v2 1/2] arm64: tlb: Detect the ARMv8.4 TLBI RANGE feature Zhenyu Ye
2020-07-10 9:44 ` Zhenyu Ye
2020-07-10 9:44 ` Zhenyu Ye
2020-07-10 9:44 ` [PATCH v2 2/2] arm64: tlb: Use the TLBI RANGE feature in arm64 Zhenyu Ye
2020-07-10 9:44 ` Zhenyu Ye
2020-07-10 9:44 ` Zhenyu Ye
2020-07-10 18:31 ` Catalin Marinas
2020-07-10 18:31 ` Catalin Marinas
2020-07-11 6:50 ` Zhenyu Ye
2020-07-11 6:50 ` Zhenyu Ye
2020-07-11 6:50 ` Zhenyu Ye
2020-07-12 12:03 ` Catalin Marinas
2020-07-12 12:03 ` Catalin Marinas
[not found] ` <20200710094420.517-3-yezhenyu2-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2020-07-13 14:27 ` Jon Hunter
2020-07-13 14:27 ` Jon Hunter
2020-07-13 14:27 ` Jon Hunter
2020-07-13 14:27 ` Jon Hunter
[not found] ` <4040f429-21c8-0825-2ad4-97786c3fe7c1-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2020-07-13 14:39 ` Zhenyu Ye
2020-07-13 14:39 ` Zhenyu Ye
2020-07-13 14:39 ` Zhenyu Ye
2020-07-13 14:39 ` Zhenyu Ye
[not found] ` <cee60718-ced2-069f-8dad-48941c6fc09b-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2020-07-13 14:44 ` Jon Hunter
2020-07-13 14:44 ` Jon Hunter
2020-07-13 14:44 ` Jon Hunter
2020-07-13 14:44 ` Jon Hunter
[not found] ` <7237888d-2168-cd8b-c83d-c8e54871793d-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2020-07-13 17:21 ` Catalin Marinas
2020-07-13 17:21 ` Catalin Marinas
2020-07-13 17:21 ` Catalin Marinas
2020-07-14 10:36 ` Catalin Marinas
2020-07-14 10:36 ` Catalin Marinas
2020-07-14 13:51 ` Zhenyu Ye
2020-07-14 13:51 ` Zhenyu Ye
2020-07-14 13:51 ` Zhenyu Ye
2020-07-10 19:11 ` [PATCH v2 0/2] arm64: tlb: add support for TLBI RANGE instructions Catalin Marinas
2020-07-13 12:21 ` Catalin Marinas
2020-07-13 12:21 ` Catalin Marinas
2020-07-13 12:41 ` Zhenyu Ye
2020-07-13 12:41 ` Zhenyu Ye
2020-07-13 12:41 ` Zhenyu Ye
2020-07-13 16:59 ` Catalin Marinas
2020-07-13 16:59 ` Catalin Marinas
2020-07-14 15:17 ` Zhenyu Ye
2020-07-14 15:17 ` Zhenyu Ye
2020-07-14 15:17 ` Zhenyu Ye
2020-07-14 15:58 ` Catalin Marinas
2020-07-14 15:58 ` Catalin Marinas
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