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From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: gregkh@linuxfoundation.org
Cc: saiprakash.ranjan@codeaurora.org, suzuki.poulose@arm.com,
	vulab@iscas.ac.cn, tingwei@codeaurora.org,
	andriy.shevchenko@linux.intel.com,
	linux-arm-kernel@lists.infradead.org, mike.leach@linaro.org
Subject: [PATCH 12/17] coresight: tmc: Add shutdown callback for TMC ETR
Date: Thu, 16 Jul 2020 11:57:41 -0600	[thread overview]
Message-ID: <20200716175746.3338735-13-mathieu.poirier@linaro.org> (raw)
In-Reply-To: <20200716175746.3338735-1-mathieu.poirier@linaro.org>

From: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>

Implement a shutdown callback to ensure ETR hardware is
properly shutdown in reboot/shutdown path. This is required
for ETR which has SMMU address translation enabled like on
SC7180 SoC and few others. If the hardware is still accessing
memory after SMMU translation is disabled as part of SMMU
shutdown callback in system reboot or shutdown path, then
IOVAs(I/O virtual address) which it was using will go on the
bus as the physical addresses which might result in unknown
crashes (NoC/interconnect errors). So we make sure from this
shutdown callback that the ETR is shutdown before SMMU translation
is disabled and device_link in SMMU driver will take care of
ordering of shutdown callbacks such that SMMU shutdown callback
is not called before any of its consumer shutdown callbacks.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 .../hwtracing/coresight/coresight-tmc-etr.c   |  2 +-
 drivers/hwtracing/coresight/coresight-tmc.c   | 23 +++++++++++++++++++
 drivers/hwtracing/coresight/coresight-tmc.h   |  1 +
 3 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
index 625882bc8b08..b29c2db94d96 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
@@ -1110,7 +1110,7 @@ static void __tmc_etr_disable_hw(struct tmc_drvdata *drvdata)
 
 }
 
-static void tmc_etr_disable_hw(struct tmc_drvdata *drvdata)
+void tmc_etr_disable_hw(struct tmc_drvdata *drvdata)
 {
 	__tmc_etr_disable_hw(drvdata);
 	/* Disable CATU device if this ETR is connected to one */
diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c
index 39fba1d16e6e..b13ce0daa572 100644
--- a/drivers/hwtracing/coresight/coresight-tmc.c
+++ b/drivers/hwtracing/coresight/coresight-tmc.c
@@ -538,6 +538,28 @@ static int tmc_probe(struct amba_device *adev, const struct amba_id *id)
 	return ret;
 }
 
+static void tmc_shutdown(struct amba_device *adev)
+{
+	unsigned long flags;
+	struct tmc_drvdata *drvdata = amba_get_drvdata(adev);
+
+	spin_lock_irqsave(&drvdata->spinlock, flags);
+
+	if (drvdata->mode == CS_MODE_DISABLED)
+		goto out;
+
+	if (drvdata->config_type == TMC_CONFIG_TYPE_ETR)
+		tmc_etr_disable_hw(drvdata);
+
+	/*
+	 * We do not care about coresight unregister here unlike remove
+	 * callback which is required for making coresight modular since
+	 * the system is going down after this.
+	 */
+out:
+	spin_unlock_irqrestore(&drvdata->spinlock, flags);
+}
+
 static const struct amba_id tmc_ids[] = {
 	CS_AMBA_ID(0x000bb961),
 	/* Coresight SoC 600 TMC-ETR/ETS */
@@ -556,6 +578,7 @@ static struct amba_driver tmc_driver = {
 		.suppress_bind_attrs = true,
 	},
 	.probe		= tmc_probe,
+	.shutdown	= tmc_shutdown,
 	.id_table	= tmc_ids,
 };
 builtin_amba_driver(tmc_driver);
diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h
index 71de978575f3..6e8d2dc33d17 100644
--- a/drivers/hwtracing/coresight/coresight-tmc.h
+++ b/drivers/hwtracing/coresight/coresight-tmc.h
@@ -268,6 +268,7 @@ ssize_t tmc_etb_get_sysfs_trace(struct tmc_drvdata *drvdata,
 /* ETR functions */
 int tmc_read_prepare_etr(struct tmc_drvdata *drvdata);
 int tmc_read_unprepare_etr(struct tmc_drvdata *drvdata);
+void tmc_etr_disable_hw(struct tmc_drvdata *drvdata);
 extern const struct coresight_ops tmc_etr_cs_ops;
 ssize_t tmc_etr_get_sysfs_trace(struct tmc_drvdata *drvdata,
 				loff_t pos, size_t len, char **bufpp);
-- 
2.25.1


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  parent reply	other threads:[~2020-07-16 18:01 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-16 17:57 [PATCH 00/17] coresight: next v5.8-rc5 Mathieu Poirier
2020-07-16 17:57 ` [PATCH 01/17] coresight: replicator: Use CS_AMBA_ID macro for id table Mathieu Poirier
2020-07-16 17:57 ` [PATCH 02/17] coresight: catu: " Mathieu Poirier
2020-07-16 17:57 ` [PATCH 03/17] coresight: etm4x: Add support to skip trace unit power up Mathieu Poirier
2020-07-16 17:57 ` [PATCH 04/17] dt-bindings: arm: coresight: " Mathieu Poirier
2020-07-16 17:57 ` [PATCH 05/17] coresight: replicator: Reset replicator if context is lost Mathieu Poirier
2020-07-16 17:57 ` [PATCH 06/17] dt-bindings: arm: coresight: Add optional property to replicators Mathieu Poirier
2020-07-16 17:57 ` [PATCH 07/17] coresight: Use devm_kcalloc() in coresight_alloc_conns() Mathieu Poirier
2020-07-16 17:57 ` [PATCH 08/17] coresight: Drop double check for ACPI companion device Mathieu Poirier
2020-07-16 17:57 ` [PATCH 09/17] coresight: etmv4: Fix resource selector constant Mathieu Poirier
2020-07-16 17:57 ` [PATCH 10/17] coresight: etmv4: Counter values not saved on disable Mathieu Poirier
2020-07-16 17:57 ` [PATCH 11/17] coresight: Fix comment in main header file Mathieu Poirier
2020-07-16 17:57 ` Mathieu Poirier [this message]
2020-07-16 17:57 ` [PATCH 13/17] coresight: tmc: Fix TMC mode read in tmc_read_unprepare_etb() Mathieu Poirier
2020-07-16 17:57 ` [PATCH 14/17] coresight: Add default sink selection to CoreSight base Mathieu Poirier
2020-07-16 17:57 ` [PATCH 15/17] coresight: tmc: Update sink types for default selection Mathieu Poirier
2020-07-16 17:57 ` [PATCH 16/17] coresight: etm: perf: Add default sink selection to etm perf Mathieu Poirier
2020-07-16 17:57 ` [PATCH 17/17] coresight: etm4x: Fix save/restore during cpu idle Mathieu Poirier

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