From: Kishon Vijay Abraham I <kishon@ti.com>
To: Tom Joseph <tjoseph@cadence.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Arnd Bergmann <arnd@arndb.de>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-omap@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: [PATCH v8 07/15] dt-bindings: PCI: cadence: Remove "mem" from reg binding
Date: Wed, 22 Jul 2020 16:33:09 +0530 [thread overview]
Message-ID: <20200722110317.4744-8-kishon@ti.com> (raw)
In-Reply-To: <20200722110317.4744-1-kishon@ti.com>
"mem" is not a memory resource and it overlaps with PCIe config space
and memory region. Remove "mem" from reg binding.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/pci/cdns,cdns-pcie-host.yaml | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
index 84a8f095d031..6d67067843bf 100644
--- a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
+++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
@@ -18,13 +18,12 @@ properties:
const: cdns,cdns-pcie-host
reg:
- maxItems: 3
+ maxItems: 2
reg-names:
items:
- const: reg
- const: cfg
- - const: mem
msi-parent: true
@@ -49,9 +48,8 @@ examples:
device-id = <0x0200>;
reg = <0x0 0xfb000000 0x0 0x01000000>,
- <0x0 0x41000000 0x0 0x00001000>,
- <0x0 0x40000000 0x0 0x04000000>;
- reg-names = "reg", "cfg", "mem";
+ <0x0 0x41000000 0x0 0x00001000>;
+ reg-names = "reg", "cfg";
ranges = <0x02000000 0x0 0x42000000 0x0 0x42000000 0x0 0x1000000>,
<0x01000000 0x0 0x43000000 0x0 0x43000000 0x0 0x0010000>;
--
2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Kishon Vijay Abraham I <kishon@ti.com>
To: Tom Joseph <tjoseph@cadence.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Arnd Bergmann <arnd@arndb.de>
Cc: devicetree@vger.kernel.org,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH v8 07/15] dt-bindings: PCI: cadence: Remove "mem" from reg binding
Date: Wed, 22 Jul 2020 16:33:09 +0530 [thread overview]
Message-ID: <20200722110317.4744-8-kishon@ti.com> (raw)
In-Reply-To: <20200722110317.4744-1-kishon@ti.com>
"mem" is not a memory resource and it overlaps with PCIe config space
and memory region. Remove "mem" from reg binding.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/pci/cdns,cdns-pcie-host.yaml | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
index 84a8f095d031..6d67067843bf 100644
--- a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
+++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
@@ -18,13 +18,12 @@ properties:
const: cdns,cdns-pcie-host
reg:
- maxItems: 3
+ maxItems: 2
reg-names:
items:
- const: reg
- const: cfg
- - const: mem
msi-parent: true
@@ -49,9 +48,8 @@ examples:
device-id = <0x0200>;
reg = <0x0 0xfb000000 0x0 0x01000000>,
- <0x0 0x41000000 0x0 0x00001000>,
- <0x0 0x40000000 0x0 0x04000000>;
- reg-names = "reg", "cfg", "mem";
+ <0x0 0x41000000 0x0 0x00001000>;
+ reg-names = "reg", "cfg";
ranges = <0x02000000 0x0 0x42000000 0x0 0x42000000 0x0 0x1000000>,
<0x01000000 0x0 0x43000000 0x0 0x43000000 0x0 0x0010000>;
--
2.17.1
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next prev parent reply other threads:[~2020-07-22 11:04 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-22 11:03 [PATCH v8 00/15] Add PCIe support to TI's J721E SoC Kishon Vijay Abraham I
2020-07-22 11:03 ` Kishon Vijay Abraham I
2020-07-22 11:03 ` [PATCH v8 01/15] PCI: cadence: Use "dma-ranges" instead of "cdns,no-bar-match-nbits" property Kishon Vijay Abraham I
2020-07-22 11:03 ` [PATCH v8 01/15] PCI: cadence: Use "dma-ranges" instead of "cdns, no-bar-match-nbits" property Kishon Vijay Abraham I
2020-07-22 11:45 ` [PATCH v8 01/15] PCI: cadence: Use "dma-ranges" instead of "cdns,no-bar-match-nbits" property Lorenzo Pieralisi
2020-07-22 11:45 ` Lorenzo Pieralisi
2020-07-22 22:30 ` Rob Herring
2020-07-22 22:30 ` Rob Herring
2020-07-22 11:03 ` [PATCH v8 02/15] PCI: cadence: Fix cdns_pcie_{host|ep}_setup() error path Kishon Vijay Abraham I
2020-07-22 11:03 ` Kishon Vijay Abraham I
2020-07-22 11:03 ` [PATCH v8 03/15] linux/kernel.h: Add PTR_ALIGN_DOWN macro Kishon Vijay Abraham I
2020-07-22 11:03 ` Kishon Vijay Abraham I
2020-07-22 11:03 ` [PATCH v8 04/15] PCI: cadence: Convert all r/w accessors to perform only 32-bit accesses Kishon Vijay Abraham I
2020-07-22 11:03 ` Kishon Vijay Abraham I
2020-07-22 11:03 ` [PATCH v8 05/15] PCI: cadence: Add support to start link and verify link status Kishon Vijay Abraham I
2020-07-22 11:03 ` Kishon Vijay Abraham I
2020-07-22 11:03 ` [PATCH v8 06/15] PCI: cadence: Allow pci_host_bridge to have custom pci_ops Kishon Vijay Abraham I
2020-07-22 11:03 ` Kishon Vijay Abraham I
2020-07-22 11:03 ` Kishon Vijay Abraham I [this message]
2020-07-22 11:03 ` [PATCH v8 07/15] dt-bindings: PCI: cadence: Remove "mem" from reg binding Kishon Vijay Abraham I
2020-07-22 11:03 ` [PATCH v8 08/15] PCI: cadence: Add new *ops* for CPU addr fixup Kishon Vijay Abraham I
2020-07-22 11:03 ` Kishon Vijay Abraham I
2020-07-22 11:03 ` [PATCH v8 09/15] PCI: cadence: Fix updating Vendor ID and Subsystem Vendor ID register Kishon Vijay Abraham I
2020-07-22 11:03 ` Kishon Vijay Abraham I
2020-07-22 11:03 ` [PATCH v8 10/15] PCI: cadence: Add MSI-X support to Endpoint driver Kishon Vijay Abraham I
2020-07-22 11:03 ` Kishon Vijay Abraham I
2020-07-22 11:03 ` [PATCH v8 11/15] dt-bindings: PCI: Add host mode dt-bindings for TI's J721E SoC Kishon Vijay Abraham I
2020-07-22 11:03 ` Kishon Vijay Abraham I
2020-07-22 11:03 ` [PATCH v8 12/15] dt-bindings: PCI: Add EP " Kishon Vijay Abraham I
2020-07-22 11:03 ` Kishon Vijay Abraham I
2020-07-22 11:03 ` [PATCH v8 13/15] PCI: j721e: Add TI J721E PCIe driver Kishon Vijay Abraham I
2020-07-22 11:03 ` Kishon Vijay Abraham I
2020-07-22 11:03 ` [PATCH v8 14/15] misc: pci_endpoint_test: Add J721E in pci_device_id table Kishon Vijay Abraham I
2020-07-22 11:03 ` Kishon Vijay Abraham I
2020-07-22 11:03 ` [PATCH v8 15/15] MAINTAINERS: Add Kishon Vijay Abraham I for TI J721E SoC PCIe Kishon Vijay Abraham I
2020-07-22 11:03 ` Kishon Vijay Abraham I
2020-07-23 10:02 ` [PATCH v8 00/15] Add PCIe support to TI's J721E SoC Lorenzo Pieralisi
2020-07-23 10:02 ` Lorenzo Pieralisi
2020-07-23 10:12 ` Kishon Vijay Abraham I
2020-07-23 10:12 ` Kishon Vijay Abraham I
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