From: Andre Przywara <andre.przywara@arm.com> To: soc@kernel.org Cc: Rob Herring <robh@kernel.org>, devicetree@vger.kernel.org, Wei Xu <xuwei5@hisilicon.com>, Chanho Min <chanho.min@lge.com>, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 3/6] arm64: dts: lg: Fix SP804 users Date: Mon, 7 Sep 2020 13:18:28 +0100 [thread overview] Message-ID: <20200907121831.242281-4-andre.przywara@arm.com> (raw) In-Reply-To: <20200907121831.242281-1-andre.przywara@arm.com> Even though the SP804 binding allows to specify only one clock, the primecell driver requires a named clock to activate the bus clock. Specify the one clock three times and provide some clock-names, to make the DT match the SP804 and primecell binding. Also add the missing arm,primecell compatible string. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- arch/arm64/boot/dts/lg/lg1312.dtsi | 6 +++--- arch/arm64/boot/dts/lg/lg1313.dtsi | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi b/arch/arm64/boot/dts/lg/lg1312.dtsi index 64f3b135068d..e2a1564597c8 100644 --- a/arch/arm64/boot/dts/lg/lg1312.dtsi +++ b/arch/arm64/boot/dts/lg/lg1312.dtsi @@ -131,11 +131,11 @@ ranges; timers: timer@fd100000 { - compatible = "arm,sp804"; + compatible = "arm,sp804", "arm,primecell"; reg = <0x0 0xfd100000 0x1000>; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk_bus>; - clock-names = "apb_pclk"; + clocks = <&clk_bus>, <&clk_bus>, <&clk_bus>; + clock-names = "timer0clk", "timer1clk", "apb_pclk"; }; wdog: watchdog@fd200000 { compatible = "arm,sp805", "arm,primecell"; diff --git a/arch/arm64/boot/dts/lg/lg1313.dtsi b/arch/arm64/boot/dts/lg/lg1313.dtsi index ac23592ab011..a54d14d7ae6f 100644 --- a/arch/arm64/boot/dts/lg/lg1313.dtsi +++ b/arch/arm64/boot/dts/lg/lg1313.dtsi @@ -131,11 +131,11 @@ ranges; timers: timer@fd100000 { - compatible = "arm,sp804"; + compatible = "arm,sp804", "arm,primecell"; reg = <0x0 0xfd100000 0x1000>; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk_bus>; - clock-names = "apb_pclk"; + clocks = <&clk_bus>, <&clk_bus>, <&clk_bus>; + clock-names = "timer0clk", "timer1clk", "apb_pclk"; }; wdog: watchdog@fd200000 { compatible = "arm,sp805", "arm,primecell"; -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Andre Przywara <andre.przywara@arm.com> To: soc@kernel.org Cc: Rob Herring <robh@kernel.org>, devicetree@vger.kernel.org, Chanho Min <chanho.min@lge.com>, linux-kernel@vger.kernel.org, Wei Xu <xuwei5@hisilicon.com>, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 3/6] arm64: dts: lg: Fix SP804 users Date: Mon, 7 Sep 2020 13:18:28 +0100 [thread overview] Message-ID: <20200907121831.242281-4-andre.przywara@arm.com> (raw) In-Reply-To: <20200907121831.242281-1-andre.przywara@arm.com> Even though the SP804 binding allows to specify only one clock, the primecell driver requires a named clock to activate the bus clock. Specify the one clock three times and provide some clock-names, to make the DT match the SP804 and primecell binding. Also add the missing arm,primecell compatible string. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- arch/arm64/boot/dts/lg/lg1312.dtsi | 6 +++--- arch/arm64/boot/dts/lg/lg1313.dtsi | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi b/arch/arm64/boot/dts/lg/lg1312.dtsi index 64f3b135068d..e2a1564597c8 100644 --- a/arch/arm64/boot/dts/lg/lg1312.dtsi +++ b/arch/arm64/boot/dts/lg/lg1312.dtsi @@ -131,11 +131,11 @@ ranges; timers: timer@fd100000 { - compatible = "arm,sp804"; + compatible = "arm,sp804", "arm,primecell"; reg = <0x0 0xfd100000 0x1000>; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk_bus>; - clock-names = "apb_pclk"; + clocks = <&clk_bus>, <&clk_bus>, <&clk_bus>; + clock-names = "timer0clk", "timer1clk", "apb_pclk"; }; wdog: watchdog@fd200000 { compatible = "arm,sp805", "arm,primecell"; diff --git a/arch/arm64/boot/dts/lg/lg1313.dtsi b/arch/arm64/boot/dts/lg/lg1313.dtsi index ac23592ab011..a54d14d7ae6f 100644 --- a/arch/arm64/boot/dts/lg/lg1313.dtsi +++ b/arch/arm64/boot/dts/lg/lg1313.dtsi @@ -131,11 +131,11 @@ ranges; timers: timer@fd100000 { - compatible = "arm,sp804"; + compatible = "arm,sp804", "arm,primecell"; reg = <0x0 0xfd100000 0x1000>; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk_bus>; - clock-names = "apb_pclk"; + clocks = <&clk_bus>, <&clk_bus>, <&clk_bus>; + clock-names = "timer0clk", "timer1clk", "apb_pclk"; }; wdog: watchdog@fd200000 { compatible = "arm,sp805", "arm,primecell"; -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-09-07 12:26 UTC|newest] Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-09-07 12:18 [PATCH v3 0/6] ARM/arm64: dts: Fix SP804/SP805 users Andre Przywara 2020-09-07 12:18 ` Andre Przywara 2020-09-07 12:18 ` [PATCH v3 1/6] ARM: dts: hisilicon: Fix SP804 users Andre Przywara 2020-09-07 12:18 ` Andre Przywara 2020-09-16 1:44 ` Wei Xu 2020-09-16 1:44 ` Wei Xu 2020-09-07 12:18 ` [PATCH v3 2/6] ARM: dts: nspire: " Andre Przywara 2020-09-07 12:18 ` Andre Przywara 2020-09-07 12:18 ` Andre Przywara [this message] 2020-09-07 12:18 ` [PATCH v3 3/6] arm64: dts: lg: " Andre Przywara 2020-09-07 12:18 ` [PATCH v3 4/6] arm64: dts: hisilicon: Fix SP805 clocks Andre Przywara 2020-09-07 12:18 ` Andre Przywara 2020-09-16 1:45 ` Wei Xu 2020-09-16 1:45 ` Wei Xu 2020-09-07 12:18 ` [PATCH v3 5/6] arm64: dts: lg: " Andre Przywara 2020-09-07 12:18 ` Andre Przywara 2020-09-07 12:18 ` [PATCH v3 6/6] ARM: dts: hisilicon: " Andre Przywara 2020-09-07 12:18 ` Andre Przywara 2020-09-16 1:42 ` Wei Xu 2020-09-16 1:42 ` Wei Xu 2020-10-03 19:57 ` [PATCH v3 0/6] ARM/arm64: dts: Fix SP804/SP805 users Olof Johansson 2020-10-03 19:57 ` Olof Johansson
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