From: Zhen Lei <thunder.leizhen@huawei.com> To: Thomas Gleixner <tglx@linutronix.de>, Jason Cooper <jason@lakedaemon.net>, Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>, "Alexey Brodkin" <abrodkin@synopsys.com>, Vineet Gupta <vgupta@synopsys.com>, devicetree <devicetree@vger.kernel.org>, linux-snps-arc <linux-snps-arc@lists.infradead.org>, linux-kernel <linux-kernel@vger.kernel.org> Cc: Zhen Lei <thunder.leizhen@huawei.com>, Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>, Haoyu Lv <lvhaoyu@huawei.com>, Libin <huawei.libin@huawei.com>, Kefeng Wang <wangkefeng.wang@huawei.com> Subject: [PATCH v6 5/6] dt-bindings: dw-apb-ictl: convert to json-schema Date: Thu, 24 Sep 2020 15:17:53 +0800 [thread overview] Message-ID: <20200924071754.4509-6-thunder.leizhen@huawei.com> (raw) In-Reply-To: <20200924071754.4509-1-thunder.leizhen@huawei.com> Convert the Synopsys DesignWare APB interrupt controller (dw_apb_ictl) binding to DT schema format using json-schema. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> --- .../interrupt-controller/snps,dw-apb-ictl.txt | 43 ------------- .../interrupt-controller/snps,dw-apb-ictl.yaml | 74 ++++++++++++++++++++++ 2 files changed, 74 insertions(+), 43 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt deleted file mode 100644 index 2db59df9408f4c6..000000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt +++ /dev/null @@ -1,43 +0,0 @@ -Synopsys DesignWare APB interrupt controller (dw_apb_ictl) - -Synopsys DesignWare provides interrupt controller IP for APB known as -dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs with -APB bus, e.g. Marvell Armada 1500. It can also be used as primary interrupt -controller in some SoCs, e.g. Hisilicon SD5203. - -Required properties: -- compatible: shall be "snps,dw-apb-ictl" -- reg: physical base address of the controller and length of memory mapped - region starting with ENABLE_LOW register -- interrupt-controller: identifies the node as an interrupt controller -- #interrupt-cells: number of cells to encode an interrupt-specifier, shall be 1 - -Additional required property when it's used as secondary interrupt controller: -- interrupts: interrupt reference to primary interrupt controller - -The interrupt sources map to the corresponding bits in the interrupt -registers, i.e. -- 0 maps to bit 0 of low interrupts, -- 1 maps to bit 1 of low interrupts, -- 32 maps to bit 0 of high interrupts, -- 33 maps to bit 1 of high interrupts, -- (optional) fast interrupts start at 64. - -Example: - /* dw_apb_ictl is used as secondary interrupt controller */ - aic: interrupt-controller@3000 { - compatible = "snps,dw-apb-ictl"; - reg = <0x3000 0xc00>; - interrupt-controller; - #interrupt-cells = <1>; - interrupt-parent = <&gic>; - interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; - }; - - /* dw_apb_ictl is used as primary interrupt controller */ - vic: interrupt-controller@10130000 { - compatible = "snps,dw-apb-ictl"; - reg = <0x10130000 0x1000>; - interrupt-controller; - #interrupt-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml new file mode 100644 index 000000000000000..1b05d36b5f7b943 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/snps,dw-apb-ictl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DesignWare APB interrupt controller (dw_apb_ictl) + +maintainers: + - Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> + +description: | + Synopsys DesignWare provides interrupt controller IP for APB known as + dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs + with APB bus, e.g. Marvell Armada 1500. It can also be used as primary + interrupt controller in some SoCs, e.g. Hisilicon SD5203. + + The interrupt sources map to the corresponding bits in the interrupt + registers, i.e. + - 0 maps to bit 0 of low interrupts, + - 1 maps to bit 1 of low interrupts, + - 32 maps to bit 0 of high interrupts, + - 33 maps to bit 1 of high interrupts, + - (optional) fast interrupts start at 64. + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + const: snps,dw-apb-ictl + + interrupt-controller: true + + reg: + description: | + Physical base address of the controller and length of memory mapped + region starting with ENABLE_LOW register. + maxItems: 1 + + interrupts: + description: Interrupt reference to primary interrupt controller. + maxItems: 1 + + "#interrupt-cells": + description: Number of cells to encode an interrupt-specifier. + const: 1 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + +examples: + - | + /* dw_apb_ictl is used as secondary interrupt controller */ + aic: interrupt-controller@3000 { + compatible = "snps,dw-apb-ictl"; + reg = <0x3000 0xc00>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = <0 3 4>; + }; + + /* dw_apb_ictl is used as primary interrupt controller */ + vic: interrupt-controller@10130000 { + compatible = "snps,dw-apb-ictl"; + reg = <0x10130000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; +... -- 1.8.3
WARNING: multiple messages have this Message-ID (diff)
From: Zhen Lei <thunder.leizhen@huawei.com> To: Thomas Gleixner <tglx@linutronix.de>, Jason Cooper <jason@lakedaemon.net>, Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>, "Alexey Brodkin" <abrodkin@synopsys.com>, Vineet Gupta <vgupta@synopsys.com>, devicetree <devicetree@vger.kernel.org>, linux-snps-arc <linux-snps-arc@lists.infradead.org>, linux-kernel <linux-kernel@vger.kernel.org> Cc: Haoyu Lv <lvhaoyu@huawei.com>, Kefeng Wang <wangkefeng.wang@huawei.com>, Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>, Libin <huawei.libin@huawei.com>, Zhen Lei <thunder.leizhen@huawei.com> Subject: [PATCH v6 5/6] dt-bindings: dw-apb-ictl: convert to json-schema Date: Thu, 24 Sep 2020 15:17:53 +0800 [thread overview] Message-ID: <20200924071754.4509-6-thunder.leizhen@huawei.com> (raw) In-Reply-To: <20200924071754.4509-1-thunder.leizhen@huawei.com> Convert the Synopsys DesignWare APB interrupt controller (dw_apb_ictl) binding to DT schema format using json-schema. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> --- .../interrupt-controller/snps,dw-apb-ictl.txt | 43 ------------- .../interrupt-controller/snps,dw-apb-ictl.yaml | 74 ++++++++++++++++++++++ 2 files changed, 74 insertions(+), 43 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt deleted file mode 100644 index 2db59df9408f4c6..000000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt +++ /dev/null @@ -1,43 +0,0 @@ -Synopsys DesignWare APB interrupt controller (dw_apb_ictl) - -Synopsys DesignWare provides interrupt controller IP for APB known as -dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs with -APB bus, e.g. Marvell Armada 1500. It can also be used as primary interrupt -controller in some SoCs, e.g. Hisilicon SD5203. - -Required properties: -- compatible: shall be "snps,dw-apb-ictl" -- reg: physical base address of the controller and length of memory mapped - region starting with ENABLE_LOW register -- interrupt-controller: identifies the node as an interrupt controller -- #interrupt-cells: number of cells to encode an interrupt-specifier, shall be 1 - -Additional required property when it's used as secondary interrupt controller: -- interrupts: interrupt reference to primary interrupt controller - -The interrupt sources map to the corresponding bits in the interrupt -registers, i.e. -- 0 maps to bit 0 of low interrupts, -- 1 maps to bit 1 of low interrupts, -- 32 maps to bit 0 of high interrupts, -- 33 maps to bit 1 of high interrupts, -- (optional) fast interrupts start at 64. - -Example: - /* dw_apb_ictl is used as secondary interrupt controller */ - aic: interrupt-controller@3000 { - compatible = "snps,dw-apb-ictl"; - reg = <0x3000 0xc00>; - interrupt-controller; - #interrupt-cells = <1>; - interrupt-parent = <&gic>; - interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; - }; - - /* dw_apb_ictl is used as primary interrupt controller */ - vic: interrupt-controller@10130000 { - compatible = "snps,dw-apb-ictl"; - reg = <0x10130000 0x1000>; - interrupt-controller; - #interrupt-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml new file mode 100644 index 000000000000000..1b05d36b5f7b943 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/snps,dw-apb-ictl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DesignWare APB interrupt controller (dw_apb_ictl) + +maintainers: + - Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> + +description: | + Synopsys DesignWare provides interrupt controller IP for APB known as + dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs + with APB bus, e.g. Marvell Armada 1500. It can also be used as primary + interrupt controller in some SoCs, e.g. Hisilicon SD5203. + + The interrupt sources map to the corresponding bits in the interrupt + registers, i.e. + - 0 maps to bit 0 of low interrupts, + - 1 maps to bit 1 of low interrupts, + - 32 maps to bit 0 of high interrupts, + - 33 maps to bit 1 of high interrupts, + - (optional) fast interrupts start at 64. + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + const: snps,dw-apb-ictl + + interrupt-controller: true + + reg: + description: | + Physical base address of the controller and length of memory mapped + region starting with ENABLE_LOW register. + maxItems: 1 + + interrupts: + description: Interrupt reference to primary interrupt controller. + maxItems: 1 + + "#interrupt-cells": + description: Number of cells to encode an interrupt-specifier. + const: 1 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + +examples: + - | + /* dw_apb_ictl is used as secondary interrupt controller */ + aic: interrupt-controller@3000 { + compatible = "snps,dw-apb-ictl"; + reg = <0x3000 0xc00>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&gic>; + interrupts = <0 3 4>; + }; + + /* dw_apb_ictl is used as primary interrupt controller */ + vic: interrupt-controller@10130000 { + compatible = "snps,dw-apb-ictl"; + reg = <0x10130000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; +... -- 1.8.3 _______________________________________________ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
next prev parent reply other threads:[~2020-09-24 7:19 UTC|newest] Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-09-24 7:17 [PATCH v6 0/6] irqchip: dw-apb-ictl: support hierarchy irq domain Zhen Lei 2020-09-24 7:17 ` Zhen Lei 2020-09-24 7:17 ` [PATCH v6 1/6] genirq: define an empty function set_handle_irq() if !GENERIC_IRQ_MULTI_HANDLER Zhen Lei 2020-09-24 7:17 ` Zhen Lei 2020-10-11 17:57 ` [tip: irq/core] genirq: Add stub for set_handle_irq() when !GENERIC_IRQ_MULTI_HANDLER tip-bot2 for Zhen Lei 2020-09-24 7:17 ` [PATCH v6 2/6] irqchip: dw-apb-ictl: prepare for support hierarchy irq domain Zhen Lei 2020-09-24 7:17 ` Zhen Lei 2020-10-11 17:57 ` [tip: irq/core] irqchip/dw-apb-ictl: Refactor priot to introducing hierarchical irq domains tip-bot2 for Zhen Lei 2020-09-24 7:17 ` [PATCH v6 3/6] irqchip: dw-apb-ictl: support hierarchy irq domain Zhen Lei 2020-09-24 7:17 ` Zhen Lei 2020-10-11 17:57 ` [tip: irq/core] irqchip/dw-apb-ictl: Add primary interrupt controller support tip-bot2 for Zhen Lei 2020-09-24 7:17 ` [PATCH v6 4/6] dt-bindings: dw-apb-ictl: support hierarchy irq domain Zhen Lei 2020-09-24 7:17 ` Zhen Lei 2020-10-11 17:57 ` [tip: irq/core] dt-bindings: dw-apb-ictl: Update binding to describe use as primary interrupt controller tip-bot2 for Zhen Lei 2020-09-24 7:17 ` Zhen Lei [this message] 2020-09-24 7:17 ` [PATCH v6 5/6] dt-bindings: dw-apb-ictl: convert to json-schema Zhen Lei 2020-09-27 9:53 ` Leizhen (ThunderTown) 2020-09-27 9:53 ` Leizhen (ThunderTown) 2020-09-28 18:26 ` Rob Herring 2020-09-28 18:26 ` Rob Herring 2020-09-29 1:37 ` Leizhen (ThunderTown) 2020-09-29 1:37 ` Leizhen (ThunderTown) 2020-09-24 7:17 ` [PATCH v6 6/6] ARC: [dts] fix the errors detected by dtbs_check Zhen Lei 2020-09-24 7:17 ` Zhen Lei 2020-09-28 18:32 ` Vineet Gupta 2020-09-28 18:32 ` Vineet Gupta 2020-09-25 15:54 ` [PATCH v6 0/6] irqchip: dw-apb-ictl: support hierarchy irq domain Marc Zyngier 2020-09-25 15:54 ` Marc Zyngier 2020-09-27 6:49 ` Leizhen (ThunderTown) 2020-09-27 6:49 ` Leizhen (ThunderTown)
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20200924071754.4509-6-thunder.leizhen@huawei.com \ --to=thunder.leizhen@huawei.com \ --cc=abrodkin@synopsys.com \ --cc=devicetree@vger.kernel.org \ --cc=huawei.libin@huawei.com \ --cc=jason@lakedaemon.net \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-snps-arc@lists.infradead.org \ --cc=lvhaoyu@huawei.com \ --cc=maz@kernel.org \ --cc=robh+dt@kernel.org \ --cc=sebastian.hesselbarth@gmail.com \ --cc=tglx@linutronix.de \ --cc=vgupta@synopsys.com \ --cc=wangkefeng.wang@huawei.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.