From: Peter Ujfalusi <peter.ujfalusi@ti.com> To: <vkoul@kernel.org>, <nm@ti.com>, <ssantosh@kernel.org>, <robh+dt@kernel.org>, <vigneshr@ti.com> Cc: <dan.j.williams@intel.com>, <t-kristo@ti.com>, <lokeshvutla@ti.com>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, <dmaengine@vger.kernel.org> Subject: [PATCH 10/18] dt-bindings: dma: ti: Add document for K3 PKTDMA Date: Wed, 30 Sep 2020 12:14:04 +0300 [thread overview] Message-ID: <20200930091412.8020-11-peter.ujfalusi@ti.com> (raw) In-Reply-To: <20200930091412.8020-1-peter.ujfalusi@ti.com> New binding document for Texas Instruments K3 Packet DMA (PKTDMA). PKTDMA is introduced as part of AM64. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> --- .../devicetree/bindings/dma/ti/k3-pktdma.yaml | 189 ++++++++++++++++++ 1 file changed, 189 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml diff --git a/Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml b/Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml new file mode 100644 index 000000000000..75b35bd85830 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml @@ -0,0 +1,189 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/ti/k3-pktdma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments K3 DMSS PKTDMA Device Tree Bindings + +maintainers: + - Peter Ujfalusi <peter.ujfalusi@ti.com> + +description: | + The Packet DMA (PKTDMA) is intended to perform similar functions as the packet + mode channels of K3 UDMA-P. + PKTDMA only includes Split channels to service PSI-L based peripherals. + + The peripherals can be PSI-L native or legacy, non PSI-L native peripherals + with PDMAs. PDMA is tasked to act as a bridge between the PSI-L fabric and the + legacy peripheral. + + PDMAs can be configured via PKTDMA split channel's peer registers to match + with the configuration of the legacy peripheral. + +allOf: + - $ref: /schemas/dma/dma-controller.yaml# + +properties: + "#dma-cells": + const: 2 + description: | + The first cell is the PSI-L thread ID of the remote (to PKTDMA) end. + Valid ranges for thread ID depends on the data movement direction: + for source thread IDs (rx): 0 - 0x7fff + for destination thread IDs (tx): 0x8000 - 0xffff + + Please refer to the device documentation for the PSI-L thread map and also + the PSI-L peripheral chapter for the correct thread ID. + + The second cell is the ASEL value for the channel + + compatible: + enum: + - ti,am64-dmss-pktdma + + "#address-cells": + const: 2 + + "#size-cells": + const: 2 + + reg: + maxItems: 4 + + reg-names: + items: + - const: gcfg + - const: rchanrt + - const: tchanrt + - const: ringrt + + msi-parent: true + + ti,sci: + description: phandle to TI-SCI compatible System controller node + allOf: + - $ref: /schemas/types.yaml#/definitions/phandle + + ti,sci-dev-id: + description: TI-SCI device id of PKTDMA + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + + ti,sci-rm-range-tchan: + description: | + Array of PKTDMA split tx channel resource subtypes for resource allocation + for this host + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + # Should be enough + maxItems: 255 + + ti,sci-rm-range-tflow: + description: | + Array of PKTDMA split tx flow resource subtypes for resource allocation + for this host + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + # Should be enough + maxItems: 255 + + ti,sci-rm-range-rchan: + description: | + Array of PKTDMA split rx channel resource subtypes for resource allocation + for this host + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + # Should be enough + maxItems: 255 + + ti,sci-rm-range-rflow: + description: | + Array of PKTDMA split rx flow resource subtypes for resource allocation + for this host + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + # Should be enough + maxItems: 255 + +required: + - compatible + - "#address-cells" + - "#size-cells" + - "#dma-cells" + - reg + - reg-names + - msi-parent + - ti,sci + - ti,sci-dev-id + - ti,sci-rm-range-tchan + - ti,sci-rm-range-tflow + - ti,sci-rm-range-rchan + - ti,sci-rm-range-rflow + +additionalProperties: false + +examples: + - |+ + cbass_main { + #address-cells = <2>; + #size-cells = <2>; + + main_dmss { + compatible = "simple-mfd"; + #address-cells = <2>; + #size-cells = <2>; + dma-ranges; + ranges; + + ti,sci-dev-id = <25>; + + main_pktdma: dma-controller@485c0000 { + compatible = "ti,am64-dmss-pktdma"; + #address-cells = <2>; + #size-cells = <2>; + + reg = <0x0 0x485c0000 0x0 0x100>, + <0x0 0x4a800000 0x0 0x20000>, + <0x0 0x4aa00000 0x0 0x40000>, + <0x0 0x4b800000 0x0 0x400000>; + reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt"; + msi-parent = <&inta_main_dmss>; + #dma-cells = <2>; + + ti,sci = <&dmsc>; + ti,sci-dev-id = <30>; + + ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */ + <0x24>, /* CPSW_TX_CHAN */ + <0x25>, /* SAUL_TX_0_CHAN */ + <0x26>, /* SAUL_TX_1_CHAN */ + <0x27>, /* ICSSG_0_TX_CHAN */ + <0x28>; /* ICSSG_1_TX_CHAN */ + ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */ + <0x11>, /* RING_CPSW_TX_CHAN */ + <0x12>, /* RING_SAUL_TX_0_CHAN */ + <0x13>, /* RING_SAUL_TX_1_CHAN */ + <0x14>, /* RING_ICSSG_0_TX_CHAN */ + <0x15>; /* RING_ICSSG_1_TX_CHAN */ + ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */ + <0x2b>, /* CPSW_RX_CHAN */ + <0x2d>, /* SAUL_RX_0_CHAN */ + <0x2f>, /* SAUL_RX_1_CHAN */ + <0x31>, /* SAUL_RX_2_CHAN */ + <0x33>, /* SAUL_RX_3_CHAN */ + <0x35>, /* ICSSG_0_RX_CHAN */ + <0x37>; /* ICSSG_1_RX_CHAN */ + ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */ + <0x2c>, /* FLOW_CPSW_RX_CHAN */ + <0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */ + <0x32>, /* FLOW_SAUL_RX_2/3_CHAN */ + <0x36>, /* FLOW_ICSSG_0_RX_CHAN */ + <0x38>; /* FLOW_ICSSG_1_RX_CHAN */ + }; + }; + }; -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
WARNING: multiple messages have this Message-ID (diff)
From: Peter Ujfalusi <peter.ujfalusi@ti.com> To: <vkoul@kernel.org>, <nm@ti.com>, <ssantosh@kernel.org>, <robh+dt@kernel.org>, <vigneshr@ti.com> Cc: devicetree@vger.kernel.org, lokeshvutla@ti.com, linux-kernel@vger.kernel.org, t-kristo@ti.com, dmaengine@vger.kernel.org, dan.j.williams@intel.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH 10/18] dt-bindings: dma: ti: Add document for K3 PKTDMA Date: Wed, 30 Sep 2020 12:14:04 +0300 [thread overview] Message-ID: <20200930091412.8020-11-peter.ujfalusi@ti.com> (raw) In-Reply-To: <20200930091412.8020-1-peter.ujfalusi@ti.com> New binding document for Texas Instruments K3 Packet DMA (PKTDMA). PKTDMA is introduced as part of AM64. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> --- .../devicetree/bindings/dma/ti/k3-pktdma.yaml | 189 ++++++++++++++++++ 1 file changed, 189 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml diff --git a/Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml b/Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml new file mode 100644 index 000000000000..75b35bd85830 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml @@ -0,0 +1,189 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/ti/k3-pktdma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments K3 DMSS PKTDMA Device Tree Bindings + +maintainers: + - Peter Ujfalusi <peter.ujfalusi@ti.com> + +description: | + The Packet DMA (PKTDMA) is intended to perform similar functions as the packet + mode channels of K3 UDMA-P. + PKTDMA only includes Split channels to service PSI-L based peripherals. + + The peripherals can be PSI-L native or legacy, non PSI-L native peripherals + with PDMAs. PDMA is tasked to act as a bridge between the PSI-L fabric and the + legacy peripheral. + + PDMAs can be configured via PKTDMA split channel's peer registers to match + with the configuration of the legacy peripheral. + +allOf: + - $ref: /schemas/dma/dma-controller.yaml# + +properties: + "#dma-cells": + const: 2 + description: | + The first cell is the PSI-L thread ID of the remote (to PKTDMA) end. + Valid ranges for thread ID depends on the data movement direction: + for source thread IDs (rx): 0 - 0x7fff + for destination thread IDs (tx): 0x8000 - 0xffff + + Please refer to the device documentation for the PSI-L thread map and also + the PSI-L peripheral chapter for the correct thread ID. + + The second cell is the ASEL value for the channel + + compatible: + enum: + - ti,am64-dmss-pktdma + + "#address-cells": + const: 2 + + "#size-cells": + const: 2 + + reg: + maxItems: 4 + + reg-names: + items: + - const: gcfg + - const: rchanrt + - const: tchanrt + - const: ringrt + + msi-parent: true + + ti,sci: + description: phandle to TI-SCI compatible System controller node + allOf: + - $ref: /schemas/types.yaml#/definitions/phandle + + ti,sci-dev-id: + description: TI-SCI device id of PKTDMA + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + + ti,sci-rm-range-tchan: + description: | + Array of PKTDMA split tx channel resource subtypes for resource allocation + for this host + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + # Should be enough + maxItems: 255 + + ti,sci-rm-range-tflow: + description: | + Array of PKTDMA split tx flow resource subtypes for resource allocation + for this host + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + # Should be enough + maxItems: 255 + + ti,sci-rm-range-rchan: + description: | + Array of PKTDMA split rx channel resource subtypes for resource allocation + for this host + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + # Should be enough + maxItems: 255 + + ti,sci-rm-range-rflow: + description: | + Array of PKTDMA split rx flow resource subtypes for resource allocation + for this host + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + # Should be enough + maxItems: 255 + +required: + - compatible + - "#address-cells" + - "#size-cells" + - "#dma-cells" + - reg + - reg-names + - msi-parent + - ti,sci + - ti,sci-dev-id + - ti,sci-rm-range-tchan + - ti,sci-rm-range-tflow + - ti,sci-rm-range-rchan + - ti,sci-rm-range-rflow + +additionalProperties: false + +examples: + - |+ + cbass_main { + #address-cells = <2>; + #size-cells = <2>; + + main_dmss { + compatible = "simple-mfd"; + #address-cells = <2>; + #size-cells = <2>; + dma-ranges; + ranges; + + ti,sci-dev-id = <25>; + + main_pktdma: dma-controller@485c0000 { + compatible = "ti,am64-dmss-pktdma"; + #address-cells = <2>; + #size-cells = <2>; + + reg = <0x0 0x485c0000 0x0 0x100>, + <0x0 0x4a800000 0x0 0x20000>, + <0x0 0x4aa00000 0x0 0x40000>, + <0x0 0x4b800000 0x0 0x400000>; + reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt"; + msi-parent = <&inta_main_dmss>; + #dma-cells = <2>; + + ti,sci = <&dmsc>; + ti,sci-dev-id = <30>; + + ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */ + <0x24>, /* CPSW_TX_CHAN */ + <0x25>, /* SAUL_TX_0_CHAN */ + <0x26>, /* SAUL_TX_1_CHAN */ + <0x27>, /* ICSSG_0_TX_CHAN */ + <0x28>; /* ICSSG_1_TX_CHAN */ + ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */ + <0x11>, /* RING_CPSW_TX_CHAN */ + <0x12>, /* RING_SAUL_TX_0_CHAN */ + <0x13>, /* RING_SAUL_TX_1_CHAN */ + <0x14>, /* RING_ICSSG_0_TX_CHAN */ + <0x15>; /* RING_ICSSG_1_TX_CHAN */ + ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */ + <0x2b>, /* CPSW_RX_CHAN */ + <0x2d>, /* SAUL_RX_0_CHAN */ + <0x2f>, /* SAUL_RX_1_CHAN */ + <0x31>, /* SAUL_RX_2_CHAN */ + <0x33>, /* SAUL_RX_3_CHAN */ + <0x35>, /* ICSSG_0_RX_CHAN */ + <0x37>; /* ICSSG_1_RX_CHAN */ + ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */ + <0x2c>, /* FLOW_CPSW_RX_CHAN */ + <0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */ + <0x32>, /* FLOW_SAUL_RX_2/3_CHAN */ + <0x36>, /* FLOW_ICSSG_0_RX_CHAN */ + <0x38>; /* FLOW_ICSSG_1_RX_CHAN */ + }; + }; + }; -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-09-30 9:14 UTC|newest] Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-09-30 9:13 [PATCH 00/18] dmaengine/soc: k3-udma: Add support for BCDMA and PKTDMA Peter Ujfalusi 2020-09-30 9:13 ` Peter Ujfalusi 2020-09-30 9:13 ` [PATCH 01/18] dmaengine: of-dma: Add support for optional router configuration callback Peter Ujfalusi 2020-09-30 9:13 ` Peter Ujfalusi 2020-10-07 5:44 ` Vinod Koul 2020-10-07 5:44 ` Vinod Koul 2020-10-07 8:08 ` Peter Ujfalusi 2020-10-07 8:08 ` Peter Ujfalusi 2020-10-07 15:55 ` Vinod Koul 2020-10-07 15:55 ` Vinod Koul 2020-10-08 6:41 ` Peter Ujfalusi 2020-10-08 6:41 ` Peter Ujfalusi 2020-10-28 5:55 ` Vinod Koul 2020-10-28 5:55 ` Vinod Koul 2020-10-28 9:56 ` Peter Ujfalusi 2020-10-28 9:56 ` Peter Ujfalusi 2020-11-09 11:45 ` Vinod Koul 2020-11-09 11:45 ` Vinod Koul 2020-11-09 12:09 ` Peter Ujfalusi 2020-11-09 12:09 ` Peter Ujfalusi 2020-11-09 12:23 ` Vinod Koul 2020-11-09 12:23 ` Vinod Koul 2020-11-09 12:36 ` Peter Ujfalusi 2020-11-09 12:36 ` Peter Ujfalusi 2020-09-30 9:13 ` [PATCH 02/18] dmaengine: Add support for per channel coherency handling Peter Ujfalusi 2020-09-30 9:13 ` Peter Ujfalusi 2020-09-30 9:13 ` [PATCH 03/18] dmaengine: doc: client: Update for dmaengine_get_dma_device() usage Peter Ujfalusi 2020-09-30 9:13 ` Peter Ujfalusi 2020-09-30 9:13 ` [PATCH 04/18] dmaengine: dmatest: Use dmaengine_get_dma_device Peter Ujfalusi 2020-09-30 9:13 ` Peter Ujfalusi 2020-09-30 9:13 ` [PATCH 05/18] dmaengine: ti: k3-udma: Wait for peer teardown completion if supported Peter Ujfalusi 2020-09-30 9:13 ` Peter Ujfalusi 2020-09-30 9:14 ` [PATCH 06/18] dmaengine: ti: k3-udma: Add support for second resource range from sysfw Peter Ujfalusi 2020-09-30 9:14 ` Peter Ujfalusi 2020-09-30 9:14 ` [PATCH 07/18] dmaengine: ti: k3-udma-glue: Add function to get device pointer for DMA API Peter Ujfalusi 2020-09-30 9:14 ` Peter Ujfalusi 2020-10-07 6:53 ` Vinod Koul 2020-10-07 6:53 ` Vinod Koul 2020-10-07 8:22 ` Peter Ujfalusi 2020-10-07 8:22 ` Peter Ujfalusi 2020-09-30 9:14 ` [PATCH 08/18] dmaengine: ti: k3-udma-glue: Configure the dma_dev for rings Peter Ujfalusi 2020-09-30 9:14 ` Peter Ujfalusi 2020-09-30 9:14 ` [PATCH 09/18] dt-bindings: dma: ti: Add document for K3 BCDMA Peter Ujfalusi 2020-09-30 9:14 ` Peter Ujfalusi 2020-10-01 6:49 ` Peter Ujfalusi 2020-10-01 6:49 ` Peter Ujfalusi 2020-10-06 19:23 ` Rob Herring 2020-10-06 19:23 ` Rob Herring 2020-10-06 19:29 ` Rob Herring 2020-10-06 19:29 ` Rob Herring 2020-10-07 9:09 ` Peter Ujfalusi 2020-10-07 9:09 ` Peter Ujfalusi 2020-10-07 15:46 ` Rob Herring 2020-10-07 15:46 ` Rob Herring 2020-10-08 8:40 ` Peter Ujfalusi 2020-10-08 8:40 ` Peter Ujfalusi 2020-10-08 19:15 ` Rob Herring 2020-10-08 19:15 ` Rob Herring 2020-10-09 8:06 ` Peter Ujfalusi 2020-10-09 8:06 ` Peter Ujfalusi 2020-09-30 9:14 ` Peter Ujfalusi [this message] 2020-09-30 9:14 ` [PATCH 10/18] dt-bindings: dma: ti: Add document for K3 PKTDMA Peter Ujfalusi 2020-09-30 9:14 ` [PATCH 11/18] dmaengine: ti: k3-psil: Extend psil_endpoint_config " Peter Ujfalusi 2020-09-30 9:14 ` Peter Ujfalusi 2020-09-30 9:14 ` [PATCH 12/18] dmaengine: ti: k3-psil: Add initial map for AM64 Peter Ujfalusi 2020-09-30 9:14 ` Peter Ujfalusi 2020-09-30 9:14 ` [PATCH 13/18] dmaengine: ti: Add support for k3 event routers Peter Ujfalusi 2020-09-30 9:14 ` Peter Ujfalusi 2020-09-30 9:14 ` [PATCH 14/18] soc: ti: k3-ringacc: add AM64 DMA rings support Peter Ujfalusi 2020-09-30 9:14 ` Peter Ujfalusi 2020-09-30 9:14 ` [PATCH 15/18] dmaengine: ti: k3-udma: Initial support for K3 BCDMA Peter Ujfalusi 2020-09-30 9:14 ` Peter Ujfalusi 2020-09-30 9:14 ` [PATCH 16/18] dmaengine: ti: k3-udma: Add support for BCDMA channel TPL handling Peter Ujfalusi 2020-09-30 9:14 ` Peter Ujfalusi 2020-09-30 9:14 ` [PATCH 17/18] dmaengine: ti: k3-udma: Initial support for K3 PKTDMA Peter Ujfalusi 2020-09-30 9:14 ` Peter Ujfalusi 2020-09-30 9:14 ` [PATCH 18/18] dmaengine: ti: k3-udma-glue: Add " Peter Ujfalusi 2020-09-30 9:14 ` Peter Ujfalusi 2020-09-30 10:17 ` [PATCH 00/18] dmaengine/soc: k3-udma: Add support for BCDMA and PKTDMA Peter Ujfalusi 2020-09-30 10:17 ` Peter Ujfalusi
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