From: Ira Weiny <ira.weiny@intel.com> To: Peter Zijlstra <peterz@infradead.org> Cc: Dave Hansen <dave.hansen@intel.com>, Thomas Gleixner <tglx@linutronix.de>, Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>, Andy Lutomirski <luto@kernel.org>, Fenghua Yu <fenghua.yu@intel.com>, x86@kernel.org, Dave Hansen <dave.hansen@linux.intel.com>, Andrew Morton <akpm@linux-foundation.org>, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-nvdimm@lists.01.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org Subject: Re: [PATCH RFC V3 4/9] x86/pks: Preserve the PKRS MSR on context switch Date: Fri, 16 Oct 2020 22:14:10 -0700 [thread overview] Message-ID: <20201017051410.GW2046448@iweiny-DESK2.sc.intel.com> (raw) In-Reply-To: <20201016111226.GN2611@hirez.programming.kicks-ass.net> On Fri, Oct 16, 2020 at 01:12:26PM +0200, Peter Zijlstra wrote: > On Tue, Oct 13, 2020 at 11:31:45AM -0700, Dave Hansen wrote: > > > +/** > > > + * It should also be noted that the underlying WRMSR(MSR_IA32_PKRS) is not > > > + * serializing but still maintains ordering properties similar to WRPKRU. > > > + * The current SDM section on PKRS needs updating but should be the same as > > > + * that of WRPKRU. So to quote from the WRPKRU text: > > > + * > > > + * WRPKRU will never execute transiently. Memory accesses > > > + * affected by PKRU register will not execute (even transiently) > > > + * until all prior executions of WRPKRU have completed execution > > > + * and updated the PKRU register. > > > + */ > > > +void write_pkrs(u32 new_pkrs) > > > +{ > > > + u32 *pkrs; > > > + > > > + if (!static_cpu_has(X86_FEATURE_PKS)) > > > + return; > > > + > > > + pkrs = get_cpu_ptr(&pkrs_cache); > > > + if (*pkrs != new_pkrs) { > > > + *pkrs = new_pkrs; > > > + wrmsrl(MSR_IA32_PKRS, new_pkrs); > > > + } > > > + put_cpu_ptr(pkrs); > > > +} > > > > > > > It bugs me a *bit* that this is being called in a preempt-disabled > > region, but we still bother with the get/put_cpu jazz. Are there other > > future call-sites for this that aren't in preempt-disabled regions? > > So the previous version had a useful comment that got lost. Ok Looking back I see what happened... This comment... /* * PKRS is only temporarily changed during specific code paths. * Only a preemption during these windows away from the default * value would require updating the MSR. */ ... was added to pks_sched_in() but that got simplified down because cleaning up write_pkrs() made the code there obsolete. > This stuff > needs to fundamentally be preempt disabled, I agree, the update to the percpu cache value and MSR can not be torn. > so it either needs to > explicitly do so, or have an assertion that preemption is indeed > disabled. However, I don't think I understand clearly. Doesn't [get|put]_cpu_ptr() handle the preempt_disable() for us? Is it not sufficient to rely on that? Dave's comment seems to be the opposite where we need to eliminate preempt disable before calling write_pkrs(). FWIW I think I'm mistaken in my response to Dave regarding the preempt_disable() in pks_update_protection(). Ira _______________________________________________ Linux-nvdimm mailing list -- linux-nvdimm@lists.01.org To unsubscribe send an email to linux-nvdimm-leave@lists.01.org
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From: Ira Weiny <ira.weiny@intel.com> To: Peter Zijlstra <peterz@infradead.org> Cc: Dave Hansen <dave.hansen@intel.com>, Thomas Gleixner <tglx@linutronix.de>, Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>, Andy Lutomirski <luto@kernel.org>, Fenghua Yu <fenghua.yu@intel.com>, x86@kernel.org, Dave Hansen <dave.hansen@linux.intel.com>, Dan Williams <dan.j.williams@intel.com>, Andrew Morton <akpm@linux-foundation.org>, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-nvdimm@lists.01.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org Subject: Re: [PATCH RFC V3 4/9] x86/pks: Preserve the PKRS MSR on context switch Date: Fri, 16 Oct 2020 22:14:10 -0700 [thread overview] Message-ID: <20201017051410.GW2046448@iweiny-DESK2.sc.intel.com> (raw) In-Reply-To: <20201016111226.GN2611@hirez.programming.kicks-ass.net> On Fri, Oct 16, 2020 at 01:12:26PM +0200, Peter Zijlstra wrote: > On Tue, Oct 13, 2020 at 11:31:45AM -0700, Dave Hansen wrote: > > > +/** > > > + * It should also be noted that the underlying WRMSR(MSR_IA32_PKRS) is not > > > + * serializing but still maintains ordering properties similar to WRPKRU. > > > + * The current SDM section on PKRS needs updating but should be the same as > > > + * that of WRPKRU. So to quote from the WRPKRU text: > > > + * > > > + * WRPKRU will never execute transiently. Memory accesses > > > + * affected by PKRU register will not execute (even transiently) > > > + * until all prior executions of WRPKRU have completed execution > > > + * and updated the PKRU register. > > > + */ > > > +void write_pkrs(u32 new_pkrs) > > > +{ > > > + u32 *pkrs; > > > + > > > + if (!static_cpu_has(X86_FEATURE_PKS)) > > > + return; > > > + > > > + pkrs = get_cpu_ptr(&pkrs_cache); > > > + if (*pkrs != new_pkrs) { > > > + *pkrs = new_pkrs; > > > + wrmsrl(MSR_IA32_PKRS, new_pkrs); > > > + } > > > + put_cpu_ptr(pkrs); > > > +} > > > > > > > It bugs me a *bit* that this is being called in a preempt-disabled > > region, but we still bother with the get/put_cpu jazz. Are there other > > future call-sites for this that aren't in preempt-disabled regions? > > So the previous version had a useful comment that got lost. Ok Looking back I see what happened... This comment... /* * PKRS is only temporarily changed during specific code paths. * Only a preemption during these windows away from the default * value would require updating the MSR. */ ... was added to pks_sched_in() but that got simplified down because cleaning up write_pkrs() made the code there obsolete. > This stuff > needs to fundamentally be preempt disabled, I agree, the update to the percpu cache value and MSR can not be torn. > so it either needs to > explicitly do so, or have an assertion that preemption is indeed > disabled. However, I don't think I understand clearly. Doesn't [get|put]_cpu_ptr() handle the preempt_disable() for us? Is it not sufficient to rely on that? Dave's comment seems to be the opposite where we need to eliminate preempt disable before calling write_pkrs(). FWIW I think I'm mistaken in my response to Dave regarding the preempt_disable() in pks_update_protection(). Ira
next prev parent reply other threads:[~2020-10-17 5:14 UTC|newest] Thread overview: 94+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-10-09 19:42 [PATCH RFC V3 0/9] PKS: Add Protection Keys Supervisor (PKS) support RFC v3 ira.weiny 2020-10-09 19:42 ` ira.weiny 2020-10-09 19:42 ` [PATCH RFC V3 1/9] x86/pkeys: Create pkeys_common.h ira.weiny 2020-10-09 19:42 ` ira.weiny 2020-10-13 17:46 ` Dave Hansen 2020-10-13 17:46 ` Dave Hansen 2020-10-13 19:44 ` Ira Weiny 2020-10-13 19:44 ` Ira Weiny 2020-10-09 19:42 ` [PATCH RFC V3 2/9] x86/fpu: Refactor arch_set_user_pkey_access() for PKS support ira.weiny 2020-10-09 19:42 ` ira.weiny 2020-10-13 17:50 ` Dave Hansen 2020-10-13 17:50 ` Dave Hansen 2020-10-13 23:56 ` Ira Weiny 2020-10-13 23:56 ` Ira Weiny 2020-10-16 10:57 ` Peter Zijlstra 2020-10-16 10:57 ` Peter Zijlstra 2020-10-17 3:32 ` Ira Weiny 2020-10-17 3:32 ` Ira Weiny 2020-10-19 9:35 ` Peter Zijlstra 2020-10-19 9:35 ` Peter Zijlstra 2020-10-09 19:42 ` [PATCH RFC V3 3/9] x86/pks: Enable Protection Keys Supervisor (PKS) ira.weiny 2020-10-09 19:42 ` ira.weiny 2020-10-13 18:23 ` Dave Hansen 2020-10-13 18:23 ` Dave Hansen 2020-10-14 2:08 ` Ira Weiny 2020-10-14 2:08 ` Ira Weiny 2020-10-09 19:42 ` [PATCH RFC V3 4/9] x86/pks: Preserve the PKRS MSR on context switch ira.weiny 2020-10-09 19:42 ` ira.weiny 2020-10-13 18:31 ` Dave Hansen 2020-10-13 18:31 ` Dave Hansen 2020-10-14 22:36 ` Ira Weiny 2020-10-14 22:36 ` Ira Weiny 2020-10-16 11:12 ` Peter Zijlstra 2020-10-16 11:12 ` Peter Zijlstra 2020-10-17 5:14 ` Ira Weiny [this message] 2020-10-17 5:14 ` Ira Weiny 2020-10-19 9:37 ` Peter Zijlstra 2020-10-19 9:37 ` Peter Zijlstra 2020-10-19 18:48 ` Ira Weiny 2020-10-19 18:48 ` Ira Weiny 2020-10-16 11:06 ` Peter Zijlstra 2020-10-16 11:06 ` Peter Zijlstra 2020-10-17 5:37 ` Ira Weiny 2020-10-17 5:37 ` Ira Weiny 2020-10-09 19:42 ` [PATCH RFC V3 5/9] x86/pks: Add PKS kernel API ira.weiny 2020-10-09 19:42 ` ira.weiny 2020-10-13 18:43 ` Dave Hansen 2020-10-13 18:43 ` Dave Hansen 2020-10-15 1:08 ` Ira Weiny 2020-10-15 1:08 ` Ira Weiny 2020-10-16 11:07 ` Peter Zijlstra 2020-10-16 11:07 ` Peter Zijlstra 2020-10-17 5:42 ` Ira Weiny 2020-10-17 5:42 ` Ira Weiny 2020-10-09 19:42 ` [PATCH RFC V3 6/9] x86/entry: Pass irqentry_state_t by reference ira.weiny 2020-10-09 19:42 ` ira.weiny 2020-10-16 11:45 ` Peter Zijlstra 2020-10-16 11:45 ` Peter Zijlstra 2020-10-16 12:55 ` Thomas Gleixner 2020-10-16 12:55 ` Thomas Gleixner 2020-10-19 5:37 ` Ira Weiny 2020-10-19 5:37 ` Ira Weiny 2020-10-19 9:32 ` Thomas Gleixner 2020-10-19 9:32 ` Thomas Gleixner 2020-10-19 20:26 ` Ira Weiny 2020-10-19 20:26 ` Ira Weiny 2020-10-19 21:12 ` Thomas Gleixner 2020-10-19 21:12 ` Thomas Gleixner 2020-10-20 14:10 ` Ira Weiny 2020-10-20 14:10 ` Ira Weiny 2020-10-09 19:42 ` [PATCH RFC V3 7/9] x86/entry: Preserve PKRS MSR across exceptions ira.weiny 2020-10-09 19:42 ` ira.weiny 2020-10-13 18:52 ` Dave Hansen 2020-10-13 18:52 ` Dave Hansen 2020-10-15 3:46 ` Ira Weiny 2020-10-15 3:46 ` Ira Weiny 2020-10-15 4:06 ` Dave Hansen 2020-10-15 4:06 ` Dave Hansen 2020-10-15 4:18 ` Ira Weiny 2020-10-15 4:18 ` Ira Weiny 2020-10-09 19:42 ` [PATCH RFC V3 8/9] x86/fault: Report the PKRS state on fault ira.weiny 2020-10-09 19:42 ` ira.weiny 2020-10-13 18:56 ` Dave Hansen 2020-10-13 18:56 ` Dave Hansen 2020-10-15 4:13 ` Ira Weiny 2020-10-15 4:13 ` Ira Weiny 2020-10-09 19:42 ` [PATCH RFC V3 9/9] x86/pks: Add PKS test code ira.weiny 2020-10-09 19:42 ` ira.weiny 2020-10-13 19:02 ` Dave Hansen 2020-10-13 19:02 ` Dave Hansen 2020-10-15 4:46 ` Ira Weiny 2020-10-15 4:46 ` Ira Weiny 2020-10-09 20:18 ` [PATCH RFC V3 0/9] PKS: Add Protection Keys Supervisor (PKS) support RFC v3 Ira Weiny 2020-10-09 20:18 ` Ira Weiny
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