From: Anshuman Gupta <anshuman.gupta@intel.com> To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: jani.nikula@intel.com, seanpaul@chromium.org, juston.li@intel.com, Anshuman Gupta <anshuman.gupta@intel.com> Subject: [PATCH v2 06/15] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support Date: Tue, 20 Oct 2020 19:08:57 +0530 [thread overview] Message-ID: <20201020133906.23710-7-anshuman.gupta@intel.com> (raw) In-Reply-To: <20201020133906.23710-1-anshuman.gupta@intel.com> Enable HDCP 1.4 over DP MST for Gen12. This also enable the stream encryption support for older generations, which was missing earlier. v2: - Added debug print for stream encryption. - Disable the hdcp on port after disabling last stream encryption. Cc: Ramalingam C <ramalingam.c@intel.com> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 10 ++--- drivers/gpu/drm/i915/display/intel_hdcp.c | 46 ++++++++++++++------- 2 files changed, 35 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 23da9902c300..5a6dd35c1663 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -826,13 +826,9 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo intel_attach_force_audio_property(connector); intel_attach_broadcast_rgb_property(connector); - - /* TODO: Figure out how to make HDCP work on GEN12+ */ - if (INTEL_GEN(dev_priv) < 12) { - ret = intel_dp_init_hdcp(dig_port, intel_connector); - if (ret) - DRM_DEBUG_KMS("HDCP init failed, skipping.\n"); - } + ret = intel_dp_init_hdcp(dig_port, intel_connector); + if (ret) + drm_dbg_kms(&dev_priv->drm, "HDCP init failed, skipping.\n"); /* * Reuse the prop from the SST connector because we're diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c index ff9c13bc544b..636e08b3c0ac 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c @@ -612,7 +612,12 @@ int intel_hdcp_auth_downstream(struct intel_connector *connector) return ret; } -/* Implements Part 1 of the HDCP authorization procedure */ +/* + * Implements Part 1 of the HDCP authorization procedure. + * Authentication Part 1 steps for Multi-stream DisplayPort. + * Step 1. Auth Part 1 sequence on the driving MST Trasport Link. + * Step 2. Enable encryption for each stream that requires encryption. + */ static int intel_hdcp_auth(struct intel_connector *connector) { struct intel_digital_port *dig_port = intel_attached_dig_port(connector); @@ -766,10 +771,16 @@ static int intel_hdcp_auth(struct intel_connector *connector) return -ETIMEDOUT; } - /* - * XXX: If we have MST-connected devices, we need to enable encryption - * on those as well. - */ + /* DP MST Auth Part 1 Step 2.a and Step 2.b */ + if (shim->stream_encryption) { + ret = shim->stream_encryption(dig_port, true); + if (ret) { + drm_err(&dev_priv->drm, "Failed to enable HDCP 1.4 stream enc\n"); + return ret; + } + drm_dbg_kms(&dev_priv->drm, "HDCP 1.4 tras %s stream encrypted\n", + transcoder_name(hdcp->stream_transcoder)); + } if (repeater_present) return intel_hdcp_auth_downstream(connector); @@ -790,19 +801,26 @@ static int _intel_hdcp_disable(struct intel_connector *connector) drm_dbg_kms(&dev_priv->drm, "[%s:%d] HDCP is being disabled...\n", connector->base.name, connector->base.base.id); + /* + * Step 1: Deselect HDCP Multiplestream Bit. + * Step 2: poll for stream encryption status to be disable. + */ + if (hdcp->shim->stream_encryption) { + ret = hdcp->shim->stream_encryption(dig_port, false); + if (ret) { + drm_err(&dev_priv->drm, "Failed to disable HDCP 1.4 stream enc\n"); + return ret; + } + drm_dbg_kms(&dev_priv->drm, "HDCP 1.4 trans %s stream encryption disabled\n", + transcoder_name(hdcp->stream_transcoder)); + } /* - * If there are other connectors on this port using HDCP, don't disable - * it. Instead, toggle the HDCP signalling off on that particular - * connector/pipe and exit. + * If there are other connectors on this port using HDCP, don't disable it. + * Repeat steps 1-2 for each stream that no longer requires encryption. */ - if (dig_port->num_hdcp_streams > 0) { - ret = hdcp->shim->toggle_signalling(dig_port, - cpu_transcoder, false); - if (ret) - DRM_ERROR("Failed to disable HDCP signalling\n"); + if (dig_port->num_hdcp_streams > 0) return ret; - } hdcp->hdcp_encrypted = false; intel_de_write(dev_priv, HDCP_CONF(dev_priv, cpu_transcoder, port), 0); -- 2.26.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
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From: Anshuman Gupta <anshuman.gupta@intel.com> To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: jani.nikula@intel.com, seanpaul@chromium.org Subject: [Intel-gfx] [PATCH v2 06/15] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support Date: Tue, 20 Oct 2020 19:08:57 +0530 [thread overview] Message-ID: <20201020133906.23710-7-anshuman.gupta@intel.com> (raw) In-Reply-To: <20201020133906.23710-1-anshuman.gupta@intel.com> Enable HDCP 1.4 over DP MST for Gen12. This also enable the stream encryption support for older generations, which was missing earlier. v2: - Added debug print for stream encryption. - Disable the hdcp on port after disabling last stream encryption. Cc: Ramalingam C <ramalingam.c@intel.com> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 10 ++--- drivers/gpu/drm/i915/display/intel_hdcp.c | 46 ++++++++++++++------- 2 files changed, 35 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 23da9902c300..5a6dd35c1663 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -826,13 +826,9 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo intel_attach_force_audio_property(connector); intel_attach_broadcast_rgb_property(connector); - - /* TODO: Figure out how to make HDCP work on GEN12+ */ - if (INTEL_GEN(dev_priv) < 12) { - ret = intel_dp_init_hdcp(dig_port, intel_connector); - if (ret) - DRM_DEBUG_KMS("HDCP init failed, skipping.\n"); - } + ret = intel_dp_init_hdcp(dig_port, intel_connector); + if (ret) + drm_dbg_kms(&dev_priv->drm, "HDCP init failed, skipping.\n"); /* * Reuse the prop from the SST connector because we're diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c index ff9c13bc544b..636e08b3c0ac 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c @@ -612,7 +612,12 @@ int intel_hdcp_auth_downstream(struct intel_connector *connector) return ret; } -/* Implements Part 1 of the HDCP authorization procedure */ +/* + * Implements Part 1 of the HDCP authorization procedure. + * Authentication Part 1 steps for Multi-stream DisplayPort. + * Step 1. Auth Part 1 sequence on the driving MST Trasport Link. + * Step 2. Enable encryption for each stream that requires encryption. + */ static int intel_hdcp_auth(struct intel_connector *connector) { struct intel_digital_port *dig_port = intel_attached_dig_port(connector); @@ -766,10 +771,16 @@ static int intel_hdcp_auth(struct intel_connector *connector) return -ETIMEDOUT; } - /* - * XXX: If we have MST-connected devices, we need to enable encryption - * on those as well. - */ + /* DP MST Auth Part 1 Step 2.a and Step 2.b */ + if (shim->stream_encryption) { + ret = shim->stream_encryption(dig_port, true); + if (ret) { + drm_err(&dev_priv->drm, "Failed to enable HDCP 1.4 stream enc\n"); + return ret; + } + drm_dbg_kms(&dev_priv->drm, "HDCP 1.4 tras %s stream encrypted\n", + transcoder_name(hdcp->stream_transcoder)); + } if (repeater_present) return intel_hdcp_auth_downstream(connector); @@ -790,19 +801,26 @@ static int _intel_hdcp_disable(struct intel_connector *connector) drm_dbg_kms(&dev_priv->drm, "[%s:%d] HDCP is being disabled...\n", connector->base.name, connector->base.base.id); + /* + * Step 1: Deselect HDCP Multiplestream Bit. + * Step 2: poll for stream encryption status to be disable. + */ + if (hdcp->shim->stream_encryption) { + ret = hdcp->shim->stream_encryption(dig_port, false); + if (ret) { + drm_err(&dev_priv->drm, "Failed to disable HDCP 1.4 stream enc\n"); + return ret; + } + drm_dbg_kms(&dev_priv->drm, "HDCP 1.4 trans %s stream encryption disabled\n", + transcoder_name(hdcp->stream_transcoder)); + } /* - * If there are other connectors on this port using HDCP, don't disable - * it. Instead, toggle the HDCP signalling off on that particular - * connector/pipe and exit. + * If there are other connectors on this port using HDCP, don't disable it. + * Repeat steps 1-2 for each stream that no longer requires encryption. */ - if (dig_port->num_hdcp_streams > 0) { - ret = hdcp->shim->toggle_signalling(dig_port, - cpu_transcoder, false); - if (ret) - DRM_ERROR("Failed to disable HDCP signalling\n"); + if (dig_port->num_hdcp_streams > 0) return ret; - } hdcp->hdcp_encrypted = false; intel_de_write(dev_priv, HDCP_CONF(dev_priv, cpu_transcoder, port), 0); -- 2.26.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-10-20 13:49 UTC|newest] Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-10-20 13:38 [PATCH v2 00/15] HDCP 2.2 DP MST Support Anshuman Gupta 2020-10-20 13:38 ` [Intel-gfx] " Anshuman Gupta 2020-10-20 13:38 ` [PATCH v2 01/15] drm/i915/hdcp: Update CP property in update_pipe Anshuman Gupta 2020-10-20 13:38 ` [Intel-gfx] " Anshuman Gupta 2020-10-20 13:38 ` [PATCH v2 02/15] drm/i915/hotplug: Handle CP_IRQ for DP-MST Anshuman Gupta 2020-10-20 13:38 ` [Intel-gfx] " Anshuman Gupta 2020-10-20 13:38 ` [PATCH v2 03/15] drm/i915/hdcp: DP MST transcoder for link and stream Anshuman Gupta 2020-10-20 13:38 ` [Intel-gfx] " Anshuman Gupta 2020-10-20 13:38 ` [PATCH v2 04/15] drm/i915/hdcp: Move HDCP enc status timeout to header Anshuman Gupta 2020-10-20 13:38 ` [Intel-gfx] " Anshuman Gupta 2020-10-20 13:38 ` [PATCH v2 05/15] drm/i915/hdcp: HDCP stream encryption support Anshuman Gupta 2020-10-20 13:38 ` [Intel-gfx] " Anshuman Gupta 2020-10-20 13:38 ` Anshuman Gupta [this message] 2020-10-20 13:38 ` [Intel-gfx] [PATCH v2 06/15] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support Anshuman Gupta 2020-10-20 13:38 ` [PATCH v2 07/15] drm/i915/hdcp: Pass dig_port to intel_hdcp_init Anshuman Gupta 2020-10-20 13:38 ` [Intel-gfx] " Anshuman Gupta 2020-10-20 13:38 ` [PATCH v2 08/15] drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port Anshuman Gupta 2020-10-20 13:38 ` [Intel-gfx] " Anshuman Gupta 2020-10-20 13:39 ` [PATCH v2 09/15] misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd buffer len Anshuman Gupta 2020-10-20 13:39 ` [Intel-gfx] " Anshuman Gupta 2020-10-20 18:32 ` Jani Nikula 2020-10-20 18:32 ` [Intel-gfx] " Jani Nikula 2020-10-21 16:30 ` Winkler, Tomas 2020-10-21 16:30 ` [Intel-gfx] " Winkler, Tomas 2020-10-20 13:39 ` [PATCH v2 10/15] drm/hdcp: Max MST content streams Anshuman Gupta 2020-10-20 13:39 ` [Intel-gfx] " Anshuman Gupta 2020-10-20 13:39 ` [PATCH v2 11/15] drm/i915/hdcp: mst streams support in hdcp port_data Anshuman Gupta 2020-10-20 13:39 ` [Intel-gfx] " Anshuman Gupta 2020-10-20 13:39 ` [PATCH v2 12/15] drm/i915/hdcp: Pass connector to check_2_2_link Anshuman Gupta 2020-10-20 13:39 ` [Intel-gfx] " Anshuman Gupta 2020-10-20 13:39 ` [PATCH v2 13/15] drm/i915/hdcp: Add HDCP 2.2 stream register Anshuman Gupta 2020-10-20 13:39 ` [Intel-gfx] " Anshuman Gupta 2020-10-20 13:39 ` [PATCH v2 14/15] drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks Anshuman Gupta 2020-10-20 13:39 ` [Intel-gfx] " Anshuman Gupta 2020-10-20 13:39 ` [PATCH v2 15/15] drm/i915/hdcp: Enable HDCP 2.2 MST support Anshuman Gupta 2020-10-20 13:39 ` [Intel-gfx] " Anshuman Gupta 2020-10-20 13:57 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for HDCP 2.2 DP MST Support (rev4) Patchwork 2020-10-20 13:58 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2020-10-20 14:27 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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