From: Anshuman Gupta <anshuman.gupta@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: jani.nikula@intel.com, uma.shankar@intel.com,
seanpaul@chromium.org, Anshuman Gupta <anshuman.gupta@intel.com>,
juston.li@intel.com
Subject: [PATCH v3 16/16] drm/i915/hdcp: Enable HDCP 2.2 MST support
Date: Fri, 23 Oct 2020 17:51:12 +0530 [thread overview]
Message-ID: <20201023122112.15265-17-anshuman.gupta@intel.com> (raw)
In-Reply-To: <20201023122112.15265-1-anshuman.gupta@intel.com>
Enable HDCP 2.2 over DP MST.
Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 46 ++++++++++++++++++++++-
1 file changed, 44 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 9dd08e2636e9..621c1a94c5ad 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1698,6 +1698,32 @@ static int hdcp2_authenticate_sink(struct intel_connector *connector)
return ret;
}
+static int hdcp2_enable_stream_encryption(struct intel_connector *connector)
+{
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ struct intel_hdcp *hdcp = &connector->hdcp;
+ enum transcoder cpu_transcoder = hdcp->cpu_transcoder;
+ enum port port = dig_port->base.port;
+ int ret = 0;
+
+ if (!(intel_de_read(dev_priv, HDCP2_STATUS(dev_priv, cpu_transcoder, port)) &
+ LINK_ENCRYPTION_STATUS)) {
+ drm_err(&dev_priv->drm, "HDCP 2.2 Link is not encrypted\n");
+ return -EPERM;
+ }
+
+ if (hdcp->shim->stream_2_2_encryption) {
+ ret = hdcp->shim->stream_2_2_encryption(dig_port, true);
+ if (ret) {
+ drm_err(&dev_priv->drm, "Failed to enable HDCP 2.2 stream enc\n");
+ return ret;
+ }
+ }
+
+ return ret;
+}
+
static int hdcp2_enable_encryption(struct intel_connector *connector)
{
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
@@ -1836,7 +1862,7 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
drm_dbg_kms(&i915->drm, "Port deauth failed.\n");
}
- if (!ret) {
+ if (!ret && !dig_port->port_auth) {
/*
* Ensuring the required 200mSec min time interval between
* Session Key Exchange and encryption.
@@ -1851,6 +1877,8 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
}
}
+ ret = hdcp2_enable_stream_encryption(connector);
+
return ret;
}
@@ -1896,11 +1924,23 @@ static int _intel_hdcp2_disable(struct intel_connector *connector)
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct drm_i915_private *i915 = to_i915(connector->base.dev);
struct hdcp_port_data *data = &dig_port->port_data;
+ struct intel_hdcp *hdcp = &connector->hdcp;
int ret;
drm_dbg_kms(&i915->drm, "[%s:%d] HDCP2.2 is being Disabled\n",
connector->base.name, connector->base.base.id);
+ if (hdcp->shim->stream_2_2_encryption) {
+ ret = hdcp->shim->stream_2_2_encryption(dig_port, false);
+ if (ret) {
+ drm_err(&i915->drm, "Failed to disable HDCP 2.2 stream enc\n");
+ return ret;
+ }
+ }
+
+ if (dig_port->num_hdcp_streams > 0)
+ return ret;
+
ret = hdcp2_disable_encryption(connector);
if (hdcp2_deauthenticate_port(connector) < 0)
@@ -1924,6 +1964,7 @@ static int intel_hdcp2_check_link(struct intel_connector *connector)
int ret = 0;
mutex_lock(&hdcp->mutex);
+ mutex_lock(&dig_port->hdcp_mutex);
cpu_transcoder = hdcp->cpu_transcoder;
/* hdcp2_check_link is expected only when HDCP2.2 is Enabled */
@@ -2001,6 +2042,7 @@ static int intel_hdcp2_check_link(struct intel_connector *connector)
}
out:
+ mutex_unlock(&dig_port->hdcp_mutex);
mutex_unlock(&hdcp->mutex);
return ret;
}
@@ -2182,7 +2224,7 @@ int intel_hdcp_init(struct intel_connector *connector,
if (!shim)
return -EINVAL;
- if (is_hdcp2_supported(dev_priv) && !connector->mst_port)
+ if (is_hdcp2_supported(dev_priv))
intel_hdcp2_init(connector, dig_port, shim);
ret =
--
2.26.2
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: Anshuman Gupta <anshuman.gupta@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: jani.nikula@intel.com, seanpaul@chromium.org
Subject: [Intel-gfx] [PATCH v3 16/16] drm/i915/hdcp: Enable HDCP 2.2 MST support
Date: Fri, 23 Oct 2020 17:51:12 +0530 [thread overview]
Message-ID: <20201023122112.15265-17-anshuman.gupta@intel.com> (raw)
In-Reply-To: <20201023122112.15265-1-anshuman.gupta@intel.com>
Enable HDCP 2.2 over DP MST.
Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 46 ++++++++++++++++++++++-
1 file changed, 44 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 9dd08e2636e9..621c1a94c5ad 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1698,6 +1698,32 @@ static int hdcp2_authenticate_sink(struct intel_connector *connector)
return ret;
}
+static int hdcp2_enable_stream_encryption(struct intel_connector *connector)
+{
+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ struct intel_hdcp *hdcp = &connector->hdcp;
+ enum transcoder cpu_transcoder = hdcp->cpu_transcoder;
+ enum port port = dig_port->base.port;
+ int ret = 0;
+
+ if (!(intel_de_read(dev_priv, HDCP2_STATUS(dev_priv, cpu_transcoder, port)) &
+ LINK_ENCRYPTION_STATUS)) {
+ drm_err(&dev_priv->drm, "HDCP 2.2 Link is not encrypted\n");
+ return -EPERM;
+ }
+
+ if (hdcp->shim->stream_2_2_encryption) {
+ ret = hdcp->shim->stream_2_2_encryption(dig_port, true);
+ if (ret) {
+ drm_err(&dev_priv->drm, "Failed to enable HDCP 2.2 stream enc\n");
+ return ret;
+ }
+ }
+
+ return ret;
+}
+
static int hdcp2_enable_encryption(struct intel_connector *connector)
{
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
@@ -1836,7 +1862,7 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
drm_dbg_kms(&i915->drm, "Port deauth failed.\n");
}
- if (!ret) {
+ if (!ret && !dig_port->port_auth) {
/*
* Ensuring the required 200mSec min time interval between
* Session Key Exchange and encryption.
@@ -1851,6 +1877,8 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
}
}
+ ret = hdcp2_enable_stream_encryption(connector);
+
return ret;
}
@@ -1896,11 +1924,23 @@ static int _intel_hdcp2_disable(struct intel_connector *connector)
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct drm_i915_private *i915 = to_i915(connector->base.dev);
struct hdcp_port_data *data = &dig_port->port_data;
+ struct intel_hdcp *hdcp = &connector->hdcp;
int ret;
drm_dbg_kms(&i915->drm, "[%s:%d] HDCP2.2 is being Disabled\n",
connector->base.name, connector->base.base.id);
+ if (hdcp->shim->stream_2_2_encryption) {
+ ret = hdcp->shim->stream_2_2_encryption(dig_port, false);
+ if (ret) {
+ drm_err(&i915->drm, "Failed to disable HDCP 2.2 stream enc\n");
+ return ret;
+ }
+ }
+
+ if (dig_port->num_hdcp_streams > 0)
+ return ret;
+
ret = hdcp2_disable_encryption(connector);
if (hdcp2_deauthenticate_port(connector) < 0)
@@ -1924,6 +1964,7 @@ static int intel_hdcp2_check_link(struct intel_connector *connector)
int ret = 0;
mutex_lock(&hdcp->mutex);
+ mutex_lock(&dig_port->hdcp_mutex);
cpu_transcoder = hdcp->cpu_transcoder;
/* hdcp2_check_link is expected only when HDCP2.2 is Enabled */
@@ -2001,6 +2042,7 @@ static int intel_hdcp2_check_link(struct intel_connector *connector)
}
out:
+ mutex_unlock(&dig_port->hdcp_mutex);
mutex_unlock(&hdcp->mutex);
return ret;
}
@@ -2182,7 +2224,7 @@ int intel_hdcp_init(struct intel_connector *connector,
if (!shim)
return -EINVAL;
- if (is_hdcp2_supported(dev_priv) && !connector->mst_port)
+ if (is_hdcp2_supported(dev_priv))
intel_hdcp2_init(connector, dig_port, shim);
ret =
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-10-23 12:36 UTC|newest]
Thread overview: 87+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-23 12:20 [PATCH v3 00/16] HDCP 2.2 and HDCP 1.4 Gen12 DP MST support Anshuman Gupta
2020-10-23 12:20 ` [Intel-gfx] " Anshuman Gupta
2020-10-23 12:20 ` [PATCH v3 01/16] drm/i915/hdcp: Update CP property in update_pipe Anshuman Gupta
2020-10-23 12:20 ` [Intel-gfx] " Anshuman Gupta
2020-10-27 5:32 ` Shankar, Uma
2020-10-27 5:32 ` [Intel-gfx] " Shankar, Uma
2020-10-27 7:50 ` Anshuman Gupta
2020-10-27 7:50 ` [Intel-gfx] " Anshuman Gupta
2020-10-23 12:20 ` [PATCH v3 02/16] drm/i915/hdcp: Get conn while content_type changed Anshuman Gupta
2020-10-23 12:20 ` [Intel-gfx] " Anshuman Gupta
2020-10-27 5:34 ` Shankar, Uma
2020-10-27 5:34 ` [Intel-gfx] " Shankar, Uma
2020-10-27 5:37 ` Anshuman Gupta
2020-10-27 5:37 ` [Intel-gfx] " Anshuman Gupta
2020-10-23 12:20 ` [PATCH v3 03/16] drm/i915/hotplug: Handle CP_IRQ for DP-MST Anshuman Gupta
2020-10-23 12:20 ` [Intel-gfx] " Anshuman Gupta
2020-10-27 5:43 ` Shankar, Uma
2020-10-27 5:43 ` [Intel-gfx] " Shankar, Uma
2020-10-23 12:21 ` [PATCH v3 04/16] drm/i915/hdcp: DP MST transcoder for link and stream Anshuman Gupta
2020-10-23 12:21 ` [Intel-gfx] " Anshuman Gupta
2020-10-27 5:49 ` Shankar, Uma
2020-10-27 5:49 ` [Intel-gfx] " Shankar, Uma
2020-10-23 12:21 ` [PATCH v3 05/16] drm/i915/hdcp: Move HDCP enc status timeout to header Anshuman Gupta
2020-10-23 12:21 ` [Intel-gfx] " Anshuman Gupta
2020-10-27 5:52 ` Shankar, Uma
2020-10-27 5:52 ` [Intel-gfx] " Shankar, Uma
2020-10-23 12:21 ` [PATCH v3 06/16] drm/i915/hdcp: HDCP stream encryption support Anshuman Gupta
2020-10-23 12:21 ` [Intel-gfx] " Anshuman Gupta
2020-10-27 6:20 ` Shankar, Uma
2020-10-27 6:20 ` [Intel-gfx] " Shankar, Uma
2020-10-27 7:46 ` Anshuman Gupta
2020-10-27 7:46 ` [Intel-gfx] " Anshuman Gupta
2020-10-23 12:21 ` [PATCH v3 07/16] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support Anshuman Gupta
2020-10-23 12:21 ` [Intel-gfx] " Anshuman Gupta
2020-10-27 6:29 ` Shankar, Uma
2020-10-27 6:29 ` [Intel-gfx] " Shankar, Uma
2020-10-27 7:57 ` Anshuman Gupta
2020-10-27 7:57 ` [Intel-gfx] " Anshuman Gupta
2020-10-27 12:04 ` Anshuman Gupta
2020-10-27 12:04 ` [Intel-gfx] " Anshuman Gupta
2020-10-23 12:21 ` [PATCH v3 08/16] drm/i915/hdcp: Pass dig_port to intel_hdcp_init Anshuman Gupta
2020-10-23 12:21 ` [Intel-gfx] " Anshuman Gupta
2020-10-27 6:30 ` Shankar, Uma
2020-10-27 6:30 ` [Intel-gfx] " Shankar, Uma
2020-10-23 12:21 ` [PATCH v3 09/16] drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port Anshuman Gupta
2020-10-23 12:21 ` [Intel-gfx] " Anshuman Gupta
2020-10-27 6:34 ` Shankar, Uma
2020-10-27 6:34 ` [Intel-gfx] " Shankar, Uma
2020-10-23 12:21 ` [PATCH v3 10/16] misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd buffer len Anshuman Gupta
2020-10-23 12:21 ` [Intel-gfx] " Anshuman Gupta
2020-10-27 6:36 ` Shankar, Uma
2020-10-27 6:36 ` [Intel-gfx] " Shankar, Uma
2020-10-27 6:39 ` Winkler, Tomas
2020-10-27 6:39 ` [Intel-gfx] " Winkler, Tomas
2020-10-23 12:21 ` [PATCH v3 11/16] drm/hdcp: Max MST content streams Anshuman Gupta
2020-10-23 12:21 ` [Intel-gfx] " Anshuman Gupta
2020-10-27 6:41 ` Shankar, Uma
2020-10-27 6:41 ` [Intel-gfx] " Shankar, Uma
2020-10-23 12:21 ` [PATCH v3 12/16] drm/i915/hdcp: MST streams support in hdcp port_data Anshuman Gupta
2020-10-23 12:21 ` [Intel-gfx] " Anshuman Gupta
2020-10-27 6:55 ` Shankar, Uma
2020-10-27 6:55 ` [Intel-gfx] " Shankar, Uma
2020-10-23 12:21 ` [PATCH v3 13/16] drm/i915/hdcp: Pass connector to check_2_2_link Anshuman Gupta
2020-10-23 12:21 ` [Intel-gfx] " Anshuman Gupta
2020-10-27 6:57 ` Shankar, Uma
2020-10-27 6:57 ` [Intel-gfx] " Shankar, Uma
2020-10-23 12:21 ` [PATCH v3 14/16] drm/i915/hdcp: Add HDCP 2.2 stream register Anshuman Gupta
2020-10-23 12:21 ` [Intel-gfx] " Anshuman Gupta
2020-10-27 7:11 ` Shankar, Uma
2020-10-27 7:11 ` [Intel-gfx] " Shankar, Uma
2020-10-27 8:57 ` Anshuman Gupta
2020-10-27 8:57 ` [Intel-gfx] " Anshuman Gupta
2020-10-27 9:50 ` Shankar, Uma
2020-10-27 9:50 ` [Intel-gfx] " Shankar, Uma
2020-10-23 12:21 ` [PATCH v3 15/16] drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks Anshuman Gupta
2020-10-23 12:21 ` [Intel-gfx] " Anshuman Gupta
2020-10-27 7:20 ` Shankar, Uma
2020-10-27 7:20 ` [Intel-gfx] " Shankar, Uma
2020-10-23 12:21 ` Anshuman Gupta [this message]
2020-10-23 12:21 ` [Intel-gfx] [PATCH v3 16/16] drm/i915/hdcp: Enable HDCP 2.2 MST support Anshuman Gupta
2020-10-27 7:24 ` Shankar, Uma
2020-10-27 7:24 ` [Intel-gfx] " Shankar, Uma
2020-10-23 14:41 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for HDCP 2.2 and HDCP 1.4 Gen12 DP " Patchwork
2020-10-23 14:42 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-23 15:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-23 18:54 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2020-10-22 8:55 [PATCH v3 00/16] HDCP 2.2 DP MST Support Anshuman Gupta
2020-10-22 8:55 ` [PATCH v3 16/16] drm/i915/hdcp: Enable HDCP 2.2 MST support Anshuman Gupta
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