From: Anshuman Gupta <anshuman.gupta@intel.com> To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: jani.nikula@intel.com, uma.shankar@intel.com, seanpaul@chromium.org, Anshuman Gupta <anshuman.gupta@intel.com>, juston.li@intel.com Subject: [PATCH v4 16/16] drm/i915/hdcp: Enable HDCP 2.2 MST support Date: Tue, 27 Oct 2020 22:12:08 +0530 [thread overview] Message-ID: <20201027164208.10026-17-anshuman.gupta@intel.com> (raw) In-Reply-To: <20201027164208.10026-1-anshuman.gupta@intel.com> Enable HDCP 2.2 over DP MST. Authenticate and enable port encryption only once for an active HDCP 2.2 session, once port is authenticated and encrypted enable encryption for each stream that requires encryption on this port. Similarly disable the stream encryption for each encrypted stream, once all encrypted stream encryption is disabled, disable the port HDCP encryption and deauthenticate the port. Cc: Ramalingam C <ramalingam.c@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> --- drivers/gpu/drm/i915/display/intel_hdcp.c | 46 ++++++++++++++++++++++- 1 file changed, 44 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c index 87f7aaf3a319..71fd01bf63a6 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c @@ -1693,6 +1693,32 @@ static int hdcp2_authenticate_sink(struct intel_connector *connector) return ret; } +static int hdcp2_enable_stream_encryption(struct intel_connector *connector) +{ + struct intel_digital_port *dig_port = intel_attached_dig_port(connector); + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + struct intel_hdcp *hdcp = &connector->hdcp; + enum transcoder cpu_transcoder = hdcp->cpu_transcoder; + enum port port = dig_port->base.port; + int ret = 0; + + if (!(intel_de_read(dev_priv, HDCP2_STATUS(dev_priv, cpu_transcoder, port)) & + LINK_ENCRYPTION_STATUS)) { + drm_err(&dev_priv->drm, "HDCP 2.2 Link is not encrypted\n"); + return -EPERM; + } + + if (hdcp->shim->stream_2_2_encryption) { + ret = hdcp->shim->stream_2_2_encryption(dig_port, true); + if (ret) { + drm_err(&dev_priv->drm, "Failed to enable HDCP 2.2 stream enc\n"); + return ret; + } + } + + return ret; +} + static int hdcp2_enable_encryption(struct intel_connector *connector) { struct intel_digital_port *dig_port = intel_attached_dig_port(connector); @@ -1831,7 +1857,7 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector) drm_dbg_kms(&i915->drm, "Port deauth failed.\n"); } - if (!ret) { + if (!ret && !dig_port->port_auth) { /* * Ensuring the required 200mSec min time interval between * Session Key Exchange and encryption. @@ -1846,6 +1872,8 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector) } } + ret = hdcp2_enable_stream_encryption(connector); + return ret; } @@ -1891,11 +1919,23 @@ static int _intel_hdcp2_disable(struct intel_connector *connector) struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct drm_i915_private *i915 = to_i915(connector->base.dev); struct hdcp_port_data *data = &dig_port->port_data; + struct intel_hdcp *hdcp = &connector->hdcp; int ret; drm_dbg_kms(&i915->drm, "[%s:%d] HDCP2.2 is being Disabled\n", connector->base.name, connector->base.base.id); + if (hdcp->shim->stream_2_2_encryption) { + ret = hdcp->shim->stream_2_2_encryption(dig_port, false); + if (ret) { + drm_err(&i915->drm, "Failed to disable HDCP 2.2 stream enc\n"); + return ret; + } + } + + if (dig_port->num_hdcp_streams > 0) + return ret; + ret = hdcp2_disable_encryption(connector); if (hdcp2_deauthenticate_port(connector) < 0) @@ -1919,6 +1959,7 @@ static int intel_hdcp2_check_link(struct intel_connector *connector) int ret = 0; mutex_lock(&hdcp->mutex); + mutex_lock(&dig_port->hdcp_mutex); cpu_transcoder = hdcp->cpu_transcoder; /* hdcp2_check_link is expected only when HDCP2.2 is Enabled */ @@ -1996,6 +2037,7 @@ static int intel_hdcp2_check_link(struct intel_connector *connector) } out: + mutex_unlock(&dig_port->hdcp_mutex); mutex_unlock(&hdcp->mutex); return ret; } @@ -2177,7 +2219,7 @@ int intel_hdcp_init(struct intel_connector *connector, if (!shim) return -EINVAL; - if (is_hdcp2_supported(dev_priv) && !connector->mst_port) + if (is_hdcp2_supported(dev_priv)) intel_hdcp2_init(connector, dig_port, shim); ret = -- 2.26.2 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
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From: Anshuman Gupta <anshuman.gupta@intel.com> To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: jani.nikula@intel.com, seanpaul@chromium.org Subject: [Intel-gfx] [PATCH v4 16/16] drm/i915/hdcp: Enable HDCP 2.2 MST support Date: Tue, 27 Oct 2020 22:12:08 +0530 [thread overview] Message-ID: <20201027164208.10026-17-anshuman.gupta@intel.com> (raw) In-Reply-To: <20201027164208.10026-1-anshuman.gupta@intel.com> Enable HDCP 2.2 over DP MST. Authenticate and enable port encryption only once for an active HDCP 2.2 session, once port is authenticated and encrypted enable encryption for each stream that requires encryption on this port. Similarly disable the stream encryption for each encrypted stream, once all encrypted stream encryption is disabled, disable the port HDCP encryption and deauthenticate the port. Cc: Ramalingam C <ramalingam.c@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com> --- drivers/gpu/drm/i915/display/intel_hdcp.c | 46 ++++++++++++++++++++++- 1 file changed, 44 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c index 87f7aaf3a319..71fd01bf63a6 100644 --- a/drivers/gpu/drm/i915/display/intel_hdcp.c +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c @@ -1693,6 +1693,32 @@ static int hdcp2_authenticate_sink(struct intel_connector *connector) return ret; } +static int hdcp2_enable_stream_encryption(struct intel_connector *connector) +{ + struct intel_digital_port *dig_port = intel_attached_dig_port(connector); + struct drm_i915_private *dev_priv = to_i915(connector->base.dev); + struct intel_hdcp *hdcp = &connector->hdcp; + enum transcoder cpu_transcoder = hdcp->cpu_transcoder; + enum port port = dig_port->base.port; + int ret = 0; + + if (!(intel_de_read(dev_priv, HDCP2_STATUS(dev_priv, cpu_transcoder, port)) & + LINK_ENCRYPTION_STATUS)) { + drm_err(&dev_priv->drm, "HDCP 2.2 Link is not encrypted\n"); + return -EPERM; + } + + if (hdcp->shim->stream_2_2_encryption) { + ret = hdcp->shim->stream_2_2_encryption(dig_port, true); + if (ret) { + drm_err(&dev_priv->drm, "Failed to enable HDCP 2.2 stream enc\n"); + return ret; + } + } + + return ret; +} + static int hdcp2_enable_encryption(struct intel_connector *connector) { struct intel_digital_port *dig_port = intel_attached_dig_port(connector); @@ -1831,7 +1857,7 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector) drm_dbg_kms(&i915->drm, "Port deauth failed.\n"); } - if (!ret) { + if (!ret && !dig_port->port_auth) { /* * Ensuring the required 200mSec min time interval between * Session Key Exchange and encryption. @@ -1846,6 +1872,8 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector) } } + ret = hdcp2_enable_stream_encryption(connector); + return ret; } @@ -1891,11 +1919,23 @@ static int _intel_hdcp2_disable(struct intel_connector *connector) struct intel_digital_port *dig_port = intel_attached_dig_port(connector); struct drm_i915_private *i915 = to_i915(connector->base.dev); struct hdcp_port_data *data = &dig_port->port_data; + struct intel_hdcp *hdcp = &connector->hdcp; int ret; drm_dbg_kms(&i915->drm, "[%s:%d] HDCP2.2 is being Disabled\n", connector->base.name, connector->base.base.id); + if (hdcp->shim->stream_2_2_encryption) { + ret = hdcp->shim->stream_2_2_encryption(dig_port, false); + if (ret) { + drm_err(&i915->drm, "Failed to disable HDCP 2.2 stream enc\n"); + return ret; + } + } + + if (dig_port->num_hdcp_streams > 0) + return ret; + ret = hdcp2_disable_encryption(connector); if (hdcp2_deauthenticate_port(connector) < 0) @@ -1919,6 +1959,7 @@ static int intel_hdcp2_check_link(struct intel_connector *connector) int ret = 0; mutex_lock(&hdcp->mutex); + mutex_lock(&dig_port->hdcp_mutex); cpu_transcoder = hdcp->cpu_transcoder; /* hdcp2_check_link is expected only when HDCP2.2 is Enabled */ @@ -1996,6 +2037,7 @@ static int intel_hdcp2_check_link(struct intel_connector *connector) } out: + mutex_unlock(&dig_port->hdcp_mutex); mutex_unlock(&hdcp->mutex); return ret; } @@ -2177,7 +2219,7 @@ int intel_hdcp_init(struct intel_connector *connector, if (!shim) return -EINVAL; - if (is_hdcp2_supported(dev_priv) && !connector->mst_port) + if (is_hdcp2_supported(dev_priv)) intel_hdcp2_init(connector, dig_port, shim); ret = -- 2.26.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-10-27 16:56 UTC|newest] Thread overview: 111+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-10-27 16:41 [PATCH v4 00/16] HDCP 2.2 and HDCP 1.4 Gen12 DP MST support Anshuman Gupta 2020-10-27 16:41 ` [Intel-gfx] " Anshuman Gupta 2020-10-27 16:41 ` [PATCH v4 01/16] drm/i915/hdcp: Update CP property in update_pipe Anshuman Gupta 2020-10-27 16:41 ` [Intel-gfx] " Anshuman Gupta 2020-11-02 7:45 ` Shankar, Uma 2020-11-02 7:45 ` [Intel-gfx] " Shankar, Uma 2020-11-05 13:18 ` Ramalingam C 2020-11-05 13:18 ` [Intel-gfx] " Ramalingam C 2020-11-05 13:21 ` Ramalingam C 2020-11-05 13:21 ` Ramalingam C 2020-11-05 13:26 ` Ramalingam C 2020-11-05 13:26 ` Ramalingam C 2020-10-27 16:41 ` [PATCH v4 02/16] drm/i915/hdcp: Get conn while content_type changed Anshuman Gupta 2020-10-27 16:41 ` [Intel-gfx] " Anshuman Gupta 2020-11-02 7:45 ` Shankar, Uma 2020-11-02 7:45 ` [Intel-gfx] " Shankar, Uma 2020-11-05 13:23 ` Ramalingam C 2020-11-05 13:23 ` [Intel-gfx] " Ramalingam C 2020-10-27 16:41 ` [PATCH v4 03/16] drm/i915/hotplug: Handle CP_IRQ for DP-MST Anshuman Gupta 2020-10-27 16:41 ` [Intel-gfx] " Anshuman Gupta 2020-11-06 12:00 ` Ramalingam C 2020-11-06 12:00 ` [Intel-gfx] " Ramalingam C 2020-10-27 16:41 ` [PATCH v4 04/16] drm/i915/hdcp: DP MST transcoder for link and stream Anshuman Gupta 2020-10-27 16:41 ` [Intel-gfx] " Anshuman Gupta 2020-11-05 13:52 ` Ramalingam C 2020-11-05 13:52 ` [Intel-gfx] " Ramalingam C 2020-10-27 16:41 ` [PATCH v4 05/16] drm/i915/hdcp: Move HDCP enc status timeout to header Anshuman Gupta 2020-10-27 16:41 ` [Intel-gfx] " Anshuman Gupta 2020-11-05 13:57 ` Ramalingam C 2020-11-05 13:57 ` [Intel-gfx] " Ramalingam C 2020-10-27 16:41 ` [PATCH v4 06/16] drm/i915/hdcp: HDCP stream encryption support Anshuman Gupta 2020-10-27 16:41 ` [Intel-gfx] " Anshuman Gupta 2020-11-02 7:47 ` Shankar, Uma 2020-11-02 7:47 ` [Intel-gfx] " Shankar, Uma 2020-11-05 15:34 ` Ramalingam C 2020-11-05 15:34 ` [Intel-gfx] " Ramalingam C 2020-11-06 5:22 ` Anshuman Gupta 2020-11-06 5:22 ` [Intel-gfx] " Anshuman Gupta 2020-11-06 7:52 ` Ramalingam C 2020-11-06 7:52 ` [Intel-gfx] " Ramalingam C 2020-10-27 16:41 ` [PATCH v4 07/16] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support Anshuman Gupta 2020-10-27 16:41 ` [Intel-gfx] " Anshuman Gupta 2020-11-02 7:47 ` Shankar, Uma 2020-11-02 7:47 ` [Intel-gfx] " Shankar, Uma 2020-11-05 15:41 ` Ramalingam C 2020-11-05 15:41 ` [Intel-gfx] " Ramalingam C 2020-11-06 6:36 ` Anshuman Gupta 2020-11-06 6:36 ` [Intel-gfx] " Anshuman Gupta 2020-10-27 16:42 ` [PATCH v4 08/16] drm/i915/hdcp: Pass dig_port to intel_hdcp_init Anshuman Gupta 2020-10-27 16:42 ` [Intel-gfx] " Anshuman Gupta 2020-11-05 16:39 ` Ramalingam C 2020-11-05 16:39 ` [Intel-gfx] " Ramalingam C 2020-11-06 4:50 ` Anshuman Gupta 2020-11-06 4:50 ` [Intel-gfx] " Anshuman Gupta 2020-11-06 7:48 ` Ramalingam C 2020-11-06 7:48 ` [Intel-gfx] " Ramalingam C 2020-10-27 16:42 ` [PATCH v4 09/16] drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port Anshuman Gupta 2020-10-27 16:42 ` [Intel-gfx] " Anshuman Gupta 2020-11-06 11:34 ` Ramalingam C 2020-11-06 11:34 ` [Intel-gfx] " Ramalingam C 2020-10-27 16:42 ` [PATCH v4 10/16] misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd buffer len Anshuman Gupta 2020-10-27 16:42 ` [Intel-gfx] " Anshuman Gupta 2020-11-05 16:07 ` Ramalingam C 2020-11-05 16:07 ` [Intel-gfx] " Ramalingam C 2020-10-27 16:42 ` [PATCH v4 11/16] drm/hdcp: Max MST content streams Anshuman Gupta 2020-10-27 16:42 ` [Intel-gfx] " Anshuman Gupta 2020-11-05 16:09 ` Ramalingam C 2020-11-05 16:09 ` [Intel-gfx] " Ramalingam C 2020-10-27 16:42 ` [PATCH v4 12/16] drm/i915/hdcp: MST streams support in hdcp port_data Anshuman Gupta 2020-10-27 16:42 ` [Intel-gfx] " Anshuman Gupta 2020-11-02 7:49 ` Shankar, Uma 2020-11-02 7:49 ` [Intel-gfx] " Shankar, Uma 2020-11-05 16:34 ` Ramalingam C 2020-11-05 16:34 ` [Intel-gfx] " Ramalingam C 2020-11-06 6:35 ` Anshuman Gupta 2020-11-06 6:35 ` [Intel-gfx] " Anshuman Gupta 2020-11-06 11:28 ` Ramalingam C 2020-11-06 11:28 ` [Intel-gfx] " Ramalingam C 2020-10-27 16:42 ` [PATCH v4 13/16] drm/i915/hdcp: Pass connector to check_2_2_link Anshuman Gupta 2020-10-27 16:42 ` [Intel-gfx] " Anshuman Gupta 2020-11-05 16:45 ` Ramalingam C 2020-11-05 16:45 ` [Intel-gfx] " Ramalingam C 2020-11-06 5:08 ` Anshuman Gupta 2020-11-06 5:08 ` [Intel-gfx] " Anshuman Gupta 2020-10-27 16:42 ` [PATCH v4 14/16] drm/i915/hdcp: Add HDCP 2.2 stream register Anshuman Gupta 2020-10-27 16:42 ` [Intel-gfx] " Anshuman Gupta 2020-11-05 16:47 ` Ramalingam C 2020-11-05 16:47 ` [Intel-gfx] " Ramalingam C 2020-10-27 16:42 ` [PATCH v4 15/16] drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks Anshuman Gupta 2020-10-27 16:42 ` [Intel-gfx] " Anshuman Gupta 2020-11-02 7:49 ` Shankar, Uma 2020-11-02 7:49 ` [Intel-gfx] " Shankar, Uma 2020-11-03 6:27 ` Anshuman Gupta 2020-11-06 9:27 ` Ramalingam C 2020-11-06 11:12 ` Ramalingam C 2020-11-09 5:36 ` Anshuman Gupta 2020-11-09 8:38 ` Ramalingam C 2020-10-27 16:42 ` Anshuman Gupta [this message] 2020-10-27 16:42 ` [Intel-gfx] [PATCH v4 16/16] drm/i915/hdcp: Enable HDCP 2.2 MST support Anshuman Gupta 2020-11-06 11:58 ` Ramalingam C 2020-11-06 11:58 ` [Intel-gfx] " Ramalingam C 2020-10-28 2:47 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for HDCP 2.2 and HDCP 1.4 Gen12 DP MST support (rev2) Patchwork 2020-10-28 2:49 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2020-10-28 3:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2020-10-28 6:40 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 2020-10-29 8:37 ` Anshuman Gupta 2020-10-29 22:11 ` Vudum, Lakshminarayana 2020-10-29 17:40 ` Patchwork 2020-10-29 17:54 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork 2020-11-02 9:02 ` Anshuman Gupta 2020-11-03 7:05 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for HDCP 2.2 and HDCP 1.4 Gen12 DP MST support (rev3) Patchwork
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