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From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Georgi Djakov <georgi.djakov@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	MyungJoo Ham <myungjoo.ham@samsung.com>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	Chanwoo Choi <cw00.choi@samsung.com>,
	Mikko Perttunen <cyndis@kapsi.fi>,
	Viresh Kumar <vireshk@kernel.org>,
	Peter Geis <pgwipeout@gmail.com>,
	Nicolas Chauvet <kwizart@gmail.com>,
	Krzysztof Kozlowski <krzk@kernel.org>
Cc: linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org
Subject: [PATCH v9 12/17] ARM: tegra: Add interconnect properties to Tegra30 device-tree
Date: Mon, 16 Nov 2020 00:29:17 +0300	[thread overview]
Message-ID: <20201115212922.4390-13-digetx@gmail.com> (raw)
In-Reply-To: <20201115212922.4390-1-digetx@gmail.com>

Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 arch/arm/boot/dts/tegra30.dtsi | 27 ++++++++++++++++++++++++++-
 1 file changed, 26 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index aeae8c092d41..2caf6cc6f4b1 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -210,6 +210,17 @@ dc@54200000 {
 
 			nvidia,head = <0>;
 
+			interconnects = <&mc TEGRA30_MC_DISPLAY0A &emc>,
+					<&mc TEGRA30_MC_DISPLAY0B &emc>,
+					<&mc TEGRA30_MC_DISPLAY1B &emc>,
+					<&mc TEGRA30_MC_DISPLAY0C &emc>,
+					<&mc TEGRA30_MC_DISPLAYHC &emc>;
+			interconnect-names = "wina",
+					     "winb",
+					     "winb-vfilter",
+					     "winc",
+					     "cursor";
+
 			rgb {
 				status = "disabled";
 			};
@@ -229,6 +240,17 @@ dc@54240000 {
 
 			nvidia,head = <1>;
 
+			interconnects = <&mc TEGRA30_MC_DISPLAY0AB &emc>,
+					<&mc TEGRA30_MC_DISPLAY0BB &emc>,
+					<&mc TEGRA30_MC_DISPLAY1BB &emc>,
+					<&mc TEGRA30_MC_DISPLAY0CB &emc>,
+					<&mc TEGRA30_MC_DISPLAYHCB &emc>;
+			interconnect-names = "wina",
+					     "winb",
+					     "winb-vfilter",
+					     "winc",
+					     "cursor";
+
 			rgb {
 				status = "disabled";
 			};
@@ -748,15 +770,18 @@ mc: memory-controller@7000f000 {
 
 		#iommu-cells = <1>;
 		#reset-cells = <1>;
+		#interconnect-cells = <1>;
 	};
 
-	memory-controller@7000f400 {
+	emc: memory-controller@7000f400 {
 		compatible = "nvidia,tegra30-emc";
 		reg = <0x7000f400 0x400>;
 		interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&tegra_car TEGRA30_CLK_EMC>;
 
 		nvidia,memory-controller = <&mc>;
+
+		#interconnect-cells = <0>;
 	};
 
 	fuse@7000f800 {
-- 
2.29.2


WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Osipenko <digetx@gmail.com>
To: Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Georgi Djakov <georgi.djakov@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	MyungJoo Ham <myungjoo.ham@samsung.com>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	Chanwoo Choi <cw00.choi@samsung.com>,
	Mikko Perttunen <cyndis@kapsi.fi>,
	Viresh Kumar <vireshk@kernel.org>,
	Peter Geis <pgwipeout@gmail.com>,
	Nicolas Chauvet <kwizart@gmail.com>,
	Krzysztof Kozlowski <krzk@kernel.org>
Cc: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
	dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org
Subject: [PATCH v9 12/17] ARM: tegra: Add interconnect properties to Tegra30 device-tree
Date: Mon, 16 Nov 2020 00:29:17 +0300	[thread overview]
Message-ID: <20201115212922.4390-13-digetx@gmail.com> (raw)
In-Reply-To: <20201115212922.4390-1-digetx@gmail.com>

Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 arch/arm/boot/dts/tegra30.dtsi | 27 ++++++++++++++++++++++++++-
 1 file changed, 26 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index aeae8c092d41..2caf6cc6f4b1 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -210,6 +210,17 @@ dc@54200000 {
 
 			nvidia,head = <0>;
 
+			interconnects = <&mc TEGRA30_MC_DISPLAY0A &emc>,
+					<&mc TEGRA30_MC_DISPLAY0B &emc>,
+					<&mc TEGRA30_MC_DISPLAY1B &emc>,
+					<&mc TEGRA30_MC_DISPLAY0C &emc>,
+					<&mc TEGRA30_MC_DISPLAYHC &emc>;
+			interconnect-names = "wina",
+					     "winb",
+					     "winb-vfilter",
+					     "winc",
+					     "cursor";
+
 			rgb {
 				status = "disabled";
 			};
@@ -229,6 +240,17 @@ dc@54240000 {
 
 			nvidia,head = <1>;
 
+			interconnects = <&mc TEGRA30_MC_DISPLAY0AB &emc>,
+					<&mc TEGRA30_MC_DISPLAY0BB &emc>,
+					<&mc TEGRA30_MC_DISPLAY1BB &emc>,
+					<&mc TEGRA30_MC_DISPLAY0CB &emc>,
+					<&mc TEGRA30_MC_DISPLAYHCB &emc>;
+			interconnect-names = "wina",
+					     "winb",
+					     "winb-vfilter",
+					     "winc",
+					     "cursor";
+
 			rgb {
 				status = "disabled";
 			};
@@ -748,15 +770,18 @@ mc: memory-controller@7000f000 {
 
 		#iommu-cells = <1>;
 		#reset-cells = <1>;
+		#interconnect-cells = <1>;
 	};
 
-	memory-controller@7000f400 {
+	emc: memory-controller@7000f400 {
 		compatible = "nvidia,tegra30-emc";
 		reg = <0x7000f400 0x400>;
 		interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&tegra_car TEGRA30_CLK_EMC>;
 
 		nvidia,memory-controller = <&mc>;
+
+		#interconnect-cells = <0>;
 	};
 
 	fuse@7000f800 {
-- 
2.29.2

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  parent reply	other threads:[~2020-11-15 21:33 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-15 21:29 [PATCH v9 00/17] Introduce memory interconnect for NVIDIA Tegra SoCs Dmitry Osipenko
2020-11-15 21:29 ` Dmitry Osipenko
2020-11-15 21:29 ` [PATCH v9 01/17] memory: tegra30: Support interconnect framework Dmitry Osipenko
2020-11-15 21:29   ` Dmitry Osipenko
2020-11-17 20:24   ` Georgi Djakov
2020-11-17 20:24     ` Georgi Djakov
2020-11-17 22:02     ` Dmitry Osipenko
2020-11-17 22:02       ` Dmitry Osipenko
2020-11-18 15:30       ` Georgi Djakov
2020-11-18 15:30         ` Georgi Djakov
2020-11-19 12:07         ` Dmitry Osipenko
2020-11-19 12:07           ` Dmitry Osipenko
2020-11-15 21:29 ` [PATCH v9 02/17] memory: tegra124-emc: Make driver modular Dmitry Osipenko
2020-11-15 21:29   ` Dmitry Osipenko
2020-11-15 21:29 ` [PATCH v9 03/17] memory: tegra124-emc: Continue probing if timings are missing in device-tree Dmitry Osipenko
2020-11-15 21:29   ` Dmitry Osipenko
2020-11-15 21:29 ` [PATCH v9 04/17] memory: tegra124: Support interconnect framework Dmitry Osipenko
2020-11-15 21:29   ` Dmitry Osipenko
2020-11-15 21:29 ` [PATCH v9 05/17] drm/tegra: dc: Support memory bandwidth management Dmitry Osipenko
2020-11-15 21:29   ` Dmitry Osipenko
2020-11-15 21:29 ` [PATCH v9 06/17] drm/tegra: dc: Extend debug stats with total number of events Dmitry Osipenko
2020-11-15 21:29   ` Dmitry Osipenko
2020-11-15 21:29 ` [PATCH v9 07/17] PM / devfreq: tegra30: Support interconnect and OPPs from device-tree Dmitry Osipenko
2020-11-15 21:29   ` Dmitry Osipenko
2020-11-17 10:07   ` Viresh Kumar
2020-11-17 10:07     ` Viresh Kumar
2020-11-17 14:17     ` Dmitry Osipenko
2020-11-17 14:17       ` Dmitry Osipenko
2020-11-18  4:21       ` Viresh Kumar
2020-11-18  4:21         ` Viresh Kumar
2020-11-19 21:04         ` Dmitry Osipenko
2020-11-19 21:04           ` Dmitry Osipenko
2020-11-15 21:29 ` [PATCH v9 08/17] PM / devfreq: tegra30: Separate configurations per-SoC generation Dmitry Osipenko
2020-11-15 21:29   ` Dmitry Osipenko
2020-11-15 21:29 ` [PATCH v9 09/17] PM / devfreq: tegra20: Deprecate in a favor of emc-stat based driver Dmitry Osipenko
2020-11-15 21:29   ` Dmitry Osipenko
2020-11-15 21:29 ` [PATCH v9 10/17] ARM: tegra: Correct EMC registers size in Tegra20 device-tree Dmitry Osipenko
2020-11-15 21:29   ` Dmitry Osipenko
2020-11-15 21:29 ` [PATCH v9 11/17] ARM: tegra: Add interconnect properties to " Dmitry Osipenko
2020-11-15 21:29   ` Dmitry Osipenko
2020-11-15 21:29 ` Dmitry Osipenko [this message]
2020-11-15 21:29   ` [PATCH v9 12/17] ARM: tegra: Add interconnect properties to Tegra30 device-tree Dmitry Osipenko
2020-11-15 21:29 ` [PATCH v9 13/17] ARM: tegra: Add interconnect properties to Tegra124 device-tree Dmitry Osipenko
2020-11-15 21:29   ` Dmitry Osipenko
2020-11-15 21:29 ` [PATCH v9 14/17] ARM: tegra: Add nvidia,memory-controller phandle to Tegra20 EMC device-tree Dmitry Osipenko
2020-11-15 21:29   ` [PATCH v9 14/17] ARM: tegra: Add nvidia, memory-controller " Dmitry Osipenko
2020-11-15 21:29 ` [PATCH v9 15/17] ARM: tegra: Add EMC OPP properties to Tegra20 device-trees Dmitry Osipenko
2020-11-15 21:29   ` Dmitry Osipenko
2020-11-15 21:29 ` [PATCH v9 16/17] ARM: tegra: Add EMC OPP and ICC properties to Tegra30 EMC and ACTMON device-tree nodes Dmitry Osipenko
2020-11-15 21:29   ` Dmitry Osipenko
2020-11-15 21:29 ` [PATCH v9 17/17] ARM: tegra: Add EMC OPP and ICC properties to Tegra124 " Dmitry Osipenko
2020-11-15 21:29   ` Dmitry Osipenko

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