From: Will Deacon <will@kernel.org>
To: kernel test robot <oliver.sang@intel.com>
Cc: linux-kernel@vger.kernel.org, kernel-team@android.com,
Catalin Marinas <catalin.marinas@arm.com>,
Yu Zhao <yuzhao@google.com>, Minchan Kim <minchan@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Linus Torvalds <torvalds@linux-foundation.org>,
Anshuman Khandual <anshuman.khandual@arm.com>,
linux-mm@kvack.org, linux-arm-kernel@lists.infradead.org,
0day robot <lkp@intel.com>,
lkp@lists.01.org
Subject: Re: [tlb] e242a269fa: WARNING:at_mm/mmu_gather.c:#tlb_gather_mmu
Date: Mon, 23 Nov 2020 17:51:08 +0000 [thread overview]
Message-ID: <20201123175107.GA11688@willie-the-truck> (raw)
In-Reply-To: <20201122151158.GK2390@xsang-OptiPlex-9020>
Hmm, this is interesting but my x86-fu is a bit lacking:
On Sun, Nov 22, 2020 at 11:11:58PM +0800, kernel test robot wrote:
> commit: e242a269fa4b7aee0b157ce5b1d7d12179fc3c44 ("[PATCH 5/6] tlb: mmu_gather: Introduce tlb_gather_mmu_fullmm()")
> url: https://github.com/0day-ci/linux/commits/Will-Deacon/tlb-Fix-access-and-soft-dirty-bit-management/20201120-223809
> base: https://git.kernel.org/cgit/linux/kernel/git/arm64/linux.git for-next/core
[...]
> [ 14.182822] WARNING: CPU: 0 PID: 1 at mm/mmu_gather.c:293 tlb_gather_mmu+0x40/0x99
This fires because free_ldt_pgtables() initialises an mmu_gather() with
an end address > TASK_SIZE. In other words, this code:
unsigned long start = LDT_BASE_ADDR;
unsigned long end = LDT_END_ADDR;
if (!boot_cpu_has(X86_FEATURE_PTI))
return;
tlb_gather_mmu(&tlb, mm, start, end);
seems to be passing kernel addresses to tlb_gather_mmu(), which will cause
the range adjusment logic in __tlb_adjust_range() to round the base down
to TASK_SIZE afaict. At which point, I suspect the low-level invalidation
routine replaces the enormous range with a fullmm flush (see the check in
flush_tlb_mm_range()).
If that's the case (and I would appreciate some input from somebody who
knows what an LDT is), then I think the right answer is to replace this with
a call to tlb_gather_mmu_fullmm, although I haven't ever anticipated these
things working on kernel addresses and whether that would do the right kind
of invalidation for x86 w/ PTI. A quick read of the code suggests it should
work out...
Will
WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org>
To: kernel test robot <oliver.sang@intel.com>
Cc: Yu Zhao <yuzhao@google.com>,
Anshuman Khandual <anshuman.khandual@arm.com>,
Peter Zijlstra <peterz@infradead.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
linux-kernel@vger.kernel.org, linux-mm@kvack.org,
Minchan Kim <minchan@kernel.org>,
lkp@lists.01.org, kernel-team@android.com,
linux-arm-kernel@lists.infradead.org, 0day robot <lkp@intel.com>
Subject: Re: [tlb] e242a269fa: WARNING:at_mm/mmu_gather.c:#tlb_gather_mmu
Date: Mon, 23 Nov 2020 17:51:08 +0000 [thread overview]
Message-ID: <20201123175107.GA11688@willie-the-truck> (raw)
In-Reply-To: <20201122151158.GK2390@xsang-OptiPlex-9020>
Hmm, this is interesting but my x86-fu is a bit lacking:
On Sun, Nov 22, 2020 at 11:11:58PM +0800, kernel test robot wrote:
> commit: e242a269fa4b7aee0b157ce5b1d7d12179fc3c44 ("[PATCH 5/6] tlb: mmu_gather: Introduce tlb_gather_mmu_fullmm()")
> url: https://github.com/0day-ci/linux/commits/Will-Deacon/tlb-Fix-access-and-soft-dirty-bit-management/20201120-223809
> base: https://git.kernel.org/cgit/linux/kernel/git/arm64/linux.git for-next/core
[...]
> [ 14.182822] WARNING: CPU: 0 PID: 1 at mm/mmu_gather.c:293 tlb_gather_mmu+0x40/0x99
This fires because free_ldt_pgtables() initialises an mmu_gather() with
an end address > TASK_SIZE. In other words, this code:
unsigned long start = LDT_BASE_ADDR;
unsigned long end = LDT_END_ADDR;
if (!boot_cpu_has(X86_FEATURE_PTI))
return;
tlb_gather_mmu(&tlb, mm, start, end);
seems to be passing kernel addresses to tlb_gather_mmu(), which will cause
the range adjusment logic in __tlb_adjust_range() to round the base down
to TASK_SIZE afaict. At which point, I suspect the low-level invalidation
routine replaces the enormous range with a fullmm flush (see the check in
flush_tlb_mm_range()).
If that's the case (and I would appreciate some input from somebody who
knows what an LDT is), then I think the right answer is to replace this with
a call to tlb_gather_mmu_fullmm, although I haven't ever anticipated these
things working on kernel addresses and whether that would do the right kind
of invalidation for x86 w/ PTI. A quick read of the code suggests it should
work out...
Will
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next prev parent reply other threads:[~2020-11-23 17:51 UTC|newest]
Thread overview: 91+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-20 14:35 [PATCH 0/6] tlb: Fix access and (soft-)dirty bit management Will Deacon
2020-11-20 14:35 ` Will Deacon
2020-11-20 14:35 ` [PATCH 1/6] arm64: pgtable: Fix pte_accessible() Will Deacon
2020-11-20 14:35 ` Will Deacon
2020-11-20 16:03 ` Minchan Kim
2020-11-20 16:03 ` Minchan Kim
2020-11-20 19:53 ` Yu Zhao
2020-11-20 19:53 ` Yu Zhao
2020-11-23 13:27 ` Catalin Marinas
2020-11-23 13:27 ` Catalin Marinas
2020-11-24 10:02 ` Anshuman Khandual
2020-11-24 10:02 ` Anshuman Khandual
2020-11-20 14:35 ` [PATCH 2/6] arm64: pgtable: Ensure dirty bit is preserved across pte_wrprotect() Will Deacon
2020-11-20 14:35 ` Will Deacon
2020-11-20 17:09 ` Minchan Kim
2020-11-20 17:09 ` Minchan Kim
2020-11-23 14:31 ` Catalin Marinas
2020-11-23 14:31 ` Catalin Marinas
2020-11-23 14:22 ` Catalin Marinas
2020-11-23 14:22 ` Catalin Marinas
2020-11-20 14:35 ` [PATCH 3/6] tlb: mmu_gather: Remove unused start/end arguments from tlb_finish_mmu() Will Deacon
2020-11-20 14:35 ` Will Deacon
2020-11-20 17:20 ` Linus Torvalds
2020-11-20 17:20 ` Linus Torvalds
2020-11-20 17:20 ` Linus Torvalds
2020-11-23 16:48 ` Will Deacon
2020-11-23 16:48 ` Will Deacon
2020-11-20 14:35 ` [PATCH 4/6] mm: proc: Invalidate TLB after clearing soft-dirty page state Will Deacon
2020-11-20 14:35 ` Will Deacon
2020-11-20 15:00 ` Peter Zijlstra
2020-11-20 15:00 ` Peter Zijlstra
2020-11-20 15:09 ` Peter Zijlstra
2020-11-20 15:09 ` Peter Zijlstra
2020-11-20 15:15 ` Will Deacon
2020-11-20 15:15 ` Will Deacon
2020-11-20 15:27 ` Peter Zijlstra
2020-11-20 15:27 ` Peter Zijlstra
2020-11-23 18:23 ` Will Deacon
2020-11-23 18:23 ` Will Deacon
2020-11-20 15:55 ` Minchan Kim
2020-11-20 15:55 ` Minchan Kim
2020-11-23 18:41 ` Will Deacon
2020-11-23 18:41 ` Will Deacon
2020-11-25 22:51 ` Minchan Kim
2020-11-25 22:51 ` Minchan Kim
2020-11-20 20:22 ` Yu Zhao
2020-11-20 20:22 ` Yu Zhao
2020-11-21 2:49 ` Yu Zhao
2020-11-21 2:49 ` Yu Zhao
2020-11-23 19:21 ` Yu Zhao
2020-11-23 19:21 ` Yu Zhao
2020-11-23 22:04 ` Will Deacon
2020-11-23 22:04 ` Will Deacon
2020-11-20 14:35 ` [PATCH 5/6] tlb: mmu_gather: Introduce tlb_gather_mmu_fullmm() Will Deacon
2020-11-20 14:35 ` Will Deacon
2020-11-20 17:22 ` Linus Torvalds
2020-11-20 17:22 ` Linus Torvalds
2020-11-20 17:22 ` Linus Torvalds
2020-11-20 17:31 ` Linus Torvalds
2020-11-20 17:31 ` Linus Torvalds
2020-11-20 17:31 ` Linus Torvalds
2020-11-23 16:48 ` Will Deacon
2020-11-23 16:48 ` Will Deacon
2021-02-01 11:32 ` [tip: core/mm] tlb: mmu_gather: Remove start/end arguments from tlb_gather_mmu() tip-bot2 for Will Deacon
2020-11-22 15:11 ` [tlb] e242a269fa: WARNING:at_mm/mmu_gather.c:#tlb_gather_mmu kernel test robot
2020-11-23 17:51 ` Will Deacon [this message]
2020-11-23 17:51 ` Will Deacon
2020-11-20 14:35 ` [PATCH 6/6] mm: proc: Avoid fullmm flush for young/dirty bit toggling Will Deacon
2020-11-20 14:35 ` Will Deacon
2020-11-20 17:41 ` Linus Torvalds
2020-11-20 17:41 ` Linus Torvalds
2020-11-20 17:41 ` Linus Torvalds
2020-11-20 17:45 ` Linus Torvalds
2020-11-20 17:45 ` Linus Torvalds
2020-11-20 17:45 ` Linus Torvalds
2020-11-20 20:40 ` Yu Zhao
2020-11-20 20:40 ` Yu Zhao
2020-11-23 18:35 ` Will Deacon
2020-11-23 18:35 ` Will Deacon
2020-11-23 20:04 ` Yu Zhao
2020-11-23 20:04 ` Yu Zhao
2020-11-23 21:17 ` Will Deacon
2020-11-23 21:17 ` Will Deacon
2020-11-24 1:13 ` Yu Zhao
2020-11-24 1:13 ` Yu Zhao
2020-11-24 14:31 ` Will Deacon
2020-11-24 14:31 ` Will Deacon
2020-11-25 22:01 ` Minchan Kim
2020-11-25 22:01 ` Minchan Kim
2020-11-24 14:46 ` Peter Zijlstra
2020-11-24 14:46 ` Peter Zijlstra
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