From: "Huang, Sean Z" <sean.z.huang@intel.com>
To: Intel-gfx@lists.freedesktop.org
Cc: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
Subject: [Intel-gfx] [RFC-v3 25/26] drm/i915/pxp: Add plane decryption support
Date: Tue, 1 Dec 2020 15:34:10 -0800 [thread overview]
Message-ID: <20201201233411.21858-26-sean.z.huang@intel.com> (raw)
In-Reply-To: <20201201233411.21858-1-sean.z.huang@intel.com>
From: Anshuman Gupta <anshuman.gupta@intel.com>
Add support to enable/disable PLANE_SURF Decryption Request bit.
It requires only to enable plane decryption support when following
condition met.
1. PAVP session is enabled.
2. Buffer object is protected.
v2:
- Rebased to libva_cp-drm-tip_tgl_cp tree.
- Used gen fb obj user_flags instead gem_object_metadata. [Krishna]
Cc: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
Cc: Huang, Sean Z <sean.z.huang@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
drivers/gpu/drm/i915/display/intel_sprite.c | 21 ++++++++++++++++++---
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 019a2d6d807a..158c8dea0930 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -39,6 +39,8 @@
#include <drm/drm_plane_helper.h>
#include <drm/drm_rect.h>
+#include "pxp/intel_pxp.h"
+
#include "i915_drv.h"
#include "i915_trace.h"
#include "i915_vgpu.h"
@@ -752,6 +754,11 @@ icl_program_input_csc(struct intel_plane *plane,
PLANE_INPUT_CSC_POSTOFF(pipe, plane_id, 2), 0x0);
}
+static bool intel_fb_obj_protected(const struct drm_i915_gem_object *obj)
+{
+ return obj->user_flags & I915_BO_PROTECTED ? true : false;
+}
+
static void
skl_plane_async_flip(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state,
@@ -788,6 +795,7 @@ skl_program_plane(struct intel_plane *plane,
u32 surf_addr = plane_state->color_plane[color_plane].offset;
u32 stride = skl_plane_stride(plane_state, color_plane);
const struct drm_framebuffer *fb = plane_state->hw.fb;
+ const struct drm_i915_gem_object *obj = intel_fb_obj(fb);
int aux_plane = intel_main_to_aux_plane(fb, color_plane);
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
@@ -798,7 +806,7 @@ skl_program_plane(struct intel_plane *plane,
u8 alpha = plane_state->hw.alpha >> 8;
u32 plane_color_ctl = 0, aux_dist = 0;
unsigned long irqflags;
- u32 keymsk, keymax;
+ u32 keymsk, keymax, plane_surf;
u32 plane_ctl = plane_state->ctl;
plane_ctl |= skl_plane_ctl_crtc(crtc_state);
@@ -874,8 +882,15 @@ skl_program_plane(struct intel_plane *plane,
* the control register just before the surface register.
*/
intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
- intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
- intel_plane_ggtt_offset(plane_state) + surf_addr);
+ plane_surf = intel_plane_ggtt_offset(plane_state) + surf_addr;
+
+ if (intel_pxp_gem_object_status(dev_priv) &&
+ intel_fb_obj_protected(obj))
+ plane_surf |= PLANE_SURF_DECRYPTION_ENABLED;
+ else
+ plane_surf &= ~PLANE_SURF_DECRYPTION_ENABLED;
+
+ intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), plane_surf);
if (plane_state->scaler_id >= 0)
skl_program_scaler(plane, crtc_state, plane_state);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 69758935abb8..63d370c38ecd 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7208,6 +7208,7 @@ enum {
#define _PLANE_SURF_3(pipe) _PIPE(pipe, _PLANE_SURF_3_A, _PLANE_SURF_3_B)
#define PLANE_SURF(pipe, plane) \
_MMIO_PLANE(plane, _PLANE_SURF_1(pipe), _PLANE_SURF_2(pipe))
+#define PLANE_SURF_DECRYPTION_ENABLED REG_BIT(2)
#define _PLANE_OFFSET_1_B 0x711a4
#define _PLANE_OFFSET_2_B 0x712a4
--
2.17.1
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next prev parent reply other threads:[~2020-12-01 23:35 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-01 23:33 [Intel-gfx] [RFC-v3 00/26] Introduce Intel PXP component Huang, Sean Z
2020-12-01 23:33 ` [Intel-gfx] [RFC-v3 01/26] drm/i915/pxp: " Huang, Sean Z
2020-12-01 23:33 ` [Intel-gfx] [RFC-v3 02/26] drm/i915/pxp: Enable PXP irq worker and callback stub Huang, Sean Z
2020-12-01 23:33 ` [Intel-gfx] [RFC-v3 03/26] drm/i915/pxp: Add PXP context for logical hardware states Huang, Sean Z
2020-12-01 23:33 ` [Intel-gfx] [RFC-v3 04/26] drm/i915/pxp: set KCR reg init during the boot time Huang, Sean Z
2020-12-01 23:33 ` [Intel-gfx] [RFC-v3 05/26] drm/i915/pxp: Implement ioctl action to set the user space context Huang, Sean Z
2020-12-01 23:33 ` [Intel-gfx] [RFC-v3 06/26] drm/i915/pxp: Add PXP-related registers into allowlist Huang, Sean Z
2020-12-01 23:33 ` [Intel-gfx] [RFC-v3 07/26] drm/i915/pxp: Read register to check hardware session state Huang, Sean Z
2020-12-01 23:33 ` [Intel-gfx] [RFC-v3 08/26] drm/i915/pxp: Implement funcs to get/set PXP tag Huang, Sean Z
2020-12-01 23:33 ` [Intel-gfx] [RFC-v3 09/26] drm/i915/pxp: Implement ioctl action to reserve session slot Huang, Sean Z
2020-12-01 23:33 ` [Intel-gfx] [RFC-v3 10/26] drm/i915/pxp: Implement ioctl action to set session in play Huang, Sean Z
2020-12-01 23:33 ` [Intel-gfx] [RFC-v3 11/26] drm/i915/pxp: Func to send hardware session termination Huang, Sean Z
2020-12-01 23:33 ` [Intel-gfx] [RFC-v3 12/26] drm/i915/pxp: Implement ioctl action to terminate the session Huang, Sean Z
2020-12-01 23:33 ` [Intel-gfx] [RFC-v3 13/26] drm/i915/pxp: Enable ioctl action to query PXP tag Huang, Sean Z
2020-12-01 23:33 ` [Intel-gfx] [RFC-v3 14/26] drm/i915/pxp: Destroy all type0 sessions upon teardown Huang, Sean Z
2020-12-01 23:34 ` [Intel-gfx] [RFC-v3 15/26] drm/i915/pxp: Termiante the session upon app crash Huang, Sean Z
2020-12-01 23:34 ` [Intel-gfx] [RFC-v3 16/26] drm/i915/pxp: Enable PXP power management Huang, Sean Z
2020-12-01 23:34 ` [Intel-gfx] [RFC-v3 17/26] drm/i915/pxp: Implement funcs to create the TEE channel Huang, Sean Z
2020-12-01 23:34 ` [Intel-gfx] [RFC-v3 18/26] drm/i915/pxp: Implement ioctl action to send TEE commands Huang, Sean Z
2020-12-01 23:34 ` [Intel-gfx] [RFC-v3 19/26] drm/i915/pxp: Create the arbitrary session after boot Huang, Sean Z
2020-12-01 23:34 ` [Intel-gfx] [RFC-v3 20/26] drm/i915/pxp: Add i915 trace logs for PXP operations Huang, Sean Z
2020-12-01 23:34 ` [Intel-gfx] [RFC-v3 21/26] drm/i915/pxp: Expose session state for display protection flip Huang, Sean Z
2020-12-01 23:34 ` [Intel-gfx] [RFC-v3 22/26] mei: pxp: export pavp client to me client bus Huang, Sean Z
2020-12-01 23:34 ` [Intel-gfx] [RFC-v3 23/26] drm/i915/uapi: introduce drm_i915_gem_create_ext Huang, Sean Z
2020-12-01 23:34 ` [Intel-gfx] [RFC-v3 24/26] drm/i915/pxp: User interface for Protected buffer Huang, Sean Z
2020-12-01 23:34 ` Huang, Sean Z [this message]
2020-12-01 23:34 ` [Intel-gfx] [RFC-v3 26/26] drm/i915/pxp: Enable the PXP ioctl for protected session Huang, Sean Z
2020-12-01 23:42 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Introduce Intel PXP component (rev2) Patchwork
2020-12-01 23:57 [Intel-gfx] [RFC-v3 00/26] Introduce Intel PXP component Huang, Sean Z
2020-12-01 23:57 ` [Intel-gfx] [RFC-v3 25/26] drm/i915/pxp: Add plane decryption support Huang, Sean Z
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