From: Jianjun Wang <jianjun.wang@mediatek.com>
To: Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Ryder Lee <ryder.lee@mediatek.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
Matthias Brugger <matthias.bgg@gmail.com>,
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>,
<davem@davemloft.net>, <linux-pci@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
Sj Huang <sj.huang@mediatek.com>,
Jianjun Wang <jianjun.wang@mediatek.com>,
<youlin.pei@mediatek.com>, <chuanjia.liu@mediatek.com>,
<qizhong.cheng@mediatek.com>, <sin_jieyang@mediatek.com>
Subject: [v5,0/3] PCI: mediatek: Add new generation controller support
Date: Wed, 2 Dec 2020 21:38:10 +0800 [thread overview]
Message-ID: <20201202133813.6917-1-jianjun.wang@mediatek.com> (raw)
These series patches add pcie-mediatek-gen3.c and dt-bindings file to
support new generation PCIe controller.
Changes in v5:
1. Remove unused macros
2. Modify the config read/write callbacks, set the config byte field
in TLP header and use pci_generic_config_read32/write32
to access the config space
3. Fix the settings of translation window, both MEM and IO regions
works properly
4. Fix typos
Changes in v4:
1. Fix PCIe power up/down flow
2. Use "mac" and "phy" for reset names
3. Add clock names
4. Fix the variables type
Changes in v3:
1. Remove standard property in binding document
2. Return error number when get_optional* API throws an error
3. Use the bulk clk APIs
Changes in v2:
1. Fix the typo of dt-bindings patch
2. Remove the unnecessary properties in binding document
3. dispos the irq mappings of msi top domain when irq teardown
Jianjun Wang (3):
dt-bindings: PCI: mediatek: Add YAML schema
PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192
MAINTAINERS: update entry for MediaTek PCIe controller
.../bindings/pci/mediatek-pcie-gen3.yaml | 135 +++
MAINTAINERS | 1 +
drivers/pci/controller/Kconfig | 13 +
drivers/pci/controller/Makefile | 1 +
drivers/pci/controller/pcie-mediatek-gen3.c | 1039 +++++++++++++++++
5 files changed, 1189 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
create mode 100644 drivers/pci/controller/pcie-mediatek-gen3.c
--
2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Jianjun Wang <jianjun.wang@mediatek.com>
To: Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Ryder Lee <ryder.lee@mediatek.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
qizhong.cheng@mediatek.com, chuanjia.liu@mediatek.com,
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
Jianjun Wang <jianjun.wang@mediatek.com>,
sin_jieyang@mediatek.com, Sj Huang <sj.huang@mediatek.com>,
linux-mediatek@lists.infradead.org,
Philipp Zabel <p.zabel@pengutronix.de>,
Matthias Brugger <matthias.bgg@gmail.com>,
davem@davemloft.net, linux-arm-kernel@lists.infradead.org
Subject: [v5,0/3] PCI: mediatek: Add new generation controller support
Date: Wed, 2 Dec 2020 21:38:10 +0800 [thread overview]
Message-ID: <20201202133813.6917-1-jianjun.wang@mediatek.com> (raw)
These series patches add pcie-mediatek-gen3.c and dt-bindings file to
support new generation PCIe controller.
Changes in v5:
1. Remove unused macros
2. Modify the config read/write callbacks, set the config byte field
in TLP header and use pci_generic_config_read32/write32
to access the config space
3. Fix the settings of translation window, both MEM and IO regions
works properly
4. Fix typos
Changes in v4:
1. Fix PCIe power up/down flow
2. Use "mac" and "phy" for reset names
3. Add clock names
4. Fix the variables type
Changes in v3:
1. Remove standard property in binding document
2. Return error number when get_optional* API throws an error
3. Use the bulk clk APIs
Changes in v2:
1. Fix the typo of dt-bindings patch
2. Remove the unnecessary properties in binding document
3. dispos the irq mappings of msi top domain when irq teardown
Jianjun Wang (3):
dt-bindings: PCI: mediatek: Add YAML schema
PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192
MAINTAINERS: update entry for MediaTek PCIe controller
.../bindings/pci/mediatek-pcie-gen3.yaml | 135 +++
MAINTAINERS | 1 +
drivers/pci/controller/Kconfig | 13 +
drivers/pci/controller/Makefile | 1 +
drivers/pci/controller/pcie-mediatek-gen3.c | 1039 +++++++++++++++++
5 files changed, 1189 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
create mode 100644 drivers/pci/controller/pcie-mediatek-gen3.c
--
2.25.1
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: Jianjun Wang <jianjun.wang@mediatek.com>
To: Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Ryder Lee <ryder.lee@mediatek.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
qizhong.cheng@mediatek.com, chuanjia.liu@mediatek.com,
Mauro Carvalho Chehab <mchehab+huawei@kernel.org>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
Jianjun Wang <jianjun.wang@mediatek.com>,
sin_jieyang@mediatek.com, Sj Huang <sj.huang@mediatek.com>,
linux-mediatek@lists.infradead.org,
Philipp Zabel <p.zabel@pengutronix.de>,
Matthias Brugger <matthias.bgg@gmail.com>,
davem@davemloft.net, linux-arm-kernel@lists.infradead.org
Subject: [v5,0/3] PCI: mediatek: Add new generation controller support
Date: Wed, 2 Dec 2020 21:38:10 +0800 [thread overview]
Message-ID: <20201202133813.6917-1-jianjun.wang@mediatek.com> (raw)
These series patches add pcie-mediatek-gen3.c and dt-bindings file to
support new generation PCIe controller.
Changes in v5:
1. Remove unused macros
2. Modify the config read/write callbacks, set the config byte field
in TLP header and use pci_generic_config_read32/write32
to access the config space
3. Fix the settings of translation window, both MEM and IO regions
works properly
4. Fix typos
Changes in v4:
1. Fix PCIe power up/down flow
2. Use "mac" and "phy" for reset names
3. Add clock names
4. Fix the variables type
Changes in v3:
1. Remove standard property in binding document
2. Return error number when get_optional* API throws an error
3. Use the bulk clk APIs
Changes in v2:
1. Fix the typo of dt-bindings patch
2. Remove the unnecessary properties in binding document
3. dispos the irq mappings of msi top domain when irq teardown
Jianjun Wang (3):
dt-bindings: PCI: mediatek: Add YAML schema
PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192
MAINTAINERS: update entry for MediaTek PCIe controller
.../bindings/pci/mediatek-pcie-gen3.yaml | 135 +++
MAINTAINERS | 1 +
drivers/pci/controller/Kconfig | 13 +
drivers/pci/controller/Makefile | 1 +
drivers/pci/controller/pcie-mediatek-gen3.c | 1039 +++++++++++++++++
5 files changed, 1189 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
create mode 100644 drivers/pci/controller/pcie-mediatek-gen3.c
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next reply other threads:[~2020-12-02 13:39 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-02 13:38 Jianjun Wang [this message]
2020-12-02 13:38 ` [v5,0/3] PCI: mediatek: Add new generation controller support Jianjun Wang
2020-12-02 13:38 ` Jianjun Wang
2020-12-02 13:38 ` [v5,1/3] dt-bindings: PCI: mediatek: Add YAML schema Jianjun Wang
2020-12-02 13:38 ` Jianjun Wang
2020-12-02 13:38 ` Jianjun Wang
2020-12-02 13:38 ` [v5,2/3] PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192 Jianjun Wang
2020-12-02 13:38 ` Jianjun Wang
2020-12-02 13:38 ` Jianjun Wang
2020-12-21 2:18 ` Nicolas Boichat
2020-12-21 2:18 ` Nicolas Boichat
2020-12-21 2:18 ` Nicolas Boichat
2020-12-22 3:38 ` Jianjun Wang
2020-12-22 3:38 ` Jianjun Wang
2020-12-22 3:38 ` Jianjun Wang
2020-12-22 3:55 ` Nicolas Boichat
2020-12-22 3:55 ` Nicolas Boichat
2020-12-22 3:55 ` Nicolas Boichat
2020-12-22 8:38 ` Jianjun Wang
2020-12-22 8:38 ` Jianjun Wang
2020-12-22 8:38 ` Jianjun Wang
2020-12-02 13:38 ` [v5,3/3] MAINTAINERS: Add Jianjun Wang as MediaTek PCI co-maintainer Jianjun Wang
2020-12-02 13:38 ` Jianjun Wang
2020-12-02 13:38 ` Jianjun Wang
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