From: Suzuki K Poulose <suzuki.poulose@arm.com> To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, coresight@lists.linaro.org, mathieu.poirier@linaro.org, leo.yan@linaro.org, mike.leach@linaro.org, anshuman.khandual@arm.com, Suzuki K Poulose <suzuki.poulose@arm.com> Subject: [PATCH v6 04/26] coresight: tpiu: Prepare for using coresight device access abstraction Date: Thu, 7 Jan 2021 12:38:37 +0000 [thread overview] Message-ID: <20210107123859.674252-5-suzuki.poulose@arm.com> (raw) In-Reply-To: <20210107123859.674252-1-suzuki.poulose@arm.com> Prepare the TPIU driver to make use of the CoreSight device access abstraction layer. The driver touches the device even before the coresight device is registered. Thus we could be accessing the devices without a csdev. As we are about to use the abstraction layer for accessing the device, pass in the access directly to avoid having to deal with the un-initialised csdev. Cc: Mike Leach <mike.leach@linaro.org> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> --- drivers/hwtracing/coresight/coresight-tpiu.c | 30 +++++++++----------- 1 file changed, 13 insertions(+), 17 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtracing/coresight/coresight-tpiu.c index 6ca396799883..a12b6ee0a576 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -60,49 +60,45 @@ struct tpiu_drvdata { struct coresight_device *csdev; }; -static void tpiu_enable_hw(struct tpiu_drvdata *drvdata) +static void tpiu_enable_hw(struct csdev_access *csa) { - CS_UNLOCK(drvdata->base); + CS_UNLOCK(csa->base); /* TODO: fill this up */ - CS_LOCK(drvdata->base); + CS_LOCK(csa->base); } static int tpiu_enable(struct coresight_device *csdev, u32 mode, void *__unused) { - struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - - tpiu_enable_hw(drvdata); + tpiu_enable_hw(&csdev->access); atomic_inc(csdev->refcnt); dev_dbg(&csdev->dev, "TPIU enabled\n"); return 0; } -static void tpiu_disable_hw(struct tpiu_drvdata *drvdata) +static void tpiu_disable_hw(struct csdev_access *csa) { - CS_UNLOCK(drvdata->base); + CS_UNLOCK(csa->base); /* Clear formatter and stop on flush */ - writel_relaxed(FFCR_STOP_FI, drvdata->base + TPIU_FFCR); + csdev_access_relaxed_write32(csa, FFCR_STOP_FI, TPIU_FFCR); /* Generate manual flush */ - writel_relaxed(FFCR_STOP_FI | FFCR_FON_MAN, drvdata->base + TPIU_FFCR); + csdev_access_relaxed_write32(csa, FFCR_STOP_FI | FFCR_FON_MAN, TPIU_FFCR); /* Wait for flush to complete */ - coresight_timeout(drvdata->base, TPIU_FFCR, FFCR_FON_MAN_BIT, 0); + coresight_timeout(csa->base, TPIU_FFCR, FFCR_FON_MAN_BIT, 0); /* Wait for formatter to stop */ - coresight_timeout(drvdata->base, TPIU_FFSR, FFSR_FT_STOPPED_BIT, 1); + coresight_timeout(csa->base, TPIU_FFSR, FFSR_FT_STOPPED_BIT, 1); - CS_LOCK(drvdata->base); + CS_LOCK(csa->base); } static int tpiu_disable(struct coresight_device *csdev) { - struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - if (atomic_dec_return(csdev->refcnt)) return -EBUSY; - tpiu_disable_hw(drvdata); + tpiu_disable_hw(&csdev->access); dev_dbg(&csdev->dev, "TPIU disabled\n"); return 0; @@ -152,7 +148,7 @@ static int tpiu_probe(struct amba_device *adev, const struct amba_id *id) desc.access = CSDEV_ACCESS_IOMEM(base); /* Disable tpiu to support older devices */ - tpiu_disable_hw(drvdata); + tpiu_disable_hw(&desc.access); pdata = coresight_get_platform_data(dev); if (IS_ERR(pdata)) -- 2.24.1
WARNING: multiple messages have this Message-ID (diff)
From: Suzuki K Poulose <suzuki.poulose@arm.com> To: linux-arm-kernel@lists.infradead.org Cc: mathieu.poirier@linaro.org, anshuman.khandual@arm.com, coresight@lists.linaro.org, Suzuki K Poulose <suzuki.poulose@arm.com>, linux-kernel@vger.kernel.org, leo.yan@linaro.org, mike.leach@linaro.org Subject: [PATCH v6 04/26] coresight: tpiu: Prepare for using coresight device access abstraction Date: Thu, 7 Jan 2021 12:38:37 +0000 [thread overview] Message-ID: <20210107123859.674252-5-suzuki.poulose@arm.com> (raw) In-Reply-To: <20210107123859.674252-1-suzuki.poulose@arm.com> Prepare the TPIU driver to make use of the CoreSight device access abstraction layer. The driver touches the device even before the coresight device is registered. Thus we could be accessing the devices without a csdev. As we are about to use the abstraction layer for accessing the device, pass in the access directly to avoid having to deal with the un-initialised csdev. Cc: Mike Leach <mike.leach@linaro.org> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> --- drivers/hwtracing/coresight/coresight-tpiu.c | 30 +++++++++----------- 1 file changed, 13 insertions(+), 17 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtracing/coresight/coresight-tpiu.c index 6ca396799883..a12b6ee0a576 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -60,49 +60,45 @@ struct tpiu_drvdata { struct coresight_device *csdev; }; -static void tpiu_enable_hw(struct tpiu_drvdata *drvdata) +static void tpiu_enable_hw(struct csdev_access *csa) { - CS_UNLOCK(drvdata->base); + CS_UNLOCK(csa->base); /* TODO: fill this up */ - CS_LOCK(drvdata->base); + CS_LOCK(csa->base); } static int tpiu_enable(struct coresight_device *csdev, u32 mode, void *__unused) { - struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - - tpiu_enable_hw(drvdata); + tpiu_enable_hw(&csdev->access); atomic_inc(csdev->refcnt); dev_dbg(&csdev->dev, "TPIU enabled\n"); return 0; } -static void tpiu_disable_hw(struct tpiu_drvdata *drvdata) +static void tpiu_disable_hw(struct csdev_access *csa) { - CS_UNLOCK(drvdata->base); + CS_UNLOCK(csa->base); /* Clear formatter and stop on flush */ - writel_relaxed(FFCR_STOP_FI, drvdata->base + TPIU_FFCR); + csdev_access_relaxed_write32(csa, FFCR_STOP_FI, TPIU_FFCR); /* Generate manual flush */ - writel_relaxed(FFCR_STOP_FI | FFCR_FON_MAN, drvdata->base + TPIU_FFCR); + csdev_access_relaxed_write32(csa, FFCR_STOP_FI | FFCR_FON_MAN, TPIU_FFCR); /* Wait for flush to complete */ - coresight_timeout(drvdata->base, TPIU_FFCR, FFCR_FON_MAN_BIT, 0); + coresight_timeout(csa->base, TPIU_FFCR, FFCR_FON_MAN_BIT, 0); /* Wait for formatter to stop */ - coresight_timeout(drvdata->base, TPIU_FFSR, FFSR_FT_STOPPED_BIT, 1); + coresight_timeout(csa->base, TPIU_FFSR, FFSR_FT_STOPPED_BIT, 1); - CS_LOCK(drvdata->base); + CS_LOCK(csa->base); } static int tpiu_disable(struct coresight_device *csdev) { - struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - if (atomic_dec_return(csdev->refcnt)) return -EBUSY; - tpiu_disable_hw(drvdata); + tpiu_disable_hw(&csdev->access); dev_dbg(&csdev->dev, "TPIU disabled\n"); return 0; @@ -152,7 +148,7 @@ static int tpiu_probe(struct amba_device *adev, const struct amba_id *id) desc.access = CSDEV_ACCESS_IOMEM(base); /* Disable tpiu to support older devices */ - tpiu_disable_hw(drvdata); + tpiu_disable_hw(&desc.access); pdata = coresight_get_platform_data(dev); if (IS_ERR(pdata)) -- 2.24.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-01-07 12:40 UTC|newest] Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-01-07 12:38 [PATCH v6 00/26] coresight: etm4x: Support for system instructions Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-07 12:38 ` [PATCH v6 01/26] coresight: etm4x: Handle access to TRCSSPCICRn Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-07 12:38 ` [PATCH v6 02/26] coresight: etm4x: Skip accessing TRCPDCR in save/restore Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-07 12:38 ` [PATCH v6 03/26] coresight: Introduce device access abstraction Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-07 23:38 ` Mathieu Poirier 2021-01-07 23:38 ` Mathieu Poirier 2021-01-07 12:38 ` Suzuki K Poulose [this message] 2021-01-07 12:38 ` [PATCH v6 04/26] coresight: tpiu: Prepare for using coresight " Suzuki K Poulose 2021-01-07 12:38 ` [PATCH v6 05/26] coresight: Convert coresight_timeout to use " Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-07 12:38 ` [PATCH v6 06/26] coresight: Convert claim/disclaim operations to use access wrappers Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-07 12:38 ` [PATCH v6 07/26] coresight: etm4x: Always read the registers on the host CPU Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-07 12:38 ` [PATCH v6 08/26] coresight: etm4x: Convert all register accesses Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-07 12:38 ` [PATCH v6 09/26] coresight: etm4x: Add commentary on the registers Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-07 12:38 ` [PATCH v6 10/26] coresight: etm4x: Add sysreg access helpers Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-07 12:38 ` [PATCH v6 11/26] coresight: etm4x: Define DEVARCH register fields Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-07 12:38 ` [PATCH v6 12/26] coresight: etm4x: Check for Software Lock Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-08 0:18 ` Mathieu Poirier 2021-01-08 0:18 ` Mathieu Poirier 2021-01-07 12:38 ` [PATCH v6 13/26] coresight: etm4x: Cleanup secure exception level masks Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-07 12:38 ` [PATCH v6 14/26] coresight: etm4x: Clean up " Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-07 12:38 ` [PATCH v6 15/26] coresight: etm4x: Handle ETM architecture version Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-07 12:38 ` [PATCH v6 16/26] coresight: etm4x: Detect access early on the target CPU Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-07 12:38 ` [PATCH v6 17/26] coresight: etm4x: Use TRCDEVARCH for component discovery Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-07 12:38 ` [PATCH v6 18/26] coresight: etm4x: Expose trcdevarch via sysfs Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-07 12:38 ` [PATCH v6 19/26] coresight: etm4x: Add necessary synchronization for sysreg access Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-07 12:38 ` [PATCH v6 20/26] coresight: etm4x: Detect system instructions support Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-07 12:38 ` [PATCH v6 21/26] coresight: etm4x: Refactor probing routine Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-08 0:38 ` Mathieu Poirier 2021-01-08 0:38 ` Mathieu Poirier 2021-01-07 12:38 ` [PATCH v6 22/26] coresight: etm4x: Run arch feature detection on the CPU Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-08 0:49 ` Mathieu Poirier 2021-01-08 0:49 ` Mathieu Poirier 2021-01-07 12:38 ` [PATCH v6 23/26] coresight: etm4x: Add support for sysreg only devices Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-08 0:55 ` Mathieu Poirier 2021-01-08 0:55 ` Mathieu Poirier 2021-01-07 12:38 ` [PATCH v6 24/26] dts: bindings: coresight: ETM system register access only units Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-07 12:38 ` [PATCH v6 25/26] arm64: Add TRFCR_ELx definitions Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-08 1:01 ` Mathieu Poirier 2021-01-08 1:01 ` Mathieu Poirier 2021-01-07 12:38 ` [PATCH v6 26/26] coresight: Add support for v8.4 SelfHosted tracing Suzuki K Poulose 2021-01-07 12:38 ` Suzuki K Poulose 2021-01-08 1:02 ` Mathieu Poirier 2021-01-08 1:02 ` Mathieu Poirier 2021-01-08 1:09 ` [PATCH v6 00/26] coresight: etm4x: Support for system instructions Mathieu Poirier 2021-01-08 1:09 ` Mathieu Poirier 2021-01-08 9:08 ` Suzuki K Poulose 2021-01-08 9:08 ` Suzuki K Poulose 2021-01-08 14:15 ` Suzuki K Poulose 2021-01-08 14:15 ` Suzuki K Poulose
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