From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>
Cc: Krzysztof Kozlowski <krzk@kernel.org>,
Evan Green <evgreen@chromium.org>, Tomasz Figa <tfiga@google.com>,
<linux-mediatek@lists.infradead.org>,
<srv_heupstream@mediatek.com>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<iommu@lists.linux-foundation.org>, <yong.wu@mediatek.com>,
<youlin.pei@mediatek.com>,
Nicolas Boichat <drinkcat@chromium.org>, <anan.sun@mediatek.com>,
<chao.hao@mediatek.com>
Subject: [PATCH v6 22/33] iommu/mediatek: Support report iova 34bit translation fault in ISR
Date: Mon, 11 Jan 2021 19:19:03 +0800 [thread overview]
Message-ID: <20210111111914.22211-23-yong.wu@mediatek.com> (raw)
In-Reply-To: <20210111111914.22211-1-yong.wu@mediatek.com>
If the iova is over 32bit, the fault status register bit is a little
different.
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
---
drivers/iommu/mtk_iommu.c | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 468be7ca62e4..f3666b0d7577 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -3,6 +3,7 @@
* Copyright (c) 2015-2016 MediaTek Inc.
* Author: Yong Wu <yong.wu@mediatek.com>
*/
+#include <linux/bitfield.h>
#include <linux/bug.h>
#include <linux/clk.h>
#include <linux/component.h>
@@ -89,6 +90,9 @@
#define F_REG_MMU1_FAULT_MASK GENMASK(13, 7)
#define REG_MMU0_FAULT_VA 0x13c
+#define F_MMU_INVAL_VA_31_12_MASK GENMASK(31, 12)
+#define F_MMU_INVAL_VA_34_32_MASK GENMASK(11, 9)
+#define F_MMU_INVAL_PA_34_32_MASK GENMASK(8, 6)
#define F_MMU_FAULT_VA_WRITE_BIT BIT(1)
#define F_MMU_FAULT_VA_LAYER_BIT BIT(0)
@@ -246,8 +250,9 @@ static irqreturn_t mtk_iommu_isr(int irq, void *dev_id)
{
struct mtk_iommu_data *data = dev_id;
struct mtk_iommu_domain *dom = data->m4u_dom;
- u32 int_state, regval, fault_iova, fault_pa;
unsigned int fault_larb, fault_port, sub_comm = 0;
+ u32 int_state, regval, va34_32, pa34_32;
+ u64 fault_iova, fault_pa;
bool layer, write;
/* Read error info from registers */
@@ -263,6 +268,14 @@ static irqreturn_t mtk_iommu_isr(int irq, void *dev_id)
}
layer = fault_iova & F_MMU_FAULT_VA_LAYER_BIT;
write = fault_iova & F_MMU_FAULT_VA_WRITE_BIT;
+ if (MTK_IOMMU_HAS_FLAG(data->plat_data, IOVA_34_EN)) {
+ va34_32 = FIELD_GET(F_MMU_INVAL_VA_34_32_MASK, fault_iova);
+ pa34_32 = FIELD_GET(F_MMU_INVAL_PA_34_32_MASK, fault_iova);
+ fault_iova = fault_iova & F_MMU_INVAL_VA_31_12_MASK;
+ fault_iova |= (u64)va34_32 << 32;
+ fault_pa |= (u64)pa34_32 << 32;
+ }
+
fault_port = F_MMU_INT_ID_PORT_ID(regval);
if (MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_SUB_COMM)) {
fault_larb = F_MMU_INT_ID_COMM_ID(regval);
@@ -276,7 +289,7 @@ static irqreturn_t mtk_iommu_isr(int irq, void *dev_id)
write ? IOMMU_FAULT_WRITE : IOMMU_FAULT_READ)) {
dev_err_ratelimited(
data->dev,
- "fault type=0x%x iova=0x%x pa=0x%x larb=%d port=%d layer=%d %s\n",
+ "fault type=0x%x iova=0x%llx pa=0x%llx larb=%d port=%d layer=%d %s\n",
int_state, fault_iova, fault_pa, fault_larb, fault_port,
layer, write ? "write" : "read");
}
--
2.18.0
WARNING: multiple messages have this Message-ID (diff)
From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
Nicolas Boichat <drinkcat@chromium.org>,
srv_heupstream@mediatek.com, chao.hao@mediatek.com,
linux-kernel@vger.kernel.org, Evan Green <evgreen@chromium.org>,
Tomasz Figa <tfiga@google.com>,
iommu@lists.linux-foundation.org,
linux-mediatek@lists.infradead.org,
Krzysztof Kozlowski <krzk@kernel.org>,
anan.sun@mediatek.com, linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 22/33] iommu/mediatek: Support report iova 34bit translation fault in ISR
Date: Mon, 11 Jan 2021 19:19:03 +0800 [thread overview]
Message-ID: <20210111111914.22211-23-yong.wu@mediatek.com> (raw)
In-Reply-To: <20210111111914.22211-1-yong.wu@mediatek.com>
If the iova is over 32bit, the fault status register bit is a little
different.
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
---
drivers/iommu/mtk_iommu.c | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 468be7ca62e4..f3666b0d7577 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -3,6 +3,7 @@
* Copyright (c) 2015-2016 MediaTek Inc.
* Author: Yong Wu <yong.wu@mediatek.com>
*/
+#include <linux/bitfield.h>
#include <linux/bug.h>
#include <linux/clk.h>
#include <linux/component.h>
@@ -89,6 +90,9 @@
#define F_REG_MMU1_FAULT_MASK GENMASK(13, 7)
#define REG_MMU0_FAULT_VA 0x13c
+#define F_MMU_INVAL_VA_31_12_MASK GENMASK(31, 12)
+#define F_MMU_INVAL_VA_34_32_MASK GENMASK(11, 9)
+#define F_MMU_INVAL_PA_34_32_MASK GENMASK(8, 6)
#define F_MMU_FAULT_VA_WRITE_BIT BIT(1)
#define F_MMU_FAULT_VA_LAYER_BIT BIT(0)
@@ -246,8 +250,9 @@ static irqreturn_t mtk_iommu_isr(int irq, void *dev_id)
{
struct mtk_iommu_data *data = dev_id;
struct mtk_iommu_domain *dom = data->m4u_dom;
- u32 int_state, regval, fault_iova, fault_pa;
unsigned int fault_larb, fault_port, sub_comm = 0;
+ u32 int_state, regval, va34_32, pa34_32;
+ u64 fault_iova, fault_pa;
bool layer, write;
/* Read error info from registers */
@@ -263,6 +268,14 @@ static irqreturn_t mtk_iommu_isr(int irq, void *dev_id)
}
layer = fault_iova & F_MMU_FAULT_VA_LAYER_BIT;
write = fault_iova & F_MMU_FAULT_VA_WRITE_BIT;
+ if (MTK_IOMMU_HAS_FLAG(data->plat_data, IOVA_34_EN)) {
+ va34_32 = FIELD_GET(F_MMU_INVAL_VA_34_32_MASK, fault_iova);
+ pa34_32 = FIELD_GET(F_MMU_INVAL_PA_34_32_MASK, fault_iova);
+ fault_iova = fault_iova & F_MMU_INVAL_VA_31_12_MASK;
+ fault_iova |= (u64)va34_32 << 32;
+ fault_pa |= (u64)pa34_32 << 32;
+ }
+
fault_port = F_MMU_INT_ID_PORT_ID(regval);
if (MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_SUB_COMM)) {
fault_larb = F_MMU_INT_ID_COMM_ID(regval);
@@ -276,7 +289,7 @@ static irqreturn_t mtk_iommu_isr(int irq, void *dev_id)
write ? IOMMU_FAULT_WRITE : IOMMU_FAULT_READ)) {
dev_err_ratelimited(
data->dev,
- "fault type=0x%x iova=0x%x pa=0x%x larb=%d port=%d layer=%d %s\n",
+ "fault type=0x%x iova=0x%llx pa=0x%llx larb=%d port=%d layer=%d %s\n",
int_state, fault_iova, fault_pa, fault_larb, fault_port,
layer, write ? "write" : "read");
}
--
2.18.0
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
WARNING: multiple messages have this Message-ID (diff)
From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
Nicolas Boichat <drinkcat@chromium.org>,
srv_heupstream@mediatek.com, chao.hao@mediatek.com,
linux-kernel@vger.kernel.org, Evan Green <evgreen@chromium.org>,
yong.wu@mediatek.com, Tomasz Figa <tfiga@google.com>,
iommu@lists.linux-foundation.org,
linux-mediatek@lists.infradead.org,
Krzysztof Kozlowski <krzk@kernel.org>,
anan.sun@mediatek.com, linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 22/33] iommu/mediatek: Support report iova 34bit translation fault in ISR
Date: Mon, 11 Jan 2021 19:19:03 +0800 [thread overview]
Message-ID: <20210111111914.22211-23-yong.wu@mediatek.com> (raw)
In-Reply-To: <20210111111914.22211-1-yong.wu@mediatek.com>
If the iova is over 32bit, the fault status register bit is a little
different.
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
---
drivers/iommu/mtk_iommu.c | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 468be7ca62e4..f3666b0d7577 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -3,6 +3,7 @@
* Copyright (c) 2015-2016 MediaTek Inc.
* Author: Yong Wu <yong.wu@mediatek.com>
*/
+#include <linux/bitfield.h>
#include <linux/bug.h>
#include <linux/clk.h>
#include <linux/component.h>
@@ -89,6 +90,9 @@
#define F_REG_MMU1_FAULT_MASK GENMASK(13, 7)
#define REG_MMU0_FAULT_VA 0x13c
+#define F_MMU_INVAL_VA_31_12_MASK GENMASK(31, 12)
+#define F_MMU_INVAL_VA_34_32_MASK GENMASK(11, 9)
+#define F_MMU_INVAL_PA_34_32_MASK GENMASK(8, 6)
#define F_MMU_FAULT_VA_WRITE_BIT BIT(1)
#define F_MMU_FAULT_VA_LAYER_BIT BIT(0)
@@ -246,8 +250,9 @@ static irqreturn_t mtk_iommu_isr(int irq, void *dev_id)
{
struct mtk_iommu_data *data = dev_id;
struct mtk_iommu_domain *dom = data->m4u_dom;
- u32 int_state, regval, fault_iova, fault_pa;
unsigned int fault_larb, fault_port, sub_comm = 0;
+ u32 int_state, regval, va34_32, pa34_32;
+ u64 fault_iova, fault_pa;
bool layer, write;
/* Read error info from registers */
@@ -263,6 +268,14 @@ static irqreturn_t mtk_iommu_isr(int irq, void *dev_id)
}
layer = fault_iova & F_MMU_FAULT_VA_LAYER_BIT;
write = fault_iova & F_MMU_FAULT_VA_WRITE_BIT;
+ if (MTK_IOMMU_HAS_FLAG(data->plat_data, IOVA_34_EN)) {
+ va34_32 = FIELD_GET(F_MMU_INVAL_VA_34_32_MASK, fault_iova);
+ pa34_32 = FIELD_GET(F_MMU_INVAL_PA_34_32_MASK, fault_iova);
+ fault_iova = fault_iova & F_MMU_INVAL_VA_31_12_MASK;
+ fault_iova |= (u64)va34_32 << 32;
+ fault_pa |= (u64)pa34_32 << 32;
+ }
+
fault_port = F_MMU_INT_ID_PORT_ID(regval);
if (MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_SUB_COMM)) {
fault_larb = F_MMU_INT_ID_COMM_ID(regval);
@@ -276,7 +289,7 @@ static irqreturn_t mtk_iommu_isr(int irq, void *dev_id)
write ? IOMMU_FAULT_WRITE : IOMMU_FAULT_READ)) {
dev_err_ratelimited(
data->dev,
- "fault type=0x%x iova=0x%x pa=0x%x larb=%d port=%d layer=%d %s\n",
+ "fault type=0x%x iova=0x%llx pa=0x%llx larb=%d port=%d layer=%d %s\n",
int_state, fault_iova, fault_pa, fault_larb, fault_port,
layer, write ? "write" : "read");
}
--
2.18.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>, Rob Herring <robh+dt@kernel.org>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
Nicolas Boichat <drinkcat@chromium.org>,
srv_heupstream@mediatek.com, chao.hao@mediatek.com,
linux-kernel@vger.kernel.org, Evan Green <evgreen@chromium.org>,
yong.wu@mediatek.com, Tomasz Figa <tfiga@google.com>,
iommu@lists.linux-foundation.org,
linux-mediatek@lists.infradead.org,
Krzysztof Kozlowski <krzk@kernel.org>,
anan.sun@mediatek.com, linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 22/33] iommu/mediatek: Support report iova 34bit translation fault in ISR
Date: Mon, 11 Jan 2021 19:19:03 +0800 [thread overview]
Message-ID: <20210111111914.22211-23-yong.wu@mediatek.com> (raw)
In-Reply-To: <20210111111914.22211-1-yong.wu@mediatek.com>
If the iova is over 32bit, the fault status register bit is a little
different.
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
---
drivers/iommu/mtk_iommu.c | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 468be7ca62e4..f3666b0d7577 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -3,6 +3,7 @@
* Copyright (c) 2015-2016 MediaTek Inc.
* Author: Yong Wu <yong.wu@mediatek.com>
*/
+#include <linux/bitfield.h>
#include <linux/bug.h>
#include <linux/clk.h>
#include <linux/component.h>
@@ -89,6 +90,9 @@
#define F_REG_MMU1_FAULT_MASK GENMASK(13, 7)
#define REG_MMU0_FAULT_VA 0x13c
+#define F_MMU_INVAL_VA_31_12_MASK GENMASK(31, 12)
+#define F_MMU_INVAL_VA_34_32_MASK GENMASK(11, 9)
+#define F_MMU_INVAL_PA_34_32_MASK GENMASK(8, 6)
#define F_MMU_FAULT_VA_WRITE_BIT BIT(1)
#define F_MMU_FAULT_VA_LAYER_BIT BIT(0)
@@ -246,8 +250,9 @@ static irqreturn_t mtk_iommu_isr(int irq, void *dev_id)
{
struct mtk_iommu_data *data = dev_id;
struct mtk_iommu_domain *dom = data->m4u_dom;
- u32 int_state, regval, fault_iova, fault_pa;
unsigned int fault_larb, fault_port, sub_comm = 0;
+ u32 int_state, regval, va34_32, pa34_32;
+ u64 fault_iova, fault_pa;
bool layer, write;
/* Read error info from registers */
@@ -263,6 +268,14 @@ static irqreturn_t mtk_iommu_isr(int irq, void *dev_id)
}
layer = fault_iova & F_MMU_FAULT_VA_LAYER_BIT;
write = fault_iova & F_MMU_FAULT_VA_WRITE_BIT;
+ if (MTK_IOMMU_HAS_FLAG(data->plat_data, IOVA_34_EN)) {
+ va34_32 = FIELD_GET(F_MMU_INVAL_VA_34_32_MASK, fault_iova);
+ pa34_32 = FIELD_GET(F_MMU_INVAL_PA_34_32_MASK, fault_iova);
+ fault_iova = fault_iova & F_MMU_INVAL_VA_31_12_MASK;
+ fault_iova |= (u64)va34_32 << 32;
+ fault_pa |= (u64)pa34_32 << 32;
+ }
+
fault_port = F_MMU_INT_ID_PORT_ID(regval);
if (MTK_IOMMU_HAS_FLAG(data->plat_data, HAS_SUB_COMM)) {
fault_larb = F_MMU_INT_ID_COMM_ID(regval);
@@ -276,7 +289,7 @@ static irqreturn_t mtk_iommu_isr(int irq, void *dev_id)
write ? IOMMU_FAULT_WRITE : IOMMU_FAULT_READ)) {
dev_err_ratelimited(
data->dev,
- "fault type=0x%x iova=0x%x pa=0x%x larb=%d port=%d layer=%d %s\n",
+ "fault type=0x%x iova=0x%llx pa=0x%llx larb=%d port=%d layer=%d %s\n",
int_state, fault_iova, fault_pa, fault_larb, fault_port,
layer, write ? "write" : "read");
}
--
2.18.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-01-11 11:23 UTC|newest]
Thread overview: 206+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-11 11:18 [PATCH v6 00/33] MT8192 IOMMU support Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` [PATCH v6 01/33] dt-bindings: iommu: mediatek: Convert IOMMU to DT schema Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` [PATCH v6 02/33] dt-bindings: memory: mediatek: Add a common memory header file Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` [PATCH v6 03/33] dt-bindings: memory: mediatek: Extend LARB_NR_MAX to 32 Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` [PATCH v6 04/33] dt-bindings: memory: mediatek: Rename header guard for SMI header file Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` [PATCH v6 05/33] dt-bindings: mediatek: Add binding for mt8192 IOMMU Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` [PATCH v6 06/33] of/device: Move dma_range_map before of_iommu_configure Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-14 19:27 ` Rob Herring
2021-01-14 19:27 ` Rob Herring
2021-01-14 19:27 ` Rob Herring
2021-01-14 19:27 ` Rob Herring
2021-01-15 5:30 ` Yong Wu
2021-01-15 5:30 ` Yong Wu
2021-01-15 5:30 ` Yong Wu
2021-01-15 5:30 ` Yong Wu
2021-01-18 15:49 ` Robin Murphy
2021-01-18 15:49 ` Robin Murphy
2021-01-18 15:49 ` Robin Murphy
2021-01-18 15:49 ` Robin Murphy
2021-01-19 9:13 ` Paul Kocialkowski
2021-01-19 9:13 ` Paul Kocialkowski
2021-01-19 9:13 ` Paul Kocialkowski
2021-01-19 9:13 ` Paul Kocialkowski
2021-01-19 9:20 ` Yong Wu
2021-01-19 9:20 ` Yong Wu
2021-01-19 9:20 ` Yong Wu
2021-01-19 9:20 ` Yong Wu
2021-01-19 9:37 ` Paul Kocialkowski
2021-01-19 9:37 ` Paul Kocialkowski
2021-01-19 9:37 ` Paul Kocialkowski
2021-01-19 9:37 ` Paul Kocialkowski
2021-01-11 11:18 ` [PATCH v6 07/33] iommu: Avoid reallocate default domain for a group Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-26 22:23 ` Will Deacon
2021-01-26 22:23 ` Will Deacon
2021-01-26 22:23 ` Will Deacon
2021-01-26 22:23 ` Will Deacon
2021-01-27 9:39 ` Yong Wu
2021-01-27 9:39 ` Yong Wu
2021-01-27 9:39 ` Yong Wu
2021-01-27 9:39 ` Yong Wu
2021-01-28 21:10 ` Will Deacon
2021-01-28 21:10 ` Will Deacon
2021-01-28 21:10 ` Will Deacon
2021-01-28 21:10 ` Will Deacon
2021-01-28 21:14 ` Will Deacon
2021-01-28 21:14 ` Will Deacon
2021-01-28 21:14 ` Will Deacon
2021-01-28 21:14 ` Will Deacon
2021-01-29 0:03 ` Robin Murphy
2021-01-29 0:03 ` Robin Murphy
2021-01-29 0:03 ` Robin Murphy
2021-01-29 0:03 ` Robin Murphy
2021-01-29 1:52 ` Yong Wu
2021-01-29 1:52 ` Yong Wu
2021-01-29 1:52 ` Yong Wu
2021-01-29 1:52 ` Yong Wu
2021-01-29 8:47 ` Will Deacon
2021-01-29 8:47 ` Will Deacon
2021-01-29 8:47 ` Will Deacon
2021-01-11 11:18 ` [PATCH v6 08/33] iommu/mediatek: Use the common mtk-memory-port.h Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` [PATCH v6 09/33] iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` [PATCH v6 10/33] iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` [PATCH v6 11/33] iommu/io-pgtable-arm-v7s: Clarify LVL_SHIFT/BITS macro Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` [PATCH v6 12/33] iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` [PATCH v6 13/33] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` [PATCH v6 14/33] iommu/mediatek: Add a flag for iova 34bits case Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` [PATCH v6 15/33] iommu/mediatek: Update oas for v7s Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` [PATCH v6 16/33] iommu/mediatek: Move hw_init into attach_device Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` [PATCH v6 17/33] iommu/mediatek: Add error handle for mtk_iommu_probe Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` [PATCH v6 18/33] iommu/mediatek: Add device link for smi-common and m4u Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:18 ` Yong Wu
2021-01-11 11:19 ` [PATCH v6 19/33] iommu/mediatek: Add pm runtime callback Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` [PATCH v6 20/33] iommu/mediatek: Add power-domain operation Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` [PATCH v6 21/33] iommu/mediatek: Support up to 34bit iova in tlb flush Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu [this message]
2021-01-11 11:19 ` [PATCH v6 22/33] iommu/mediatek: Support report iova 34bit translation fault in ISR Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` [PATCH v6 23/33] iommu/mediatek: Adjust the structure Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` [PATCH v6 24/33] iommu/mediatek: Move domain_finalise into attach_device Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` [PATCH v6 25/33] iommu/mediatek: Move geometry.aperture updating into domain_finalise Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` [PATCH v6 26/33] iommu/mediatek: Add iova_region structure Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` [PATCH v6 27/33] iommu/mediatek: Add get_domain_id from dev->dma_range_map Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` [PATCH v6 28/33] iommu/mediatek: Support for multi domains Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` [PATCH v6 29/33] iommu/mediatek: Add iova reserved function Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` [PATCH v6 30/33] iommu/mediatek: Support master use iova over 32bit Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` [PATCH v6 31/33] iommu/mediatek: Remove unnecessary check in attach_device Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` [PATCH v6 32/33] iommu/mediatek: Add mt8192 support Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` [PATCH v6 33/33] MAINTAINERS: Add entry for MediaTek IOMMU Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-11 11:19 ` Yong Wu
2021-01-26 22:25 ` [PATCH v6 00/33] MT8192 IOMMU support Will Deacon
2021-01-26 22:25 ` Will Deacon
2021-01-26 22:25 ` Will Deacon
2021-01-26 22:25 ` Will Deacon
2021-01-29 11:27 ` Tomasz Figa
2021-01-29 11:27 ` Tomasz Figa
2021-01-29 11:27 ` Tomasz Figa
2021-02-01 14:54 ` Will Deacon
2021-02-01 14:54 ` Will Deacon
2021-02-01 14:54 ` Will Deacon
2021-02-01 14:54 ` Will Deacon
2021-02-02 2:03 ` Yong Wu
2021-02-02 2:03 ` Yong Wu
2021-02-02 2:03 ` Yong Wu
2021-02-02 2:03 ` Yong Wu
2021-02-02 13:33 ` Will Deacon
2021-02-02 13:33 ` Will Deacon
2021-02-02 13:33 ` Will Deacon
2021-02-02 13:33 ` Will Deacon
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