From: "Pali Rohár" <pali@kernel.org> To: Gregory Clement <gregory.clement@bootlin.com>, Andrew Lunn <andrew@lunn.ch>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: "Marek Behún" <kabel@kernel.org>, "Miquel Raynal" <miquel.raynal@bootlin.com>, "Tomasz Maciej Nowak" <tmn505@gmail.com>, "Luka Perkov" <luka.perkov@sartura.hr>, "Andre Heider" <a.heider@gmail.com>, "Vladimir Vid" <vladimir.vid@sartura.hr>, "Russell King" <rmk+kernel@armlinux.org.uk>, "Gérald Kerma" <gerald@gk2.net>, "Konstantin Porotchkin" <kostap@marvell.com> Subject: [PATCH mvebu v2 05/10] clk: mvebu: armada-37xx-periph: Fix switching CPU freq from 250 Mhz to 1 GHz Date: Thu, 14 Jan 2021 13:40:27 +0100 [thread overview] Message-ID: <20210114124032.12765-6-pali@kernel.org> (raw) In-Reply-To: <20210114124032.12765-1-pali@kernel.org> It was observed that the workaround introduced by commit 61c40f35f5cd ("clk: mvebu: armada-37xx-periph: Fix switching CPU rate from 300Mhz to 1.2GHz") when base CPU frequency is 1.2 GHz is also required when base CPU frequency is 1 GHz. Otherwise switching CPU frequency directly from L2 (250 MHz) to L0 (1 GHz) causes a crash. When base CPU frequency is just 800 MHz no crashed were observed during switch from L2 to L0. Signed-off-by: Pali Rohár <pali@kernel.org> Fixes: 2089dc33ea0e ("clk: mvebu: armada-37xx-periph: add DVFS support for cpu clocks") Cc: stable@vger.kernel.org # 61c40f35f5cd ("clk: mvebu: armada-37xx-periph: Fix switching CPU rate from 300Mhz to 1.2GHz") --- drivers/clk/mvebu/armada-37xx-periph.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/mvebu/armada-37xx-periph.c b/drivers/clk/mvebu/armada-37xx-periph.c index 6507bd2c5f31..b15e177bea7e 100644 --- a/drivers/clk/mvebu/armada-37xx-periph.c +++ b/drivers/clk/mvebu/armada-37xx-periph.c @@ -487,8 +487,10 @@ static long clk_pm_cpu_round_rate(struct clk_hw *hw, unsigned long rate, } /* - * Switching the CPU from the L2 or L3 frequencies (300 and 200 Mhz - * respectively) to L0 frequency (1.2 Ghz) requires a significant + * Workaround when base CPU frequnecy is 1000 or 1200 MHz + * + * Switching the CPU from the L2 or L3 frequencies (250/300 or 200 MHz + * respectively) to L0 frequency (1/1.2 GHz) requires a significant * amount of time to let VDD stabilize to the appropriate * voltage. This amount of time is large enough that it cannot be * covered by the hardware countdown register. Due to this, the CPU @@ -498,15 +500,15 @@ static long clk_pm_cpu_round_rate(struct clk_hw *hw, unsigned long rate, * To work around this problem, we prevent switching directly from the * L2/L3 frequencies to the L0 frequency, and instead switch to the L1 * frequency in-between. The sequence therefore becomes: - * 1. First switch from L2/L3(200/300MHz) to L1(600MHZ) + * 1. First switch from L2/L3 (200/250/300 MHz) to L1 (500/600 MHz) * 2. Sleep 20ms for stabling VDD voltage - * 3. Then switch from L1(600MHZ) to L0(1200Mhz). + * 3. Then switch from L1 (500/600 MHz) to L0 (1000/1200 MHz). */ static void clk_pm_cpu_set_rate_wa(unsigned long rate, struct regmap *base) { unsigned int cur_level; - if (rate != 1200 * 1000 * 1000) + if (rate < 1000 * 1000 * 1000) return; regmap_read(base, ARMADA_37XX_NB_CPU_LOAD, &cur_level); -- 2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: "Pali Rohár" <pali@kernel.org> To: Gregory Clement <gregory.clement@bootlin.com>, Andrew Lunn <andrew@lunn.ch>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: "Marek Behún" <kabel@kernel.org>, "Tomasz Maciej Nowak" <tmn505@gmail.com>, "Luka Perkov" <luka.perkov@sartura.hr>, "Andre Heider" <a.heider@gmail.com>, "Vladimir Vid" <vladimir.vid@sartura.hr>, "Russell King" <rmk+kernel@armlinux.org.uk>, "Gérald Kerma" <gerald@gk2.net>, "Miquel Raynal" <miquel.raynal@bootlin.com>, "Konstantin Porotchkin" <kostap@marvell.com> Subject: [PATCH mvebu v2 05/10] clk: mvebu: armada-37xx-periph: Fix switching CPU freq from 250 Mhz to 1 GHz Date: Thu, 14 Jan 2021 13:40:27 +0100 [thread overview] Message-ID: <20210114124032.12765-6-pali@kernel.org> (raw) In-Reply-To: <20210114124032.12765-1-pali@kernel.org> It was observed that the workaround introduced by commit 61c40f35f5cd ("clk: mvebu: armada-37xx-periph: Fix switching CPU rate from 300Mhz to 1.2GHz") when base CPU frequency is 1.2 GHz is also required when base CPU frequency is 1 GHz. Otherwise switching CPU frequency directly from L2 (250 MHz) to L0 (1 GHz) causes a crash. When base CPU frequency is just 800 MHz no crashed were observed during switch from L2 to L0. Signed-off-by: Pali Rohár <pali@kernel.org> Fixes: 2089dc33ea0e ("clk: mvebu: armada-37xx-periph: add DVFS support for cpu clocks") Cc: stable@vger.kernel.org # 61c40f35f5cd ("clk: mvebu: armada-37xx-periph: Fix switching CPU rate from 300Mhz to 1.2GHz") --- drivers/clk/mvebu/armada-37xx-periph.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/clk/mvebu/armada-37xx-periph.c b/drivers/clk/mvebu/armada-37xx-periph.c index 6507bd2c5f31..b15e177bea7e 100644 --- a/drivers/clk/mvebu/armada-37xx-periph.c +++ b/drivers/clk/mvebu/armada-37xx-periph.c @@ -487,8 +487,10 @@ static long clk_pm_cpu_round_rate(struct clk_hw *hw, unsigned long rate, } /* - * Switching the CPU from the L2 or L3 frequencies (300 and 200 Mhz - * respectively) to L0 frequency (1.2 Ghz) requires a significant + * Workaround when base CPU frequnecy is 1000 or 1200 MHz + * + * Switching the CPU from the L2 or L3 frequencies (250/300 or 200 MHz + * respectively) to L0 frequency (1/1.2 GHz) requires a significant * amount of time to let VDD stabilize to the appropriate * voltage. This amount of time is large enough that it cannot be * covered by the hardware countdown register. Due to this, the CPU @@ -498,15 +500,15 @@ static long clk_pm_cpu_round_rate(struct clk_hw *hw, unsigned long rate, * To work around this problem, we prevent switching directly from the * L2/L3 frequencies to the L0 frequency, and instead switch to the L1 * frequency in-between. The sequence therefore becomes: - * 1. First switch from L2/L3(200/300MHz) to L1(600MHZ) + * 1. First switch from L2/L3 (200/250/300 MHz) to L1 (500/600 MHz) * 2. Sleep 20ms for stabling VDD voltage - * 3. Then switch from L1(600MHZ) to L0(1200Mhz). + * 3. Then switch from L1 (500/600 MHz) to L0 (1000/1200 MHz). */ static void clk_pm_cpu_set_rate_wa(unsigned long rate, struct regmap *base) { unsigned int cur_level; - if (rate != 1200 * 1000 * 1000) + if (rate < 1000 * 1000 * 1000) return; regmap_read(base, ARMADA_37XX_NB_CPU_LOAD, &cur_level); -- 2.20.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-01-14 12:42 UTC|newest] Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-01-14 12:40 [PATCH mvebu v2 00/10] Armada 37xx: Fix cpufreq changing base CPU speed to 800 MHz from 1000 MHz Pali Rohár 2021-01-14 12:40 ` Pali Rohár 2021-01-14 12:40 ` [PATCH mvebu v2 01/10] arm64: dts: marvell: armada-37xx: add syscon compatible to NB clk node Pali Rohár 2021-01-14 12:40 ` Pali Rohár 2021-04-02 19:50 ` Gregory CLEMENT 2021-04-02 19:50 ` Gregory CLEMENT 2021-01-14 12:40 ` [PATCH mvebu v2 02/10] cpufreq: armada-37xx: Fix setting TBG parent for load levels Pali Rohár 2021-01-14 12:40 ` Pali Rohár 2021-01-14 12:40 ` [PATCH mvebu v2 03/10] clk: mvebu: armada-37xx-periph: remove .set_parent method for CPU PM clock Pali Rohár 2021-01-14 12:40 ` Pali Rohár 2021-02-10 1:58 ` Stephen Boyd 2021-02-10 1:58 ` Stephen Boyd 2021-01-14 12:40 ` [PATCH mvebu v2 04/10] cpufreq: armada-37xx: Fix the AVS value for loads L0 and L1 Pali Rohár 2021-01-14 12:40 ` Pali Rohár 2021-01-14 12:40 ` Pali Rohár [this message] 2021-01-14 12:40 ` [PATCH mvebu v2 05/10] clk: mvebu: armada-37xx-periph: Fix switching CPU freq from 250 Mhz to 1 GHz Pali Rohár 2021-02-10 1:58 ` Stephen Boyd 2021-02-10 1:58 ` Stephen Boyd 2021-01-14 12:40 ` [PATCH mvebu v2 06/10] clk: mvebu: armada-37xx-periph: Fix workaround for switching from L1 to L0 Pali Rohár 2021-01-14 12:40 ` Pali Rohár 2021-02-10 1:58 ` Stephen Boyd 2021-02-10 1:58 ` Stephen Boyd 2021-01-14 12:40 ` [PATCH mvebu v2 07/10] cpufreq: armada-37xx: Fix driver cleanup when registration failed Pali Rohár 2021-01-14 12:40 ` Pali Rohár 2021-01-14 12:40 ` [PATCH mvebu v2 08/10] cpufreq: armada-37xx: Fix determining base CPU frequency Pali Rohár 2021-01-14 12:40 ` Pali Rohár 2021-01-14 12:40 ` [PATCH mvebu v2 09/10] cpufreq: armada-37xx: Remove cur_frequency variable Pali Rohár 2021-01-14 12:40 ` Pali Rohár 2021-03-29 15:00 ` Gregory CLEMENT 2021-03-29 15:00 ` Gregory CLEMENT 2021-03-29 21:44 ` Marek Behún 2021-03-29 21:44 ` Marek Behún 2021-01-14 12:40 ` [PATCH mvebu v2 10/10] cpufreq: armada-37xx: Fix module unloading Pali Rohár 2021-01-14 12:40 ` Pali Rohár 2021-02-01 14:35 ` [PATCH mvebu v2 00/10] Armada 37xx: Fix cpufreq changing base CPU speed to 800 MHz from 1000 MHz Tomasz Maciej Nowak 2021-02-01 14:35 ` Tomasz Maciej Nowak 2021-02-03 19:29 ` Anders Trier Olesen 2021-02-03 19:29 ` Anders Trier Olesen 2021-02-22 19:41 ` [PATCH mvebu v3 " Pali Rohár 2021-02-22 19:41 ` Pali Rohár 2021-02-22 19:41 ` [PATCH mvebu v3 01/10] arm64: dts: marvell: armada-37xx: add syscon compatible to NB clk node Pali Rohár 2021-02-22 19:41 ` Pali Rohár 2021-02-22 19:41 ` [PATCH mvebu v3 02/10] cpufreq: armada-37xx: Fix setting TBG parent for load levels Pali Rohár 2021-02-22 19:41 ` Pali Rohár 2021-03-29 14:45 ` Gregory CLEMENT 2021-03-29 14:45 ` Gregory CLEMENT 2021-02-22 19:41 ` [PATCH mvebu v3 03/10] clk: mvebu: armada-37xx-periph: remove .set_parent method for CPU PM clock Pali Rohár 2021-02-22 19:41 ` Pali Rohár 2021-03-29 14:46 ` Gregory CLEMENT 2021-03-29 14:46 ` Gregory CLEMENT 2021-02-22 19:41 ` [PATCH mvebu v3 04/10] cpufreq: armada-37xx: Fix the AVS value for load L1 Pali Rohár 2021-02-22 19:41 ` Pali Rohár 2021-03-29 14:47 ` Gregory CLEMENT 2021-03-29 14:47 ` Gregory CLEMENT 2021-02-22 19:41 ` [PATCH mvebu v3 05/10] clk: mvebu: armada-37xx-periph: Fix switching CPU freq from 250 Mhz to 1 GHz Pali Rohár 2021-02-22 19:41 ` Pali Rohár 2021-03-29 14:48 ` Gregory CLEMENT 2021-03-29 14:48 ` Gregory CLEMENT 2021-02-22 19:41 ` [PATCH mvebu v3 06/10] clk: mvebu: armada-37xx-periph: Fix workaround for switching from L1 to L0 Pali Rohár 2021-02-22 19:41 ` Pali Rohár 2021-03-29 14:49 ` Gregory CLEMENT 2021-03-29 14:49 ` Gregory CLEMENT 2021-02-22 19:41 ` [PATCH mvebu v3 07/10] cpufreq: armada-37xx: Fix driver cleanup when registration failed Pali Rohár 2021-02-22 19:41 ` Pali Rohár 2021-03-29 14:58 ` Gregory CLEMENT 2021-03-29 14:58 ` Gregory CLEMENT 2021-02-22 19:41 ` [PATCH mvebu v3 08/10] cpufreq: armada-37xx: Fix determining base CPU frequency Pali Rohár 2021-02-22 19:41 ` Pali Rohár 2021-03-29 14:59 ` Gregory CLEMENT 2021-03-29 14:59 ` Gregory CLEMENT 2021-02-22 19:41 ` [PATCH mvebu v3 09/10] cpufreq: armada-37xx: Remove cur_frequency variable Pali Rohár 2021-02-22 19:41 ` Pali Rohár 2021-02-22 19:41 ` [PATCH mvebu v3 10/10] cpufreq: armada-37xx: Fix module unloading Pali Rohár 2021-02-22 19:41 ` Pali Rohár 2021-03-01 19:20 ` [PATCH mvebu v3 00/10] Armada 37xx: Fix cpufreq changing base CPU speed to 800 MHz from 1000 MHz Pali Rohár 2021-03-01 19:20 ` Pali Rohár 2021-03-12 9:12 ` Gregory CLEMENT 2021-03-12 9:12 ` Gregory CLEMENT 2021-03-12 9:27 ` Marek Behún 2021-03-12 9:27 ` Marek Behún 2021-03-28 11:31 ` Pali Rohár 2021-03-28 11:31 ` Pali Rohár 2021-04-08 0:38 ` Stephen Boyd 2021-04-08 0:38 ` Stephen Boyd
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