From: Keith Busch <kbusch@kernel.org>
To: Klaus Jensen <its@irrelevant.dk>
Cc: Fam Zheng <fam@euphon.net>, Kevin Wolf <kwolf@redhat.com>,
qemu-block@nongnu.org, Klaus Jensen <k.jensen@samsung.com>,
qemu-devel@nongnu.org, Max Reitz <mreitz@redhat.com>,
Stefan Hajnoczi <stefanha@redhat.com>
Subject: Re: [PATCH v3 00/12] hw/block/nvme: misc cmb/pmr patches and bump to v1.4
Date: Wed, 20 Jan 2021 09:20:07 +0900 [thread overview]
Message-ID: <20210120002007.GB23238@redsun51.ssa.fujisawa.hgst.com> (raw)
In-Reply-To: <20210119101504.231259-1-its@irrelevant.dk>
On Tue, Jan 19, 2021 at 11:14:52AM +0100, Klaus Jensen wrote:
> From: Klaus Jensen <k.jensen@samsung.com>
>
> This is a resend of "hw/block/nvme: allow cmb and pmr to coexist" with
> some more PMR work added (PMR RDS/WDS support).
>
> This includes a resurrection of Andrzej's series[1] from back July.
>
> Andrzej's main patch basically moved the CMB from BAR 2 into an offset
> in BAR 4 (located after the MSI-X table and PBA). Having an offset on
> the CMB causes a bunch of calculations related to address mapping to
> change.
>
> So, since I couldn't get the patch to apply cleanly I took a stab at
> implementing the suggestion I originally came up with: simply move the
> MSI-X table and PBA from BAR 4 into BAR 0 (up-aligned to a 4 KiB
> boundary after the main NVMe controller registers). This way we can keep
> the CMB at offset zero in its own BAR and free up BAR 4 for use by PMR.
> This makes the patch simpler and does not impact any of the existing
> address mapping code.
>
> [1]: https://lore.kernel.org/qemu-devel/20200729220107.37758-1-andrzej.jakowski@linux.intel.com/
Klaus,
Series looks good to me.
Reviewed-by: Keith Busch <kbusch@kernel.org>
next prev parent reply other threads:[~2021-01-20 0:22 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-19 10:14 [PATCH v3 00/12] hw/block/nvme: misc cmb/pmr patches and bump to v1.4 Klaus Jensen
2021-01-19 10:14 ` [PATCH v3 01/12] hw/block/nvme: add size to mmio read/write trace events Klaus Jensen
2021-01-19 10:14 ` [PATCH v3 02/12] hw/block/nvme: fix 64 bit register hi/lo split writes Klaus Jensen
2021-01-19 10:14 ` [PATCH v3 03/12] hw/block/nvme: indicate CMB support through controller capabilities register Klaus Jensen
2021-01-19 10:14 ` [PATCH v3 04/12] hw/block/nvme: move msix table and pba to BAR 0 Klaus Jensen
2021-01-19 10:14 ` [PATCH v3 05/12] hw/block/nvme: allow cmb and pmr to coexist Klaus Jensen
2021-01-19 10:14 ` [PATCH v3 06/12] hw/block/nvme: rename PMR/CMB shift/mask fields Klaus Jensen
2021-01-19 10:14 ` [PATCH v3 07/12] hw/block/nvme: remove redundant zeroing of PMR registers Klaus Jensen
2021-01-20 22:21 ` Minwoo Im
2021-01-19 10:15 ` [PATCH v3 08/12] hw/block/nvme: disable PMR at boot up Klaus Jensen
2021-01-19 10:15 ` [PATCH v3 09/12] hw/block/nvme: add PMR RDS/WDS support Klaus Jensen
2021-01-19 10:15 ` [PATCH v3 10/12] hw/block/nvme: move cmb logic to v1.4 Klaus Jensen
2021-01-19 12:44 ` Minwoo Im
2021-01-19 12:49 ` Klaus Jensen
2021-01-20 22:22 ` Minwoo Im
2021-01-19 10:15 ` [PATCH v3 11/12] hw/block/nvme: bump " Klaus Jensen
2021-01-19 10:15 ` [PATCH v3 12/12] hw/block/nvme: lift cmb restrictions Klaus Jensen
2021-01-20 22:23 ` Minwoo Im
2021-01-20 0:20 ` Keith Busch [this message]
2021-01-20 22:29 ` [PATCH v3 00/12] hw/block/nvme: misc cmb/pmr patches and bump to v1.4 Klaus Jensen
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