From: Andrzej Jakowski <andrzej.jakowski@linux.intel.com>
To: kbusch@kernel.org, kwolf@redhat.com, mreitz@redhat.com
Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org
Subject: [PATCH v6] nvme: allow cmb and pmr emulation on same device
Date: Wed, 29 Jul 2020 15:01:05 -0700 [thread overview]
Message-ID: <20200729220107.37758-1-andrzej.jakowski@linux.intel.com> (raw)
Resending series recently posted on mailing list related to nvme device
extension with couple of fixes after review.
This patch series does following:
- Fixes problem where CMBS bit was not set in controller capabilities
register, so support for CMB was not correctly advertised to guest.
This is resend of patch that has been submitted and reviewed by
Klaus [1]
- Introduces BAR4 sharing between MSI-X vectors and CMB. This allows
to have CMB and PMR emulated on the same device. This extension
was indicated by Keith [2]
v6:
- instead of using memory_region_to_absolute_addr() function local helper has
been defined (nvme_cmb_to_absolute_addr()) to calculate absolute address of
CMB in simplified way. Also a number of code style changes has been done
(function rename, use literal instead of macro definition, etc.)
v5:
- fixed problem introduced in v4 where CMB buffer was represented as
subregion of BAR4 memory region. In that case CMB address was used
incorrectly as it was relative to BAR4 and not absolute. Appropriate
changes were added to v5 to calculate CMB address properly ([6])
v4:
- modified BAR4 initialization, so now it consists of CMB, MSIX and
PBA memory regions overlapping on top of it. This reduces patch
complexity significantly (Klaus [5])
v3:
- code style fixes including: removal of spurious line break, moving
define into define section and code alignment (Klaus [4])
- removed unintended code reintroduction (Klaus [4])
v2:
- rebase on Kevin's latest block branch (Klaus [3])
- improved comments section (Klaus [3])
- simplified calculation of BAR4 size (Klaus [3])
v1:
- initial push of the patch
[1]: https://lore.kernel.org/qemu-devel/20200408055607.g2ii7gwqbnv6cd3w@apples.localdomain/
[2]: https://lore.kernel.org/qemu-devel/20200330165518.GA8234@redsun51.ssa.fujisawa.hgst.com/
[3]: https://lore.kernel.org/qemu-devel/20200605181043.28782-1-andrzej.jakowski@linux.intel.com/
[4]: https://lore.kernel.org/qemu-devel/20200618092524.posxi5mysb3jjtpn@apples.localdomain/
[5]: https://lore.kernel.org/qemu-devel/20200626055033.6vxqvi4s5pll7som@apples.localdomain/
[6]: https://lore.kernel.org/qemu-devel/9143a543-d32d-f3e7-c37b-b3df7f853952@linux.intel.com/
next reply other threads:[~2020-07-29 22:04 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-29 22:01 Andrzej Jakowski [this message]
2020-07-29 22:01 ` [PATCH v6 1/2] nvme: indicate CMB support through controller capabilities register Andrzej Jakowski
2020-07-29 22:01 ` [PATCH v6 2/2] nvme: allow cmb and pmr to be enabled on same device Andrzej Jakowski
2020-07-29 22:50 ` Klaus Jensen
2020-08-17 6:29 ` Klaus Jensen
2020-09-22 9:04 ` Klaus Jensen
2020-09-22 15:30 ` Keith Busch
2020-09-28 10:51 ` [PATCH v6] nvme: allow cmb and pmr emulation " Klaus Jensen
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