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From: Lyude Paul <lyude@redhat.com>
To: intel-gfx@lists.freedesktop.org
Cc: "Matt Roper" <matthew.d.roper@intel.com>,
	"Jani Nikula" <jani.nikula@linux.intel.com>,
	"Ville Syrjala" <ville.syrjala@linux.intel.com>,
	"Tejas Upadhyay" <tejaskumarx.surendrakumar.upadhyay@intel.com>,
	"Yijun Shen" <Yijun.Shen@dell.com>,
	"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
	"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
	"David Airlie" <airlied@linux.ie>,
	"Daniel Vetter" <daniel@ffwll.ch>,
	"José Roberto de Souza" <jose.souza@intel.com>,
	"Imre Deak" <imre.deak@intel.com>,
	"Uma Shankar" <uma.shankar@intel.com>,
	"Manasi Navare" <manasi.d.navare@intel.com>,
	"Lucas De Marchi" <lucas.demarchi@intel.com>,
	"Dave Airlie" <airlied@redhat.com>,
	dri-devel@lists.freedesktop.org (open list:DRM DRIVERS),
	linux-kernel@vger.kernel.org (open list)
Subject: [PATCH v5 3/4] drm/i915/gen9_bc: Introduce HPD pin mappings for TGP PCH + CML combos
Date: Tue,  9 Feb 2021 16:28:30 -0500	[thread overview]
Message-ID: <20210209212832.1401815-4-lyude@redhat.com> (raw)
In-Reply-To: <20210209212832.1401815-1-lyude@redhat.com>

Next, let's start introducing the HPD pin mappings for Intel's new gen9_bc
platform in order to make hotplugging display connectors work. Since
gen9_bc is just a TGP PCH along with a CML CPU, except with the same HPD
mappings as ICL, we simply add a skl_hpd_pin function that is shared
between gen9 and gen9_bc which handles both the traditional gen9 HPD pin
mappings and the Icelake HPD pin mappings that gen9_bc uses.

Changes since v4:
* Split this into its own commit
* Introduce skl_hpd_pin() like vsyrjala suggested and use that instead of
  sticking our HPD pin mappings in TGP code

Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
[originally from Tejas's work]
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 3c4003605f93..01b171f52694 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3954,6 +3954,14 @@ static enum hpd_pin cnl_hpd_pin(struct drm_i915_private *dev_priv,
 	return HPD_PORT_A + port - PORT_A;
 }
 
+static enum hpd_pin skl_hpd_pin(struct drm_i915_private *dev_priv, enum port port)
+{
+	if (HAS_PCH_TGP(dev_priv))
+		return icl_hpd_pin(dev_priv, port);
+
+	return HPD_PORT_A + port - PORT_A;
+}
+
 #define port_tc_name(port) ((port) - PORT_TC1 + '1')
 #define tc_port_name(tc_port) ((tc_port) - TC_PORT_1 + '1')
 
@@ -4070,6 +4078,8 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
 		encoder->hpd_pin = icl_hpd_pin(dev_priv, port);
 	else if (IS_GEN(dev_priv, 10))
 		encoder->hpd_pin = cnl_hpd_pin(dev_priv, port);
+	else if (IS_GEN(dev_priv, 9))
+		encoder->hpd_pin = skl_hpd_pin(dev_priv, port);
 	else
 		encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
 
-- 
2.29.2


WARNING: multiple messages have this Message-ID (diff)
From: Lyude Paul <lyude@redhat.com>
To: intel-gfx@lists.freedesktop.org
Cc: "open list:DRM DRIVERS" <dri-devel@lists.freedesktop.org>,
	"David Airlie" <airlied@linux.ie>,
	"Lucas De Marchi" <lucas.demarchi@intel.com>,
	"open list" <linux-kernel@vger.kernel.org>,
	"Manasi Navare" <manasi.d.navare@intel.com>,
	"Uma Shankar" <uma.shankar@intel.com>,
	"Yijun Shen" <Yijun.Shen@dell.com>,
	"José Roberto de Souza" <jose.souza@intel.com>,
	"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
	"Dave Airlie" <airlied@redhat.com>,
	"Tejas Upadhyay" <tejaskumarx.surendrakumar.upadhyay@intel.com>
Subject: [PATCH v5 3/4] drm/i915/gen9_bc: Introduce HPD pin mappings for TGP PCH + CML combos
Date: Tue,  9 Feb 2021 16:28:30 -0500	[thread overview]
Message-ID: <20210209212832.1401815-4-lyude@redhat.com> (raw)
In-Reply-To: <20210209212832.1401815-1-lyude@redhat.com>

Next, let's start introducing the HPD pin mappings for Intel's new gen9_bc
platform in order to make hotplugging display connectors work. Since
gen9_bc is just a TGP PCH along with a CML CPU, except with the same HPD
mappings as ICL, we simply add a skl_hpd_pin function that is shared
between gen9 and gen9_bc which handles both the traditional gen9 HPD pin
mappings and the Icelake HPD pin mappings that gen9_bc uses.

Changes since v4:
* Split this into its own commit
* Introduce skl_hpd_pin() like vsyrjala suggested and use that instead of
  sticking our HPD pin mappings in TGP code

Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
[originally from Tejas's work]
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 3c4003605f93..01b171f52694 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3954,6 +3954,14 @@ static enum hpd_pin cnl_hpd_pin(struct drm_i915_private *dev_priv,
 	return HPD_PORT_A + port - PORT_A;
 }
 
+static enum hpd_pin skl_hpd_pin(struct drm_i915_private *dev_priv, enum port port)
+{
+	if (HAS_PCH_TGP(dev_priv))
+		return icl_hpd_pin(dev_priv, port);
+
+	return HPD_PORT_A + port - PORT_A;
+}
+
 #define port_tc_name(port) ((port) - PORT_TC1 + '1')
 #define tc_port_name(tc_port) ((tc_port) - TC_PORT_1 + '1')
 
@@ -4070,6 +4078,8 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
 		encoder->hpd_pin = icl_hpd_pin(dev_priv, port);
 	else if (IS_GEN(dev_priv, 10))
 		encoder->hpd_pin = cnl_hpd_pin(dev_priv, port);
+	else if (IS_GEN(dev_priv, 9))
+		encoder->hpd_pin = skl_hpd_pin(dev_priv, port);
 	else
 		encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
 
-- 
2.29.2

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: Lyude Paul <lyude@redhat.com>
To: intel-gfx@lists.freedesktop.org
Cc: "open list:DRM DRIVERS" <dri-devel@lists.freedesktop.org>,
	David Airlie <airlied@linux.ie>,
	Lucas De Marchi <lucas.demarchi@intel.com>,
	open list <linux-kernel@vger.kernel.org>,
	Yijun Shen <Yijun.Shen@dell.com>,
	Dave Airlie <airlied@redhat.com>
Subject: [Intel-gfx] [PATCH v5 3/4] drm/i915/gen9_bc: Introduce HPD pin mappings for TGP PCH + CML combos
Date: Tue,  9 Feb 2021 16:28:30 -0500	[thread overview]
Message-ID: <20210209212832.1401815-4-lyude@redhat.com> (raw)
In-Reply-To: <20210209212832.1401815-1-lyude@redhat.com>

Next, let's start introducing the HPD pin mappings for Intel's new gen9_bc
platform in order to make hotplugging display connectors work. Since
gen9_bc is just a TGP PCH along with a CML CPU, except with the same HPD
mappings as ICL, we simply add a skl_hpd_pin function that is shared
between gen9 and gen9_bc which handles both the traditional gen9 HPD pin
mappings and the Icelake HPD pin mappings that gen9_bc uses.

Changes since v4:
* Split this into its own commit
* Introduce skl_hpd_pin() like vsyrjala suggested and use that instead of
  sticking our HPD pin mappings in TGP code

Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
[originally from Tejas's work]
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 3c4003605f93..01b171f52694 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3954,6 +3954,14 @@ static enum hpd_pin cnl_hpd_pin(struct drm_i915_private *dev_priv,
 	return HPD_PORT_A + port - PORT_A;
 }
 
+static enum hpd_pin skl_hpd_pin(struct drm_i915_private *dev_priv, enum port port)
+{
+	if (HAS_PCH_TGP(dev_priv))
+		return icl_hpd_pin(dev_priv, port);
+
+	return HPD_PORT_A + port - PORT_A;
+}
+
 #define port_tc_name(port) ((port) - PORT_TC1 + '1')
 #define tc_port_name(tc_port) ((tc_port) - TC_PORT_1 + '1')
 
@@ -4070,6 +4078,8 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
 		encoder->hpd_pin = icl_hpd_pin(dev_priv, port);
 	else if (IS_GEN(dev_priv, 10))
 		encoder->hpd_pin = cnl_hpd_pin(dev_priv, port);
+	else if (IS_GEN(dev_priv, 9))
+		encoder->hpd_pin = skl_hpd_pin(dev_priv, port);
 	else
 		encoder->hpd_pin = intel_hpd_pin_default(dev_priv, port);
 
-- 
2.29.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2021-02-10  1:03 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-09 21:28 [Intel-gfx] [PATCH v5 0/4] drm/i915/gen9_bc: Add TGP PCH support Lyude Paul
2021-02-09 21:28 ` [PATCH v5 1/4] drm/i915/gen9_bc: Recognize TGP PCH + CML combos Lyude Paul
2021-02-09 21:28   ` [Intel-gfx] " Lyude Paul
2021-02-09 21:28   ` Lyude Paul
2021-02-11  3:19   ` [Intel-gfx] " Rodrigo Vivi
2021-02-11  3:19     ` Rodrigo Vivi
2021-02-11  3:19     ` Rodrigo Vivi
2021-02-09 21:28 ` [PATCH v5 2/4] drm/i915/gen9_bc: Introduce TGP PCH DDC pin mappings Lyude Paul
2021-02-09 21:28   ` [Intel-gfx] " Lyude Paul
2021-02-09 21:28   ` Lyude Paul
2021-02-11  3:30   ` [Intel-gfx] " Rodrigo Vivi
2021-02-11  3:30     ` Rodrigo Vivi
2021-02-11  3:30     ` Rodrigo Vivi
2021-02-09 21:28 ` Lyude Paul [this message]
2021-02-09 21:28   ` [Intel-gfx] [PATCH v5 3/4] drm/i915/gen9_bc: Introduce HPD pin mappings for TGP PCH + CML combos Lyude Paul
2021-02-09 21:28   ` Lyude Paul
2021-02-11  3:21   ` Rodrigo Vivi
2021-02-11  3:21     ` [Intel-gfx] " Rodrigo Vivi
2021-02-11  3:21     ` Rodrigo Vivi
2021-02-09 21:28 ` [PATCH v5 4/4] drm/i915/gen9_bc: Add W/A for missing STRAP config on " Lyude Paul
2021-02-09 21:28   ` [Intel-gfx] " Lyude Paul
2021-02-09 21:28   ` Lyude Paul
2021-02-11  3:23   ` Rodrigo Vivi
2021-02-11  3:23     ` [Intel-gfx] " Rodrigo Vivi
2021-02-11  3:23     ` Rodrigo Vivi
2021-02-11 23:30     ` [Intel-gfx] " Rodrigo Vivi
2021-02-11 23:30       ` Rodrigo Vivi
2021-02-11 23:30       ` Rodrigo Vivi
2021-02-09 22:06 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gen9_bc: Add TGP PCH support Patchwork
2021-02-10  1:21 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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