From: Tomas Winkler <tomas.winkler@intel.com> To: Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Jani Nikula <jani.nikula@linux.intel.com>, Joonas Lahtinen <joonas.lahtinen@linux.intel.com>, Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Alexander Usyskin <alexander.usyskin@intel.com>, Vitaly Lubart <vitaly.lubart@intel.com>, linux-mtd@lists.infradead.org, intel-gfx@lists.freedesktop.org, Tomas Winkler <tomas.winkler@intel.com>, Lucas De Marchi <lucas.demarchi@intel.com> Subject: [RFC PATCH 03/10 v2] drm/i915/spi: add driver for on-die spi device Date: Mon, 8 Mar 2021 08:27:41 +0200 [thread overview] Message-ID: <20210308062748.208017-4-tomas.winkler@intel.com> (raw) In-Reply-To: <20210308062748.208017-1-tomas.winkler@intel.com> Add the platform driver for i915 on-die spi device, exposed via mfd framework. Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> --- V2: 1. Add own Kconfig and Makefile 2. Rename intel_spi_drv.c to i915_spi.c drivers/gpu/drm/i915/Kconfig | 2 + drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/spi/Kconfig | 17 ++++ drivers/gpu/drm/i915/spi/Makefile | 7 ++ drivers/gpu/drm/i915/spi/i915_spi.c | 116 ++++++++++++++++++++++++++++ 5 files changed, 143 insertions(+) create mode 100644 drivers/gpu/drm/i915/spi/Kconfig create mode 100644 drivers/gpu/drm/i915/spi/Makefile create mode 100644 drivers/gpu/drm/i915/spi/i915_spi.c diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig index abcaa8da45ac..d5062fbb6d25 100644 --- a/drivers/gpu/drm/i915/Kconfig +++ b/drivers/gpu/drm/i915/Kconfig @@ -131,6 +131,8 @@ config DRM_I915_GVT_KVMGT Choose this option if you want to enable KVMGT support for Intel GVT-g. +source "drivers/gpu/drm/i915/spi/Kconfig" + menu "drm/i915 Debugging" depends on DRM_I915 depends on EXPERT diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 7f504475fde7..9377a593364f 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -297,6 +297,7 @@ endif obj-$(CONFIG_DRM_I915) += i915.o obj-$(CONFIG_DRM_I915_GVT_KVMGT) += gvt/kvmgt.o +obj-$(CONFIG_DRM_I915_SPI) += spi/ # header test diff --git a/drivers/gpu/drm/i915/spi/Kconfig b/drivers/gpu/drm/i915/spi/Kconfig new file mode 100644 index 000000000000..7e6b82f8a59b --- /dev/null +++ b/drivers/gpu/drm/i915/spi/Kconfig @@ -0,0 +1,17 @@ +# SPDX-License-Identifier: GPL-2.0 +# Copyright (c) 2021, Intel Corporation. All rights reserved. +# +config DRM_I915_SPI + tristate "I915 SPI driver for discrete devices" + select MTD + select MTD_PARTITIONED_MASTER + depends on DRM_I915 + help + I915 SPI driver for i915 discrete devices. + + This enables support for the SPI devices present on some + discrete i915 cards. This driver makes possible to + flush firmware during manufacturing process directly from + the operating system, and can be used by device health check + applications. + diff --git a/drivers/gpu/drm/i915/spi/Makefile b/drivers/gpu/drm/i915/spi/Makefile new file mode 100644 index 000000000000..0a2dab0aba03 --- /dev/null +++ b/drivers/gpu/drm/i915/spi/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (c) 2021, Intel Corporation. All rights reserved. +# +# Makefile - I915 SPI driver + +obj-$(CONFIG_DRM_I915_SPI) += i915_spi.o diff --git a/drivers/gpu/drm/i915/spi/i915_spi.c b/drivers/gpu/drm/i915/spi/i915_spi.c new file mode 100644 index 000000000000..23261f35b71f --- /dev/null +++ b/drivers/gpu/drm/i915/spi/i915_spi.c @@ -0,0 +1,116 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright(c) 2019-2021, Intel Corporation. All rights reserved. + */ +#include <linux/module.h> +#include <linux/types.h> +#include <linux/kernel.h> +#include <linux/string.h> +#include <linux/io.h> +#include <linux/device.h> +#include <linux/slab.h> +#include <linux/platform_device.h> +#include <spi/intel_spi.h> + +struct i915_spi { + void __iomem *base; + size_t size; + unsigned int nregions; + struct { + const char *name; + u8 id; + u64 offset; + u64 size; + } regions[]; +}; + +static int i915_spi_probe(struct platform_device *platdev) +{ + struct resource *bar; + struct device *device; + struct i915_spi *spi; + struct i915_spi_region *regions; + unsigned int nregions; + unsigned int i, n; + size_t size; + char *name; + size_t name_size; + + device = &platdev->dev; + + regions = dev_get_platdata(&platdev->dev); + if (!regions) { + dev_err(device, "no regions defined\n"); + return -ENODEV; + } + + /* count available regions */ + for (nregions = 0, i = 0; i < I915_SPI_REGIONS; i++) { + if (regions[i].name) + nregions++; + } + + if (!nregions) { + dev_err(device, "no regions defined\n"); + return -ENODEV; + } + + size = sizeof(*spi) + sizeof(spi->regions[0]) * nregions; + spi = devm_kzalloc(device, size, GFP_KERNEL); + if (!spi) + return -ENOMEM; + + spi->nregions = nregions; + for (n = 0, i = 0; i < I915_SPI_REGIONS; i++) { + if (regions[i].name) { + name_size = strlen(dev_name(&platdev->dev)) + + strlen(regions[i].name) + 2; /* for point */ + name = devm_kzalloc(device, name_size, GFP_KERNEL); + if (!name) + continue; + snprintf(name, name_size, "%s.%s", + dev_name(&platdev->dev), regions[i].name); + spi->regions[n].name = name; + spi->regions[n].id = i; + n++; + } + } + + bar = platform_get_resource(platdev, IORESOURCE_MEM, 0); + if (!bar) + return -ENODEV; + + spi->base = devm_ioremap_resource(device, bar); + if (IS_ERR(spi->base)) { + dev_err(device, "mmio not mapped\n"); + return PTR_ERR(spi->base); + } + + platform_set_drvdata(platdev, spi); + + dev_dbg(device, "i915-spi is bound\n"); + + return 0; +} + +static int i915_spi_remove(struct platform_device *platdev) +{ + platform_set_drvdata(platdev, NULL); + + return 0; +} + +MODULE_ALIAS("platform:i915-spi"); +static struct platform_driver i915_spi_driver = { + .probe = i915_spi_probe, + .remove = i915_spi_remove, + .driver = { + .name = "i915-spi", + }, +}; + +module_platform_driver(i915_spi_driver); + +MODULE_LICENSE("GPL and additional rights"); +MODULE_AUTHOR("Intel Corporation"); +MODULE_DESCRIPTION("Intel DGFX SPI driver"); -- 2.26.2 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
WARNING: multiple messages have this Message-ID (diff)
From: Tomas Winkler <tomas.winkler@intel.com> To: Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Jani Nikula <jani.nikula@linux.intel.com>, Joonas Lahtinen <joonas.lahtinen@linux.intel.com>, Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Alexander Usyskin <alexander.usyskin@intel.com>, intel-gfx@lists.freedesktop.org, Lucas De Marchi <lucas.demarchi@intel.com>, linux-mtd@lists.infradead.org, Tomas Winkler <tomas.winkler@intel.com>, Vitaly Lubart <vitaly.lubart@intel.com> Subject: [Intel-gfx] [RFC PATCH 03/10 v2] drm/i915/spi: add driver for on-die spi device Date: Mon, 8 Mar 2021 08:27:41 +0200 [thread overview] Message-ID: <20210308062748.208017-4-tomas.winkler@intel.com> (raw) In-Reply-To: <20210308062748.208017-1-tomas.winkler@intel.com> Add the platform driver for i915 on-die spi device, exposed via mfd framework. Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> --- V2: 1. Add own Kconfig and Makefile 2. Rename intel_spi_drv.c to i915_spi.c drivers/gpu/drm/i915/Kconfig | 2 + drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/spi/Kconfig | 17 ++++ drivers/gpu/drm/i915/spi/Makefile | 7 ++ drivers/gpu/drm/i915/spi/i915_spi.c | 116 ++++++++++++++++++++++++++++ 5 files changed, 143 insertions(+) create mode 100644 drivers/gpu/drm/i915/spi/Kconfig create mode 100644 drivers/gpu/drm/i915/spi/Makefile create mode 100644 drivers/gpu/drm/i915/spi/i915_spi.c diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig index abcaa8da45ac..d5062fbb6d25 100644 --- a/drivers/gpu/drm/i915/Kconfig +++ b/drivers/gpu/drm/i915/Kconfig @@ -131,6 +131,8 @@ config DRM_I915_GVT_KVMGT Choose this option if you want to enable KVMGT support for Intel GVT-g. +source "drivers/gpu/drm/i915/spi/Kconfig" + menu "drm/i915 Debugging" depends on DRM_I915 depends on EXPERT diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 7f504475fde7..9377a593364f 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -297,6 +297,7 @@ endif obj-$(CONFIG_DRM_I915) += i915.o obj-$(CONFIG_DRM_I915_GVT_KVMGT) += gvt/kvmgt.o +obj-$(CONFIG_DRM_I915_SPI) += spi/ # header test diff --git a/drivers/gpu/drm/i915/spi/Kconfig b/drivers/gpu/drm/i915/spi/Kconfig new file mode 100644 index 000000000000..7e6b82f8a59b --- /dev/null +++ b/drivers/gpu/drm/i915/spi/Kconfig @@ -0,0 +1,17 @@ +# SPDX-License-Identifier: GPL-2.0 +# Copyright (c) 2021, Intel Corporation. All rights reserved. +# +config DRM_I915_SPI + tristate "I915 SPI driver for discrete devices" + select MTD + select MTD_PARTITIONED_MASTER + depends on DRM_I915 + help + I915 SPI driver for i915 discrete devices. + + This enables support for the SPI devices present on some + discrete i915 cards. This driver makes possible to + flush firmware during manufacturing process directly from + the operating system, and can be used by device health check + applications. + diff --git a/drivers/gpu/drm/i915/spi/Makefile b/drivers/gpu/drm/i915/spi/Makefile new file mode 100644 index 000000000000..0a2dab0aba03 --- /dev/null +++ b/drivers/gpu/drm/i915/spi/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (c) 2021, Intel Corporation. All rights reserved. +# +# Makefile - I915 SPI driver + +obj-$(CONFIG_DRM_I915_SPI) += i915_spi.o diff --git a/drivers/gpu/drm/i915/spi/i915_spi.c b/drivers/gpu/drm/i915/spi/i915_spi.c new file mode 100644 index 000000000000..23261f35b71f --- /dev/null +++ b/drivers/gpu/drm/i915/spi/i915_spi.c @@ -0,0 +1,116 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright(c) 2019-2021, Intel Corporation. All rights reserved. + */ +#include <linux/module.h> +#include <linux/types.h> +#include <linux/kernel.h> +#include <linux/string.h> +#include <linux/io.h> +#include <linux/device.h> +#include <linux/slab.h> +#include <linux/platform_device.h> +#include <spi/intel_spi.h> + +struct i915_spi { + void __iomem *base; + size_t size; + unsigned int nregions; + struct { + const char *name; + u8 id; + u64 offset; + u64 size; + } regions[]; +}; + +static int i915_spi_probe(struct platform_device *platdev) +{ + struct resource *bar; + struct device *device; + struct i915_spi *spi; + struct i915_spi_region *regions; + unsigned int nregions; + unsigned int i, n; + size_t size; + char *name; + size_t name_size; + + device = &platdev->dev; + + regions = dev_get_platdata(&platdev->dev); + if (!regions) { + dev_err(device, "no regions defined\n"); + return -ENODEV; + } + + /* count available regions */ + for (nregions = 0, i = 0; i < I915_SPI_REGIONS; i++) { + if (regions[i].name) + nregions++; + } + + if (!nregions) { + dev_err(device, "no regions defined\n"); + return -ENODEV; + } + + size = sizeof(*spi) + sizeof(spi->regions[0]) * nregions; + spi = devm_kzalloc(device, size, GFP_KERNEL); + if (!spi) + return -ENOMEM; + + spi->nregions = nregions; + for (n = 0, i = 0; i < I915_SPI_REGIONS; i++) { + if (regions[i].name) { + name_size = strlen(dev_name(&platdev->dev)) + + strlen(regions[i].name) + 2; /* for point */ + name = devm_kzalloc(device, name_size, GFP_KERNEL); + if (!name) + continue; + snprintf(name, name_size, "%s.%s", + dev_name(&platdev->dev), regions[i].name); + spi->regions[n].name = name; + spi->regions[n].id = i; + n++; + } + } + + bar = platform_get_resource(platdev, IORESOURCE_MEM, 0); + if (!bar) + return -ENODEV; + + spi->base = devm_ioremap_resource(device, bar); + if (IS_ERR(spi->base)) { + dev_err(device, "mmio not mapped\n"); + return PTR_ERR(spi->base); + } + + platform_set_drvdata(platdev, spi); + + dev_dbg(device, "i915-spi is bound\n"); + + return 0; +} + +static int i915_spi_remove(struct platform_device *platdev) +{ + platform_set_drvdata(platdev, NULL); + + return 0; +} + +MODULE_ALIAS("platform:i915-spi"); +static struct platform_driver i915_spi_driver = { + .probe = i915_spi_probe, + .remove = i915_spi_remove, + .driver = { + .name = "i915-spi", + }, +}; + +module_platform_driver(i915_spi_driver); + +MODULE_LICENSE("GPL and additional rights"); +MODULE_AUTHOR("Intel Corporation"); +MODULE_DESCRIPTION("Intel DGFX SPI driver"); -- 2.26.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-03-08 6:32 UTC|newest] Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-03-08 6:27 [RFC PATCH 00/10 v2] drm/i915/spi: discrete graphics internal spi Tomas Winkler 2021-03-08 6:27 ` [Intel-gfx] " Tomas Winkler 2021-03-08 6:27 ` [RFC PATCH 01/10 v2] drm/i915/spi: add spi device for discrete graphics Tomas Winkler 2021-03-08 6:27 ` [Intel-gfx] " Tomas Winkler 2021-03-08 6:27 ` [RFC PATCH 02/10 v2] drm/i915/spi: intel_spi_region map Tomas Winkler 2021-03-08 6:27 ` [Intel-gfx] " Tomas Winkler 2021-03-08 6:27 ` Tomas Winkler [this message] 2021-03-08 6:27 ` [Intel-gfx] [RFC PATCH 03/10 v2] drm/i915/spi: add driver for on-die spi device Tomas Winkler 2021-03-08 6:27 ` [RFC PATCH 04/10 v2] drm/i915/spi: implement regions enumeration Tomas Winkler 2021-03-08 6:27 ` [Intel-gfx] " Tomas Winkler 2021-03-08 6:27 ` [RFC PATCH 05/10 v2] drm/i915/spi: implement spi access functions Tomas Winkler 2021-03-08 6:27 ` [Intel-gfx] " Tomas Winkler 2021-03-08 6:27 ` [RFC PATCH 06/10 v2] drm/i915/spi: spi register with mtd Tomas Winkler 2021-03-08 6:27 ` [Intel-gfx] " Tomas Winkler 2021-03-08 6:27 ` [RFC PATCH 07/10 v2] drm/i915/spi: mtd: implement access handlers Tomas Winkler 2021-03-08 6:27 ` [Intel-gfx] " Tomas Winkler 2021-03-08 6:27 ` [RFC PATCH 08/10 v2] drm/i915/spi: serialize spi access Tomas Winkler 2021-03-08 6:27 ` [Intel-gfx] " Tomas Winkler 2021-03-08 6:27 ` [RFC PATCH 09/10 v2] MAINTAINERS: add Intel i915 spi driver entry Tomas Winkler 2021-03-08 6:27 ` [Intel-gfx] " Tomas Winkler 2021-03-08 6:27 ` [RFC PATCH 10/10 v2] mtd: use refcount to prevent corruption Tomas Winkler 2021-03-08 6:27 ` [Intel-gfx] " Tomas Winkler 2021-03-08 6:33 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/spi: discrete graphics internal spi (rev2) Patchwork
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20210308062748.208017-4-tomas.winkler@intel.com \ --to=tomas.winkler@intel.com \ --cc=alexander.usyskin@intel.com \ --cc=intel-gfx@lists.freedesktop.org \ --cc=jani.nikula@linux.intel.com \ --cc=joonas.lahtinen@linux.intel.com \ --cc=linux-mtd@lists.infradead.org \ --cc=lucas.demarchi@intel.com \ --cc=miquel.raynal@bootlin.com \ --cc=richard@nod.at \ --cc=rodrigo.vivi@intel.com \ --cc=vigneshr@ti.com \ --cc=vitaly.lubart@intel.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.