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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 08/39] hw/arm/smmuv3: Fix SMMU_CMD_CFGI_STE_RANGE handling
Date: Fri, 12 Mar 2021 13:51:09 +0000	[thread overview]
Message-ID: <20210312135140.1099-9-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210312135140.1099-1-peter.maydell@linaro.org>

From: Eric Auger <eric.auger@redhat.com>

If the whole SID range (32b) is invalidated (SMMU_CMD_CFGI_ALL),
@end overflows and we fail to handle the command properly.

Once this gets fixed, the current code really is awkward in the
sense it loops over the whole range instead of removing the
currently cached configs through a hash table lookup.

Fix both the overflow and the lookup.

Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20210309102742.30442-7-eric.auger@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm/smmu-internal.h |  5 +++++
 hw/arm/smmuv3.c        | 34 ++++++++++++++++++++--------------
 2 files changed, 25 insertions(+), 14 deletions(-)

diff --git a/hw/arm/smmu-internal.h b/hw/arm/smmu-internal.h
index 55147f29be4..2d75b319531 100644
--- a/hw/arm/smmu-internal.h
+++ b/hw/arm/smmu-internal.h
@@ -104,4 +104,9 @@ typedef struct SMMUIOTLBPageInvInfo {
     uint64_t mask;
 } SMMUIOTLBPageInvInfo;
 
+typedef struct SMMUSIDRange {
+    uint32_t start;
+    uint32_t end;
+} SMMUSIDRange;
+
 #endif
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index fdd6332ce54..3b87324ce22 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -32,6 +32,7 @@
 
 #include "hw/arm/smmuv3.h"
 #include "smmuv3-internal.h"
+#include "smmu-internal.h"
 
 /**
  * smmuv3_trigger_irq - pulse @irq if enabled and update
@@ -895,6 +896,20 @@ static void smmuv3_s1_range_inval(SMMUState *s, Cmd *cmd)
     }
 }
 
+static gboolean
+smmuv3_invalidate_ste(gpointer key, gpointer value, gpointer user_data)
+{
+    SMMUDevice *sdev = (SMMUDevice *)key;
+    uint32_t sid = smmu_get_sid(sdev);
+    SMMUSIDRange *sid_range = (SMMUSIDRange *)user_data;
+
+    if (sid < sid_range->start || sid > sid_range->end) {
+        return false;
+    }
+    trace_smmuv3_config_cache_inv(sid);
+    return true;
+}
+
 static int smmuv3_cmdq_consume(SMMUv3State *s)
 {
     SMMUState *bs = ARM_SMMU(s);
@@ -965,27 +980,18 @@ static int smmuv3_cmdq_consume(SMMUv3State *s)
         }
         case SMMU_CMD_CFGI_STE_RANGE: /* same as SMMU_CMD_CFGI_ALL */
         {
-            uint32_t start = CMD_SID(&cmd), end, i;
+            uint32_t start = CMD_SID(&cmd);
             uint8_t range = CMD_STE_RANGE(&cmd);
+            uint64_t end = start + (1ULL << (range + 1)) - 1;
+            SMMUSIDRange sid_range = {start, end};
 
             if (CMD_SSEC(&cmd)) {
                 cmd_error = SMMU_CERROR_ILL;
                 break;
             }
-
-            end = start + (1 << (range + 1)) - 1;
             trace_smmuv3_cmdq_cfgi_ste_range(start, end);
-
-            for (i = start; i <= end; i++) {
-                IOMMUMemoryRegion *mr = smmu_iommu_mr(bs, i);
-                SMMUDevice *sdev;
-
-                if (!mr) {
-                    continue;
-                }
-                sdev = container_of(mr, SMMUDevice, iommu);
-                smmuv3_flush_config(sdev);
-            }
+            g_hash_table_foreach_remove(bs->configs, smmuv3_invalidate_ste,
+                                        &sid_range);
             break;
         }
         case SMMU_CMD_CFGI_CD:
-- 
2.20.1



  parent reply	other threads:[~2021-03-12 14:09 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-12 13:51 [PULL 00/39] target-arm queue Peter Maydell
2021-03-12 13:51 ` [PULL 01/39] hw/misc: versal: Add a model of the XRAM controller Peter Maydell
2021-03-12 13:51 ` [PULL 02/39] hw/arm: versal: Add support for the XRAMs Peter Maydell
2021-03-12 13:51 ` [PULL 03/39] intel_iommu: Fix mask may be uninitialized in vtd_context_device_invalidate Peter Maydell
2021-03-12 13:51 ` [PULL 04/39] dma: Introduce dma_aligned_pow2_mask() Peter Maydell
2021-03-12 13:51 ` [PULL 05/39] virtio-iommu: Handle non power of 2 range invalidations Peter Maydell
2021-03-12 13:51 ` [PULL 06/39] hw/arm/smmu-common: Fix smmu_iotlb_inv_iova when asid is not set Peter Maydell
2021-03-12 13:51 ` [PULL 07/39] hw/arm/smmuv3: Enforce invalidation on a power of two range Peter Maydell
2021-03-12 13:51 ` Peter Maydell [this message]
2021-03-12 13:51 ` [PULL 09/39] hw/arm/smmuv3: Uniformize sid traces Peter Maydell
2021-03-12 13:51 ` [PULL 10/39] target/arm: Fix sve_uzp_p vs odd vector lengths Peter Maydell
2021-03-12 13:51 ` [PULL 11/39] target/arm: Fix sve_zip_p " Peter Maydell
2021-03-12 13:51 ` [PULL 12/39] target/arm: Fix sve_punpk_p " Peter Maydell
2021-03-12 13:51 ` [PULL 13/39] target/arm: Update find_last_active for PREDDESC Peter Maydell
2021-03-12 13:51 ` [PULL 14/39] target/arm: Update BRKA, BRKB, BRKN " Peter Maydell
2021-03-12 13:51 ` [PULL 15/39] target/arm: Update CNTP " Peter Maydell
2021-03-12 13:51 ` [PULL 16/39] target/arm: Update WHILE " Peter Maydell
2021-03-12 13:51 ` [PULL 17/39] target/arm: Update sve reduction vs simd_desc Peter Maydell
2021-03-12 13:51 ` [PULL 18/39] hw/net/allwinner-sun8i-emac: traverse transmit queue using TX_CUR_DESC register value Peter Maydell
2021-03-12 13:51 ` [PULL 19/39] tests/acceptance/boot_linux_console: remove Armbian 19.11.3 bionic test for orangepi-pc machine Peter Maydell
2021-03-12 13:51 ` [PULL 20/39] tests/acceptance/boot_linux_console: change URL for test_arm_orangepi_bionic_20_08 Peter Maydell
2021-03-12 13:51 ` [PULL 21/39] tests/acceptance: update sunxi kernel from armbian to 5.10.16 Peter Maydell
2021-03-12 13:51 ` [PULL 22/39] tests/acceptance: drop ARMBIAN_ARTIFACTS_CACHED condition for orangepi-pc, cubieboard tests Peter Maydell
2021-03-12 13:51 ` [PULL 23/39] hw/timer/sse-timer: Propagate eventual error in sse_timer_realize() Peter Maydell
2021-03-12 13:51 ` [PULL 24/39] accel: kvm: Fix kvm_type invocation Peter Maydell
2021-03-12 13:51 ` [PULL 25/39] hw/arm/virt: KVM: The IPA lower bound is 32 Peter Maydell
2021-03-12 13:51 ` [PULL 26/39] hw/misc: Add GPIOs for duty in NPCM7xx PWM Peter Maydell
2021-03-12 13:51 ` [PULL 27/39] hw/misc: Add NPCM7XX MFT Module Peter Maydell
2021-03-12 13:51 ` [PULL 28/39] hw/arm: Add MFT device to NPCM7xx Soc Peter Maydell
2021-03-12 13:51 ` [PULL 29/39] hw/arm: Connect PWM fans in NPCM7XX boards Peter Maydell
2021-03-12 13:51 ` [PULL 30/39] tests/qtest: Test PWM fan RPM using MFT in PWM test Peter Maydell
2021-03-12 13:51 ` [PULL 31/39] hw/display/pl110: Remove dead code for non-32-bpp surfaces Peter Maydell
2021-03-12 13:51 ` [PULL 32/39] hw/display/pl110: Pull included-once parts of template header into pl110.c Peter Maydell
2021-03-12 13:51 ` [PULL 33/39] hw/display/pl110: Remove use of BITS from pl110_template.h Peter Maydell
2021-03-12 13:51 ` [PULL 34/39] hw/display/pxa2xx_lcd: Remove dead code for non-32-bpp surfaces Peter Maydell
2021-03-12 13:51 ` [PULL 35/39] hw/display/pxa2xx_lcd: Remove dest_width state field Peter Maydell
2021-03-12 13:51 ` [PULL 36/39] hw/display/pxa2xx: Remove use of BITS in pxa2xx_template.h Peter Maydell
2021-03-12 13:51 ` [PULL 37/39] hw/display/pxa2xx: Apply brace-related coding style fixes to template header Peter Maydell
2021-03-12 13:51 ` [PULL 38/39] hw/display/pxa2xx: Apply whitespace-only " Peter Maydell
2021-03-12 13:51 ` [PULL 39/39] hw/display/pxa2xx: Inline " Peter Maydell

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