From: Will Deacon <will@kernel.org>
To: Quentin Perret <qperret@google.com>
Cc: catalin.marinas@arm.com, maz@kernel.org, james.morse@arm.com,
julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com,
android-kvm@google.com, seanjc@google.com, mate.toth-pal@arm.com,
linux-kernel@vger.kernel.org, robh+dt@kernel.org,
linux-arm-kernel@lists.infradead.org, kernel-team@android.com,
kvmarm@lists.cs.columbia.edu, tabba@google.com, ardb@kernel.org,
mark.rutland@arm.com, dbrazdil@google.com
Subject: Re: [PATCH v5 14/36] KVM: arm64: Provide __flush_dcache_area at EL2
Date: Mon, 15 Mar 2021 16:33:23 +0000 [thread overview]
Message-ID: <20210315163322.GE3430@willie-the-truck> (raw)
In-Reply-To: <20210315143536.214621-15-qperret@google.com>
On Mon, Mar 15, 2021 at 02:35:14PM +0000, Quentin Perret wrote:
> We will need to do cache maintenance at EL2 soon, so compile a copy of
> __flush_dcache_area at EL2, and provide a copy of arm64_ftr_reg_ctrel0
> as it is needed by the read_ctr macro.
>
> Signed-off-by: Quentin Perret <qperret@google.com>
> ---
> arch/arm64/include/asm/kvm_cpufeature.h | 2 ++
> arch/arm64/kvm/hyp/nvhe/Makefile | 3 ++-
> arch/arm64/kvm/hyp/nvhe/cache.S | 13 +++++++++++++
> arch/arm64/kvm/sys_regs.c | 1 +
> 4 files changed, 18 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm64/kvm/hyp/nvhe/cache.S
>
> diff --git a/arch/arm64/include/asm/kvm_cpufeature.h b/arch/arm64/include/asm/kvm_cpufeature.h
> index 3fd9f60d2180..efba1b89b8a4 100644
> --- a/arch/arm64/include/asm/kvm_cpufeature.h
> +++ b/arch/arm64/include/asm/kvm_cpufeature.h
> @@ -13,3 +13,5 @@
> #define KVM_HYP_CPU_FTR_REG(name) extern struct arm64_ftr_reg kvm_nvhe_sym(name)
> #endif
> #endif
> +
> +KVM_HYP_CPU_FTR_REG(arm64_ftr_reg_ctrel0);
I still think this is a bit weird. If you really want to macro-ise stuff,
then why not follow the sort of thing we do for e.g. per-cpu variables and
have separate DECLARE_HYP_CPU_FTR_REG and DEFINE_HYP_CPU_FTR_REG macros.
That way kvm_cpufeature.h can have header guards like a normal header and
we can drop the '#ifndef KVM_HYP_CPU_FTR_REG' altogether. I don't think
the duplication of the symbol name really matters -- it should fail at
build time if something is missing.
Will
WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org>
To: Quentin Perret <qperret@google.com>
Cc: android-kvm@google.com, catalin.marinas@arm.com,
mate.toth-pal@arm.com, seanjc@google.com, tabba@google.com,
linux-kernel@vger.kernel.org, robh+dt@kernel.org,
linux-arm-kernel@lists.infradead.org, maz@kernel.org,
kernel-team@android.com, kvmarm@lists.cs.columbia.edu
Subject: Re: [PATCH v5 14/36] KVM: arm64: Provide __flush_dcache_area at EL2
Date: Mon, 15 Mar 2021 16:33:23 +0000 [thread overview]
Message-ID: <20210315163322.GE3430@willie-the-truck> (raw)
In-Reply-To: <20210315143536.214621-15-qperret@google.com>
On Mon, Mar 15, 2021 at 02:35:14PM +0000, Quentin Perret wrote:
> We will need to do cache maintenance at EL2 soon, so compile a copy of
> __flush_dcache_area at EL2, and provide a copy of arm64_ftr_reg_ctrel0
> as it is needed by the read_ctr macro.
>
> Signed-off-by: Quentin Perret <qperret@google.com>
> ---
> arch/arm64/include/asm/kvm_cpufeature.h | 2 ++
> arch/arm64/kvm/hyp/nvhe/Makefile | 3 ++-
> arch/arm64/kvm/hyp/nvhe/cache.S | 13 +++++++++++++
> arch/arm64/kvm/sys_regs.c | 1 +
> 4 files changed, 18 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm64/kvm/hyp/nvhe/cache.S
>
> diff --git a/arch/arm64/include/asm/kvm_cpufeature.h b/arch/arm64/include/asm/kvm_cpufeature.h
> index 3fd9f60d2180..efba1b89b8a4 100644
> --- a/arch/arm64/include/asm/kvm_cpufeature.h
> +++ b/arch/arm64/include/asm/kvm_cpufeature.h
> @@ -13,3 +13,5 @@
> #define KVM_HYP_CPU_FTR_REG(name) extern struct arm64_ftr_reg kvm_nvhe_sym(name)
> #endif
> #endif
> +
> +KVM_HYP_CPU_FTR_REG(arm64_ftr_reg_ctrel0);
I still think this is a bit weird. If you really want to macro-ise stuff,
then why not follow the sort of thing we do for e.g. per-cpu variables and
have separate DECLARE_HYP_CPU_FTR_REG and DEFINE_HYP_CPU_FTR_REG macros.
That way kvm_cpufeature.h can have header guards like a normal header and
we can drop the '#ifndef KVM_HYP_CPU_FTR_REG' altogether. I don't think
the duplication of the symbol name really matters -- it should fail at
build time if something is missing.
Will
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org>
To: Quentin Perret <qperret@google.com>
Cc: catalin.marinas@arm.com, maz@kernel.org, james.morse@arm.com,
julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com,
android-kvm@google.com, seanjc@google.com, mate.toth-pal@arm.com,
linux-kernel@vger.kernel.org, robh+dt@kernel.org,
linux-arm-kernel@lists.infradead.org, kernel-team@android.com,
kvmarm@lists.cs.columbia.edu, tabba@google.com, ardb@kernel.org,
mark.rutland@arm.com, dbrazdil@google.com
Subject: Re: [PATCH v5 14/36] KVM: arm64: Provide __flush_dcache_area at EL2
Date: Mon, 15 Mar 2021 16:33:23 +0000 [thread overview]
Message-ID: <20210315163322.GE3430@willie-the-truck> (raw)
In-Reply-To: <20210315143536.214621-15-qperret@google.com>
On Mon, Mar 15, 2021 at 02:35:14PM +0000, Quentin Perret wrote:
> We will need to do cache maintenance at EL2 soon, so compile a copy of
> __flush_dcache_area at EL2, and provide a copy of arm64_ftr_reg_ctrel0
> as it is needed by the read_ctr macro.
>
> Signed-off-by: Quentin Perret <qperret@google.com>
> ---
> arch/arm64/include/asm/kvm_cpufeature.h | 2 ++
> arch/arm64/kvm/hyp/nvhe/Makefile | 3 ++-
> arch/arm64/kvm/hyp/nvhe/cache.S | 13 +++++++++++++
> arch/arm64/kvm/sys_regs.c | 1 +
> 4 files changed, 18 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm64/kvm/hyp/nvhe/cache.S
>
> diff --git a/arch/arm64/include/asm/kvm_cpufeature.h b/arch/arm64/include/asm/kvm_cpufeature.h
> index 3fd9f60d2180..efba1b89b8a4 100644
> --- a/arch/arm64/include/asm/kvm_cpufeature.h
> +++ b/arch/arm64/include/asm/kvm_cpufeature.h
> @@ -13,3 +13,5 @@
> #define KVM_HYP_CPU_FTR_REG(name) extern struct arm64_ftr_reg kvm_nvhe_sym(name)
> #endif
> #endif
> +
> +KVM_HYP_CPU_FTR_REG(arm64_ftr_reg_ctrel0);
I still think this is a bit weird. If you really want to macro-ise stuff,
then why not follow the sort of thing we do for e.g. per-cpu variables and
have separate DECLARE_HYP_CPU_FTR_REG and DEFINE_HYP_CPU_FTR_REG macros.
That way kvm_cpufeature.h can have header guards like a normal header and
we can drop the '#ifndef KVM_HYP_CPU_FTR_REG' altogether. I don't think
the duplication of the symbol name really matters -- it should fail at
build time if something is missing.
Will
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-03-15 16:34 UTC|newest]
Thread overview: 180+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-15 14:35 [PATCH v5 00/36] KVM: arm64: A stage 2 for the host Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 01/36] arm64: lib: Annotate {clear,copy}_page() as position-independent Quentin Perret
2021-03-15 14:35 ` [PATCH v5 01/36] arm64: lib: Annotate {clear, copy}_page() " Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 02/36] KVM: arm64: Link position-independent string routines into .hyp.text Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 03/36] arm64: kvm: Add standalone ticket spinlock implementation for use at hyp Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 04/36] KVM: arm64: Initialize kvm_nvhe_init_params early Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 05/36] KVM: arm64: Avoid free_page() in page-table allocator Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 06/36] KVM: arm64: Factor memory allocation out of pgtable.c Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 07/36] KVM: arm64: Introduce a BSS section for use at Hyp Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 08/36] KVM: arm64: Make kvm_call_hyp() a function call " Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 09/36] KVM: arm64: Allow using kvm_nvhe_sym() in hyp code Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 10/36] KVM: arm64: Introduce an early Hyp page allocator Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 11/36] KVM: arm64: Stub CONFIG_DEBUG_LIST at Hyp Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 12/36] KVM: arm64: Introduce a Hyp buddy page allocator Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 13/36] KVM: arm64: Enable access to sanitized CPU features at EL2 Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 14/36] KVM: arm64: Provide __flush_dcache_area " Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 16:33 ` Will Deacon [this message]
2021-03-15 16:33 ` Will Deacon
2021-03-15 16:33 ` Will Deacon
2021-03-15 16:56 ` Quentin Perret
2021-03-15 16:56 ` Quentin Perret
2021-03-15 16:56 ` Quentin Perret
2021-03-15 17:03 ` Will Deacon
2021-03-15 17:03 ` Will Deacon
2021-03-15 17:03 ` Will Deacon
2021-03-15 14:35 ` [PATCH v5 15/36] KVM: arm64: Factor out vector address calculation Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 16/36] arm64: asm: Provide set_sctlr_el2 macro Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 17/36] KVM: arm64: Prepare the creation of s1 mappings at EL2 Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 18/36] KVM: arm64: Elevate hypervisor mappings creation " Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 19/36] KVM: arm64: Use kvm_arch for stage 2 pgtable Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 20/36] KVM: arm64: Use kvm_arch in kvm_s2_mmu Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 21/36] KVM: arm64: Set host stage 2 using kvm_nvhe_init_params Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 22/36] KVM: arm64: Refactor kvm_arm_setup_stage2() Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 23/36] KVM: arm64: Refactor __load_guest_stage2() Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 24/36] KVM: arm64: Refactor __populate_fault_info() Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 25/36] KVM: arm64: Make memcache anonymous in pgtable allocator Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 26/36] KVM: arm64: Reserve memory for host stage 2 Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 27/36] KVM: arm64: Sort the hypervisor memblocks Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 28/36] KVM: arm64: Always zero invalid PTEs Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 29/36] KVM: arm64: Use page-table to track page ownership Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 16:36 ` Will Deacon
2021-03-15 16:36 ` Will Deacon
2021-03-15 16:36 ` Will Deacon
2021-03-15 16:53 ` Quentin Perret
2021-03-15 16:53 ` Quentin Perret
2021-03-15 16:53 ` Quentin Perret
2021-03-15 17:01 ` Will Deacon
2021-03-15 17:01 ` Will Deacon
2021-03-15 17:01 ` Will Deacon
2021-03-15 14:35 ` [PATCH v5 30/36] KVM: arm64: Refactor the *_map_set_prot_attr() helpers Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 31/36] KVM: arm64: Add kvm_pgtable_stage2_find_range() Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 16:31 ` Will Deacon
2021-03-15 16:31 ` Will Deacon
2021-03-15 16:31 ` Will Deacon
2021-03-15 14:35 ` [PATCH v5 32/36] KVM: arm64: Provide sanitized mmfr* registers at EL2 Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 16:31 ` Will Deacon
2021-03-15 16:31 ` Will Deacon
2021-03-15 16:31 ` Will Deacon
2021-03-15 14:35 ` [PATCH v5 33/36] KVM: arm64: Wrap the host with a stage 2 Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-16 12:28 ` Mate Toth-Pal
2021-03-16 12:28 ` Mate Toth-Pal
2021-03-16 12:28 ` Mate Toth-Pal
2021-03-16 12:53 ` Quentin Perret
2021-03-16 12:53 ` Quentin Perret
2021-03-16 12:53 ` Quentin Perret
2021-03-16 14:29 ` Quentin Perret
2021-03-16 14:29 ` Quentin Perret
2021-03-16 14:29 ` Quentin Perret
2021-03-16 15:16 ` Mate Toth-Pal
2021-03-16 15:16 ` Mate Toth-Pal
2021-03-16 15:16 ` Mate Toth-Pal
2021-03-16 17:46 ` Quentin Perret
2021-03-16 17:46 ` Quentin Perret
2021-03-16 17:46 ` Quentin Perret
2021-03-17 8:41 ` Mate Toth-Pal
2021-03-17 8:41 ` Mate Toth-Pal
2021-03-17 8:41 ` Mate Toth-Pal
2021-03-17 9:02 ` Quentin Perret
2021-03-17 9:02 ` Quentin Perret
2021-03-17 9:02 ` Quentin Perret
2021-03-17 14:57 ` Mate Toth-Pal
2021-03-17 14:57 ` Mate Toth-Pal
2021-03-17 14:57 ` Mate Toth-Pal
2021-03-17 14:17 ` [PATCH 0/2] Fixes for FWB Quentin Perret
2021-03-17 14:17 ` Quentin Perret
2021-03-17 14:17 ` Quentin Perret
2021-03-17 14:17 ` [PATCH 1/2] KVM: arm64: Introduce KVM_PGTABLE_S2_NOFWB Stage-2 flag Quentin Perret
2021-03-17 14:17 ` Quentin Perret
2021-03-17 14:17 ` Quentin Perret
2021-03-17 14:41 ` Marc Zyngier
2021-03-17 14:41 ` Marc Zyngier
2021-03-17 14:41 ` Marc Zyngier
2021-03-17 14:47 ` Quentin Perret
2021-03-17 14:47 ` Quentin Perret
2021-03-17 14:47 ` Quentin Perret
2021-03-17 14:42 ` Will Deacon
2021-03-17 14:42 ` Will Deacon
2021-03-17 14:42 ` Will Deacon
2021-03-17 14:51 ` Quentin Perret
2021-03-17 14:51 ` Quentin Perret
2021-03-17 14:51 ` Quentin Perret
2021-03-17 14:17 ` [PATCH 2/2] KVM: arm64: Disable FWB in host stage-2 Quentin Perret
2021-03-17 14:17 ` Quentin Perret
2021-03-17 14:17 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 34/36] KVM: arm64: Page-align the .hyp sections Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 35/36] KVM: arm64: Disable PMU support in protected mode Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` [PATCH v5 36/36] KVM: arm64: Protect the .hyp sections from the host Quentin Perret
2021-03-15 14:35 ` Quentin Perret
2021-03-15 14:35 ` Quentin Perret
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