From: Kishon Vijay Abraham I <kishon@ti.com>
To: Kishon Vijay Abraham I <kishon@ti.com>,
Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Swapnil Jakhade <sjakhade@cadence.com>
Cc: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-phy@lists.infradead.org>,
Lokesh Vutla <lokeshvutla@ti.com>
Subject: [PATCH v7 04/13] phy: ti: j721e-wiz: Get PHY properties only for "phy" or "link" subnode
Date: Fri, 19 Mar 2021 18:11:19 +0530 [thread overview]
Message-ID: <20210319124128.13308-5-kishon@ti.com> (raw)
In-Reply-To: <20210319124128.13308-1-kishon@ti.com>
"serdes" node (child node of WIZ) can have sub-nodes for representing links
or it can have sub-nodes for representing the various clocks within the
serdes. Instead of trying to read "reg" from every child node used for
assigning "lane_phy_type", read only if the child node's name is "phy"
or "link" subnode.
Ideally all PHY dt nodes should have node name as "phy", however
existing devicetree used "link" as subnode. So in order to maintain old
DT compatibility get PHY properties for "phy" or "link" subnode.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
drivers/phy/ti/phy-j721e-wiz.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c
index 1bb73822f44a..659597645201 100644
--- a/drivers/phy/ti/phy-j721e-wiz.c
+++ b/drivers/phy/ti/phy-j721e-wiz.c
@@ -1102,6 +1102,10 @@ static int wiz_get_lane_phy_types(struct device *dev, struct wiz *wiz)
u32 reg, num_lanes = 1, phy_type = PHY_NONE;
int ret, i;
+ if (!(of_node_name_eq(subnode, "phy") ||
+ of_node_name_eq(subnode, "link")))
+ continue;
+
ret = of_property_read_u32(subnode, "reg", ®);
if (ret) {
dev_err(dev,
--
2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Kishon Vijay Abraham I <kishon@ti.com>
To: Kishon Vijay Abraham I <kishon@ti.com>,
Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Swapnil Jakhade <sjakhade@cadence.com>
Cc: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-phy@lists.infradead.org>,
Lokesh Vutla <lokeshvutla@ti.com>
Subject: [PATCH v7 04/13] phy: ti: j721e-wiz: Get PHY properties only for "phy" or "link" subnode
Date: Fri, 19 Mar 2021 18:11:19 +0530 [thread overview]
Message-ID: <20210319124128.13308-5-kishon@ti.com> (raw)
In-Reply-To: <20210319124128.13308-1-kishon@ti.com>
"serdes" node (child node of WIZ) can have sub-nodes for representing links
or it can have sub-nodes for representing the various clocks within the
serdes. Instead of trying to read "reg" from every child node used for
assigning "lane_phy_type", read only if the child node's name is "phy"
or "link" subnode.
Ideally all PHY dt nodes should have node name as "phy", however
existing devicetree used "link" as subnode. So in order to maintain old
DT compatibility get PHY properties for "phy" or "link" subnode.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
drivers/phy/ti/phy-j721e-wiz.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c
index 1bb73822f44a..659597645201 100644
--- a/drivers/phy/ti/phy-j721e-wiz.c
+++ b/drivers/phy/ti/phy-j721e-wiz.c
@@ -1102,6 +1102,10 @@ static int wiz_get_lane_phy_types(struct device *dev, struct wiz *wiz)
u32 reg, num_lanes = 1, phy_type = PHY_NONE;
int ret, i;
+ if (!(of_node_name_eq(subnode, "phy") ||
+ of_node_name_eq(subnode, "link")))
+ continue;
+
ret = of_property_read_u32(subnode, "reg", ®);
if (ret) {
dev_err(dev,
--
2.17.1
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2021-03-19 12:44 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-19 12:41 [PATCH v7 00/13] PHY: Add support in Sierra to use external clock Kishon Vijay Abraham I
2021-03-19 12:41 ` Kishon Vijay Abraham I
2021-03-19 12:41 ` [PATCH v7 01/13] phy: cadence: Sierra: Fix PHY power_on sequence Kishon Vijay Abraham I
2021-03-19 12:41 ` Kishon Vijay Abraham I
2021-03-19 12:41 ` [PATCH v7 02/13] phy: ti: j721e-wiz: Invoke wiz_init() before of_platform_device_create() Kishon Vijay Abraham I
2021-03-19 12:41 ` Kishon Vijay Abraham I
2021-03-19 12:41 ` [PATCH v7 03/13] phy: cadence: Sierra: Create PHY only for "phy" or "link" sub-nodes Kishon Vijay Abraham I
2021-03-19 12:41 ` Kishon Vijay Abraham I
2021-03-19 12:41 ` Kishon Vijay Abraham I [this message]
2021-03-19 12:41 ` [PATCH v7 04/13] phy: ti: j721e-wiz: Get PHY properties only for "phy" or "link" subnode Kishon Vijay Abraham I
2021-03-19 12:41 ` [PATCH v7 05/13] phy: cadence: Sierra: Move all clk_get_*() to a separate function Kishon Vijay Abraham I
2021-03-19 12:41 ` Kishon Vijay Abraham I
2021-03-19 12:41 ` [PATCH v7 06/13] phy: cadence: Sierra: Move all reset_control_get*() " Kishon Vijay Abraham I
2021-03-19 12:41 ` Kishon Vijay Abraham I
2021-03-19 12:41 ` [PATCH v7 07/13] phy: cadence: Sierra: Explicitly request exclusive reset control Kishon Vijay Abraham I
2021-03-19 12:41 ` Kishon Vijay Abraham I
2021-03-19 12:41 ` [PATCH v7 08/13] phy: cadence-torrent: Use a common header file for Cadence SERDES Kishon Vijay Abraham I
2021-03-19 12:41 ` Kishon Vijay Abraham I
2021-03-23 22:31 ` Rob Herring
2021-03-23 22:31 ` Rob Herring
2021-03-19 12:41 ` [PATCH v7 09/13] phy: cadence: Sierra: Add array of input clocks in "struct cdns_sierra_phy" Kishon Vijay Abraham I
2021-03-19 12:41 ` Kishon Vijay Abraham I
2021-03-19 12:41 ` [PATCH v7 10/13] phy: cadence: Sierra: Add missing clk_disable_unprepare() in .remove callback Kishon Vijay Abraham I
2021-03-19 12:41 ` Kishon Vijay Abraham I
2021-03-19 12:41 ` [PATCH v7 11/13] dt-bindings: phy: phy-cadence-sierra: Add binding to model Sierra as clock provider Kishon Vijay Abraham I
2021-03-19 12:41 ` Kishon Vijay Abraham I
2021-03-19 12:41 ` [PATCH v7 12/13] phy: cadence: Sierra: Model PLL_CMNLC and PLL_CMNLC1 as clocks (mux clocks) Kishon Vijay Abraham I
2021-03-19 12:41 ` Kishon Vijay Abraham I
2021-03-19 12:41 ` [PATCH v7 13/13] phy: cadence: Sierra: Enable pll_cmnlc and pll_cmnlc1 clocks Kishon Vijay Abraham I
2021-03-19 12:41 ` Kishon Vijay Abraham I
2021-03-31 11:14 ` [PATCH v7 00/13] PHY: Add support in Sierra to use external clock Vinod Koul
2021-03-31 11:14 ` Vinod Koul
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