From: Claudiu Beznea <claudiu.beznea@microchip.com> To: <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>, <ludovic.desroches@microchip.com>, <robh+dt@kernel.org>, <linux@armlinux.org.uk> Cc: <linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Claudiu Beznea <claudiu.beznea@microchip.com> Subject: [PATCH v3 13/24] ARM: at91: pm: add support for MCK1..4 save/restore for ulp modes Date: Thu, 15 Apr 2021 13:49:59 +0300 [thread overview] Message-ID: <20210415105010.569620-14-claudiu.beznea@microchip.com> (raw) In-Reply-To: <20210415105010.569620-1-claudiu.beznea@microchip.com> Add support for MCK1..4 save restore for ULP modes. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> --- arch/arm/mach-at91/pm_suspend.S | 126 ++++++++++++++++++++++++++++++++ 1 file changed, 126 insertions(+) diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S index 84418120ba67..8b0b8619ee8a 100644 --- a/arch/arm/mach-at91/pm_suspend.S +++ b/arch/arm/mach-at91/pm_suspend.S @@ -765,7 +765,122 @@ sr_dis_exit: 2: .endm +/** + * at91_mckx_ps_enable: save MCK1..4 settings and switch it to main clock + * + * Side effects: overwrites tmp1, tmp2 + */ +.macro at91_mckx_ps_enable +#ifdef CONFIG_SOC_SAMA7 + ldr pmc, .pmc_base + + /* There are 4 MCKs we need to handle: MCK1..4 */ + mov tmp1, #1 +e_loop: cmp tmp1, #5 + beq e_done + + /* Write MCK ID to retrieve the settings. */ + str tmp1, [pmc, #AT91_PMC_MCR_V2] + ldr tmp2, [pmc, #AT91_PMC_MCR_V2] + +e_save_mck1: + cmp tmp1, #1 + bne e_save_mck2 + str tmp2, .saved_mck1 + b e_ps + +e_save_mck2: + cmp tmp1, #2 + bne e_save_mck3 + str tmp2, .saved_mck2 + b e_ps + +e_save_mck3: + cmp tmp1, #3 + bne e_save_mck4 + str tmp2, .saved_mck3 + b e_ps + +e_save_mck4: + str tmp2, .saved_mck4 + +e_ps: + /* Use CSS=MAINCK and DIV=1. */ + bic tmp2, tmp2, #AT91_PMC_MCR_V2_CSS + bic tmp2, tmp2, #AT91_PMC_MCR_V2_DIV + orr tmp2, tmp2, #AT91_PMC_MCR_V2_CSS_MAINCK + orr tmp2, tmp2, #AT91_PMC_MCR_V2_DIV1 + str tmp2, [pmc, #AT91_PMC_MCR_V2] + + wait_mckrdy tmp1 + + add tmp1, tmp1, #1 + b e_loop + +e_done: +#endif +.endm + +/** + * at91_mckx_ps_restore: restore MCK1..4 settings + * + * Side effects: overwrites tmp1, tmp2 + */ +.macro at91_mckx_ps_restore +#ifdef CONFIG_SOC_SAMA7 + ldr pmc, .pmc_base + + /* There are 4 MCKs we need to handle: MCK1..4 */ + mov tmp1, #1 +r_loop: cmp tmp1, #5 + beq r_done + +r_save_mck1: + cmp tmp1, #1 + bne r_save_mck2 + ldr tmp2, .saved_mck1 + b r_ps + +r_save_mck2: + cmp tmp1, #2 + bne r_save_mck3 + ldr tmp2, .saved_mck2 + b r_ps + +r_save_mck3: + cmp tmp1, #3 + bne r_save_mck4 + ldr tmp2, .saved_mck3 + b r_ps + +r_save_mck4: + ldr tmp2, .saved_mck4 + +r_ps: + /* Write MCK ID to retrieve the settings. */ + str tmp1, [pmc, #AT91_PMC_MCR_V2] + ldr tmp3, [pmc, #AT91_PMC_MCR_V2] + + /* We need to restore CSS and DIV. */ + bic tmp3, tmp3, #AT91_PMC_MCR_V2_CSS + bic tmp3, tmp3, #AT91_PMC_MCR_V2_DIV + orr tmp3, tmp3, tmp2 + bic tmp3, tmp3, #AT91_PMC_MCR_V2_ID_MSK + orr tmp3, tmp3, tmp1 + orr tmp3, tmp3, #AT91_PMC_MCR_V2_CMD + str tmp2, [pmc, #AT91_PMC_MCR_V2] + + wait_mckrdy tmp1 + + add tmp1, tmp1, #1 + b r_loop +r_done: +#endif +.endm + .macro at91_ulp_mode + at91_mckx_ps_enable + ldr pmc, .pmc_base ldr tmp2, .mckr_offset ldr tmp3, .pm_mode @@ -817,6 +932,7 @@ ulp_exit: mov tmp3, #0 wait_mckrdy tmp3 + at91_mckx_ps_restore .endm .macro at91_backup_mode @@ -946,6 +1062,16 @@ ENDPROC(at91_pm_suspend_in_sram) .word 0 .saved_osc_status: .word 0 +#ifdef CONFIG_SOC_SAMA7 +.saved_mck1: + .word 0 +.saved_mck2: + .word 0 +.saved_mck3: + .word 0 +.saved_mck4: + .word 0 +#endif ENTRY(at91_pm_suspend_in_sram_sz) .word .-at91_pm_suspend_in_sram -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Claudiu Beznea <claudiu.beznea@microchip.com> To: <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>, <ludovic.desroches@microchip.com>, <robh+dt@kernel.org>, <linux@armlinux.org.uk> Cc: <linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, Claudiu Beznea <claudiu.beznea@microchip.com> Subject: [PATCH v3 13/24] ARM: at91: pm: add support for MCK1..4 save/restore for ulp modes Date: Thu, 15 Apr 2021 13:49:59 +0300 [thread overview] Message-ID: <20210415105010.569620-14-claudiu.beznea@microchip.com> (raw) In-Reply-To: <20210415105010.569620-1-claudiu.beznea@microchip.com> Add support for MCK1..4 save restore for ULP modes. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> --- arch/arm/mach-at91/pm_suspend.S | 126 ++++++++++++++++++++++++++++++++ 1 file changed, 126 insertions(+) diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S index 84418120ba67..8b0b8619ee8a 100644 --- a/arch/arm/mach-at91/pm_suspend.S +++ b/arch/arm/mach-at91/pm_suspend.S @@ -765,7 +765,122 @@ sr_dis_exit: 2: .endm +/** + * at91_mckx_ps_enable: save MCK1..4 settings and switch it to main clock + * + * Side effects: overwrites tmp1, tmp2 + */ +.macro at91_mckx_ps_enable +#ifdef CONFIG_SOC_SAMA7 + ldr pmc, .pmc_base + + /* There are 4 MCKs we need to handle: MCK1..4 */ + mov tmp1, #1 +e_loop: cmp tmp1, #5 + beq e_done + + /* Write MCK ID to retrieve the settings. */ + str tmp1, [pmc, #AT91_PMC_MCR_V2] + ldr tmp2, [pmc, #AT91_PMC_MCR_V2] + +e_save_mck1: + cmp tmp1, #1 + bne e_save_mck2 + str tmp2, .saved_mck1 + b e_ps + +e_save_mck2: + cmp tmp1, #2 + bne e_save_mck3 + str tmp2, .saved_mck2 + b e_ps + +e_save_mck3: + cmp tmp1, #3 + bne e_save_mck4 + str tmp2, .saved_mck3 + b e_ps + +e_save_mck4: + str tmp2, .saved_mck4 + +e_ps: + /* Use CSS=MAINCK and DIV=1. */ + bic tmp2, tmp2, #AT91_PMC_MCR_V2_CSS + bic tmp2, tmp2, #AT91_PMC_MCR_V2_DIV + orr tmp2, tmp2, #AT91_PMC_MCR_V2_CSS_MAINCK + orr tmp2, tmp2, #AT91_PMC_MCR_V2_DIV1 + str tmp2, [pmc, #AT91_PMC_MCR_V2] + + wait_mckrdy tmp1 + + add tmp1, tmp1, #1 + b e_loop + +e_done: +#endif +.endm + +/** + * at91_mckx_ps_restore: restore MCK1..4 settings + * + * Side effects: overwrites tmp1, tmp2 + */ +.macro at91_mckx_ps_restore +#ifdef CONFIG_SOC_SAMA7 + ldr pmc, .pmc_base + + /* There are 4 MCKs we need to handle: MCK1..4 */ + mov tmp1, #1 +r_loop: cmp tmp1, #5 + beq r_done + +r_save_mck1: + cmp tmp1, #1 + bne r_save_mck2 + ldr tmp2, .saved_mck1 + b r_ps + +r_save_mck2: + cmp tmp1, #2 + bne r_save_mck3 + ldr tmp2, .saved_mck2 + b r_ps + +r_save_mck3: + cmp tmp1, #3 + bne r_save_mck4 + ldr tmp2, .saved_mck3 + b r_ps + +r_save_mck4: + ldr tmp2, .saved_mck4 + +r_ps: + /* Write MCK ID to retrieve the settings. */ + str tmp1, [pmc, #AT91_PMC_MCR_V2] + ldr tmp3, [pmc, #AT91_PMC_MCR_V2] + + /* We need to restore CSS and DIV. */ + bic tmp3, tmp3, #AT91_PMC_MCR_V2_CSS + bic tmp3, tmp3, #AT91_PMC_MCR_V2_DIV + orr tmp3, tmp3, tmp2 + bic tmp3, tmp3, #AT91_PMC_MCR_V2_ID_MSK + orr tmp3, tmp3, tmp1 + orr tmp3, tmp3, #AT91_PMC_MCR_V2_CMD + str tmp2, [pmc, #AT91_PMC_MCR_V2] + + wait_mckrdy tmp1 + + add tmp1, tmp1, #1 + b r_loop +r_done: +#endif +.endm + .macro at91_ulp_mode + at91_mckx_ps_enable + ldr pmc, .pmc_base ldr tmp2, .mckr_offset ldr tmp3, .pm_mode @@ -817,6 +932,7 @@ ulp_exit: mov tmp3, #0 wait_mckrdy tmp3 + at91_mckx_ps_restore .endm .macro at91_backup_mode @@ -946,6 +1062,16 @@ ENDPROC(at91_pm_suspend_in_sram) .word 0 .saved_osc_status: .word 0 +#ifdef CONFIG_SOC_SAMA7 +.saved_mck1: + .word 0 +.saved_mck2: + .word 0 +.saved_mck3: + .word 0 +.saved_mck4: + .word 0 +#endif ENTRY(at91_pm_suspend_in_sram_sz) .word .-at91_pm_suspend_in_sram -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-04-15 10:51 UTC|newest] Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-04-15 10:49 [PATCH v3 00/24] ARM: at91: pm: add support for sama7g5 Claudiu Beznea 2021-04-15 10:49 ` Claudiu Beznea 2021-04-15 10:49 ` [PATCH v3 01/24] ARM: at91: pm: move pm_bu to soc_pm data structure Claudiu Beznea 2021-04-15 10:49 ` Claudiu Beznea 2021-04-15 10:49 ` [PATCH v3 02/24] ARM: at91: pm: move the setup of soc_pm.bu->suspended Claudiu Beznea 2021-04-15 10:49 ` Claudiu Beznea 2021-04-15 10:49 ` [PATCH v3 03/24] ARM: at91: pm: document at91_soc_pm structure Claudiu Beznea 2021-04-15 10:49 ` Claudiu Beznea 2021-04-15 10:49 ` [PATCH v3 04/24] ARM: at91: pm: check for different controllers in at91_pm_modes_init() Claudiu Beznea 2021-04-15 10:49 ` Claudiu Beznea 2021-04-15 10:49 ` [PATCH v3 05/24] ARM: at91: pm: do not initialize pdev Claudiu Beznea 2021-04-15 10:49 ` Claudiu Beznea 2021-04-15 10:49 ` [PATCH v3 06/24] ARM: at91: pm: use r7 instead of tmp1 Claudiu Beznea 2021-04-15 10:49 ` Claudiu Beznea 2021-04-15 10:49 ` [PATCH v3 07/24] ARM: at91: pm: avoid push and pop on stack while memory is in self-refersh Claudiu Beznea 2021-04-15 10:49 ` Claudiu Beznea 2021-04-15 10:49 ` [PATCH v3 08/24] ARM: at91: pm: s/CONFIG_SOC_SAM9X60/CONFIG_HAVE_AT91_SAM9X60_PLL/g Claudiu Beznea 2021-04-15 10:49 ` Claudiu Beznea 2021-04-15 10:49 ` [PATCH v3 09/24] ARM: at91: pm: add support for waiting MCK1..4 Claudiu Beznea 2021-04-15 10:49 ` Claudiu Beznea 2021-04-15 10:49 ` [PATCH v3 10/24] ARM: at91: sfrbu: add sfrbu registers definitions for sama7g5 Claudiu Beznea 2021-04-15 10:49 ` Claudiu Beznea 2021-04-15 10:49 ` [PATCH v3 11/24] ARM: at91: ddr: add registers definitions for sama7g5's ddr Claudiu Beznea 2021-04-15 10:49 ` Claudiu Beznea 2021-04-15 10:49 ` [PATCH v3 12/24] ARM: at91: pm: add self-refresh support for sama7g5 Claudiu Beznea 2021-04-15 10:49 ` Claudiu Beznea 2021-04-15 10:49 ` Claudiu Beznea [this message] 2021-04-15 10:49 ` [PATCH v3 13/24] ARM: at91: pm: add support for MCK1..4 save/restore for ulp modes Claudiu Beznea 2021-04-15 10:50 ` [PATCH v3 14/24] ARM: at91: pm: add support for 2.5V LDO regulator control Claudiu Beznea 2021-04-15 10:50 ` Claudiu Beznea 2021-04-15 10:50 ` [PATCH v3 15/24] ARM: at91: pm: wait for ddr power mode off Claudiu Beznea 2021-04-15 10:50 ` Claudiu Beznea 2021-04-15 10:50 ` [PATCH v3 16/24] dt-bindings: atmel-sysreg: add bindings for sama7g5 Claudiu Beznea 2021-04-15 10:50 ` Claudiu Beznea 2021-04-15 20:59 ` Rob Herring 2021-04-15 20:59 ` Rob Herring 2021-04-15 10:50 ` [PATCH v3 17/24] ARM: at91: pm: add sama7g5 ddr controller Claudiu Beznea 2021-04-15 10:50 ` Claudiu Beznea 2021-04-15 10:50 ` [PATCH v3 18/24] ARM: at91: pm: add sama7g5 ddr phy controller Claudiu Beznea 2021-04-15 10:50 ` Claudiu Beznea 2021-04-15 10:50 ` [PATCH v3 19/24] ARM: at91: pm: save ddr phy calibration data to securam Claudiu Beznea 2021-04-15 10:50 ` Claudiu Beznea 2021-04-15 10:50 ` [PATCH v3 20/24] ARM: at91: pm: add backup mode support for SAMA7G5 Claudiu Beznea 2021-04-15 10:50 ` Claudiu Beznea 2021-04-15 10:50 ` [PATCH v3 21/24] ARM: at91: pm: add sama7g5's pmc Claudiu Beznea 2021-04-15 10:50 ` Claudiu Beznea 2021-04-15 10:50 ` [PATCH v3 22/24] ARM: at91: sama7: introduce sama7 SoC family Claudiu Beznea 2021-04-15 10:50 ` Claudiu Beznea 2021-04-15 10:50 ` [PATCH v3 23/24] ARM: at91: pm: add pm support for SAMA7G5 Claudiu Beznea 2021-04-15 10:50 ` Claudiu Beznea 2021-04-15 10:50 ` [PATCH v3 24/24] ARM: at91: pm: add sama7g5 shdwc Claudiu Beznea 2021-04-15 10:50 ` Claudiu Beznea 2021-07-16 18:03 ` [PATCH v3 00/24] ARM: at91: pm: add support for sama7g5 Nicolas Ferre 2021-07-16 18:03 ` Nicolas Ferre
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