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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Laurent Vivier" <laurent@vivier.eu>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	qemu-s390x@nongnu.org, qemu-arm@nongnu.org, qemu-ppc@nongnu.org,
	"Paolo Bonzini" <pbonzini@redhat.com>
Subject: [PATCH v7 06/23] cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs
Date: Mon, 17 May 2021 12:51:23 +0200	[thread overview]
Message-ID: <20210517105140.1062037-7-f4bug@amsat.org> (raw)
In-Reply-To: <20210517105140.1062037-1-f4bug@amsat.org>

To be able to later extract the cpu_get_phys_page_debug() and
cpu_asidx_from_attrs() handlers from CPUClass, un-inline them
from "hw/core/cpu.h".

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 include/hw/core/cpu.h | 33 ++++-----------------------------
 hw/core/cpu-sysemu.c  | 32 ++++++++++++++++++++++++++++++++
 2 files changed, 36 insertions(+), 29 deletions(-)

diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index d45f78290e0..df495287850 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -586,18 +586,8 @@ void cpu_dump_statistics(CPUState *cpu, int flags);
  *
  * Returns: Corresponding physical page address or -1 if no page found.
  */
-static inline hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
-                                                   MemTxAttrs *attrs)
-{
-    CPUClass *cc = CPU_GET_CLASS(cpu);
-
-    if (cc->get_phys_page_attrs_debug) {
-        return cc->get_phys_page_attrs_debug(cpu, addr, attrs);
-    }
-    /* Fallback for CPUs which don't implement the _attrs_ hook */
-    *attrs = MEMTXATTRS_UNSPECIFIED;
-    return cc->get_phys_page_debug(cpu, addr);
-}
+hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
+                                     MemTxAttrs *attrs);
 
 /**
  * cpu_get_phys_page_debug:
@@ -609,12 +599,7 @@ static inline hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
  *
  * Returns: Corresponding physical page address or -1 if no page found.
  */
-static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
-{
-    MemTxAttrs attrs = {};
-
-    return cpu_get_phys_page_attrs_debug(cpu, addr, &attrs);
-}
+hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
 
 /** cpu_asidx_from_attrs:
  * @cpu: CPU
@@ -623,17 +608,7 @@ static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
  * Returns the address space index specifying the CPU AddressSpace
  * to use for a memory access with the given transaction attributes.
  */
-static inline int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs)
-{
-    CPUClass *cc = CPU_GET_CLASS(cpu);
-    int ret = 0;
-
-    if (cc->asidx_from_attrs) {
-        ret = cc->asidx_from_attrs(cpu, attrs);
-        assert(ret < cpu->num_ases && ret >= 0);
-    }
-    return ret;
-}
+int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs);
 
 #endif /* CONFIG_USER_ONLY */
 
diff --git a/hw/core/cpu-sysemu.c b/hw/core/cpu-sysemu.c
index f517ef5d460..fe90dde8681 100644
--- a/hw/core/cpu-sysemu.c
+++ b/hw/core/cpu-sysemu.c
@@ -22,6 +22,38 @@
 #include "qapi/error.h"
 #include "hw/core/cpu.h"
 
+hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
+                                     MemTxAttrs *attrs)
+{
+    CPUClass *cc = CPU_GET_CLASS(cpu);
+
+    if (cc->get_phys_page_attrs_debug) {
+        return cc->get_phys_page_attrs_debug(cpu, addr, attrs);
+    }
+    /* Fallback for CPUs which don't implement the _attrs_ hook */
+    *attrs = MEMTXATTRS_UNSPECIFIED;
+    return cc->get_phys_page_debug(cpu, addr);
+}
+
+hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
+{
+    MemTxAttrs attrs = {};
+
+    return cpu_get_phys_page_attrs_debug(cpu, addr, &attrs);
+}
+
+int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs)
+{
+    CPUClass *cc = CPU_GET_CLASS(cpu);
+    int ret = 0;
+
+    if (cc->asidx_from_attrs) {
+        ret = cc->asidx_from_attrs(cpu, attrs);
+        assert(ret < cpu->num_ases && ret >= 0);
+    }
+    return ret;
+}
+
 GuestPanicInformation *cpu_get_crash_info(CPUState *cpu)
 {
     CPUClass *cc = CPU_GET_CLASS(cpu);
-- 
2.26.3



WARNING: multiple messages have this Message-ID (diff)
From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: qemu-s390x@nongnu.org,
	"Richard Henderson" <richard.henderson@linaro.org>,
	qemu-arm@nongnu.org, "Laurent Vivier" <laurent@vivier.eu>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	qemu-riscv@nongnu.org, qemu-ppc@nongnu.org,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PATCH v7 06/23] cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs
Date: Mon, 17 May 2021 12:51:23 +0200	[thread overview]
Message-ID: <20210517105140.1062037-7-f4bug@amsat.org> (raw)
In-Reply-To: <20210517105140.1062037-1-f4bug@amsat.org>

To be able to later extract the cpu_get_phys_page_debug() and
cpu_asidx_from_attrs() handlers from CPUClass, un-inline them
from "hw/core/cpu.h".

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 include/hw/core/cpu.h | 33 ++++-----------------------------
 hw/core/cpu-sysemu.c  | 32 ++++++++++++++++++++++++++++++++
 2 files changed, 36 insertions(+), 29 deletions(-)

diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index d45f78290e0..df495287850 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -586,18 +586,8 @@ void cpu_dump_statistics(CPUState *cpu, int flags);
  *
  * Returns: Corresponding physical page address or -1 if no page found.
  */
-static inline hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
-                                                   MemTxAttrs *attrs)
-{
-    CPUClass *cc = CPU_GET_CLASS(cpu);
-
-    if (cc->get_phys_page_attrs_debug) {
-        return cc->get_phys_page_attrs_debug(cpu, addr, attrs);
-    }
-    /* Fallback for CPUs which don't implement the _attrs_ hook */
-    *attrs = MEMTXATTRS_UNSPECIFIED;
-    return cc->get_phys_page_debug(cpu, addr);
-}
+hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
+                                     MemTxAttrs *attrs);
 
 /**
  * cpu_get_phys_page_debug:
@@ -609,12 +599,7 @@ static inline hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
  *
  * Returns: Corresponding physical page address or -1 if no page found.
  */
-static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
-{
-    MemTxAttrs attrs = {};
-
-    return cpu_get_phys_page_attrs_debug(cpu, addr, &attrs);
-}
+hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
 
 /** cpu_asidx_from_attrs:
  * @cpu: CPU
@@ -623,17 +608,7 @@ static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
  * Returns the address space index specifying the CPU AddressSpace
  * to use for a memory access with the given transaction attributes.
  */
-static inline int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs)
-{
-    CPUClass *cc = CPU_GET_CLASS(cpu);
-    int ret = 0;
-
-    if (cc->asidx_from_attrs) {
-        ret = cc->asidx_from_attrs(cpu, attrs);
-        assert(ret < cpu->num_ases && ret >= 0);
-    }
-    return ret;
-}
+int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs);
 
 #endif /* CONFIG_USER_ONLY */
 
diff --git a/hw/core/cpu-sysemu.c b/hw/core/cpu-sysemu.c
index f517ef5d460..fe90dde8681 100644
--- a/hw/core/cpu-sysemu.c
+++ b/hw/core/cpu-sysemu.c
@@ -22,6 +22,38 @@
 #include "qapi/error.h"
 #include "hw/core/cpu.h"
 
+hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
+                                     MemTxAttrs *attrs)
+{
+    CPUClass *cc = CPU_GET_CLASS(cpu);
+
+    if (cc->get_phys_page_attrs_debug) {
+        return cc->get_phys_page_attrs_debug(cpu, addr, attrs);
+    }
+    /* Fallback for CPUs which don't implement the _attrs_ hook */
+    *attrs = MEMTXATTRS_UNSPECIFIED;
+    return cc->get_phys_page_debug(cpu, addr);
+}
+
+hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
+{
+    MemTxAttrs attrs = {};
+
+    return cpu_get_phys_page_attrs_debug(cpu, addr, &attrs);
+}
+
+int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs)
+{
+    CPUClass *cc = CPU_GET_CLASS(cpu);
+    int ret = 0;
+
+    if (cc->asidx_from_attrs) {
+        ret = cc->asidx_from_attrs(cpu, attrs);
+        assert(ret < cpu->num_ases && ret >= 0);
+    }
+    return ret;
+}
+
 GuestPanicInformation *cpu_get_crash_info(CPUState *cpu)
 {
     CPUClass *cc = CPU_GET_CLASS(cpu);
-- 
2.26.3



  parent reply	other threads:[~2021-05-17 10:55 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-17 10:51 [PATCH v7 00/23] cpu: Introduce SysemuCPUOps structure Philippe Mathieu-Daudé
2021-05-17 10:51 ` Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 01/23] NOTFORMERGE target/arm: Restrict MTE code to softmmu Philippe Mathieu-Daudé
2021-05-17 10:51   ` Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 02/23] cpu: Restrict target cpu_do_transaction_failed() handlers to sysemu Philippe Mathieu-Daudé
2021-05-17 10:51   ` Philippe Mathieu-Daudé
2021-05-26  2:12   ` Richard Henderson
2021-05-26  2:12     ` Richard Henderson
2021-05-26 17:22     ` Philippe Mathieu-Daudé
2021-05-26 17:47       ` Richard Henderson
2021-05-17 10:51 ` [PATCH v7 03/23] cpu: Restrict target cpu_do_unaligned_access() " Philippe Mathieu-Daudé
2021-05-17 10:51   ` Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 04/23] cpu: Remove duplicated 'sysemu/hw_accel.h' header Philippe Mathieu-Daudé
2021-05-17 10:51   ` Philippe Mathieu-Daudé
2021-05-26  2:13   ` Richard Henderson
2021-05-26  2:13     ` Richard Henderson
2021-05-17 10:51 ` [PATCH v7 05/23] cpu: Split as cpu-common / cpu-sysemu Philippe Mathieu-Daudé
2021-05-17 10:51   ` Philippe Mathieu-Daudé
2021-05-26  2:16   ` Richard Henderson
2021-05-26  2:16     ` Richard Henderson
2021-05-17 10:51 ` Philippe Mathieu-Daudé [this message]
2021-05-17 10:51   ` [PATCH v7 06/23] cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 07/23] cpu: Introduce cpu_virtio_is_big_endian() Philippe Mathieu-Daudé
2021-05-17 10:51   ` Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 08/23] cpu: Directly use cpu_write_elf*() fallback handlers in place Philippe Mathieu-Daudé
2021-05-17 10:51   ` Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 09/23] cpu: Directly use get_paging_enabled() " Philippe Mathieu-Daudé
2021-05-17 10:51   ` Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 10/23] cpu: Directly use get_memory_mapping() " Philippe Mathieu-Daudé
2021-05-17 10:51   ` Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 11/23] cpu: Assert DeviceClass::vmsd is NULL on user emulation Philippe Mathieu-Daudé
2021-05-17 10:51   ` Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 12/23] cpu: Rename CPUClass vmsd -> legacy_vmsd Philippe Mathieu-Daudé
2021-05-17 10:51   ` Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 13/23] cpu: Move AVR target vmsd field from CPUClass to DeviceClass Philippe Mathieu-Daudé
2021-05-17 10:51   ` Philippe Mathieu-Daudé
2021-05-26  2:19   ` Richard Henderson
2021-05-26  2:19     ` Richard Henderson
2021-05-17 10:51 ` [PATCH v7 14/23] cpu: Introduce SysemuCPUOps structure Philippe Mathieu-Daudé
2021-05-17 10:51   ` Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 15/23] cpu: Move CPUClass::vmsd to SysemuCPUOps Philippe Mathieu-Daudé
2021-05-17 10:51   ` Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 16/23] cpu: Move CPUClass::virtio_is_big_endian " Philippe Mathieu-Daudé
2021-05-17 10:51   ` Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 17/23] cpu: Move CPUClass::get_crash_info " Philippe Mathieu-Daudé
2021-05-17 10:51   ` Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 18/23] cpu: Move CPUClass::write_elf* " Philippe Mathieu-Daudé
2021-05-17 10:51   ` Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 19/23] cpu: Move CPUClass::asidx_from_attrs " Philippe Mathieu-Daudé
2021-05-17 10:51   ` Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 20/23] cpu: Move CPUClass::get_phys_page_debug " Philippe Mathieu-Daudé
2021-05-17 10:51   ` Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 21/23] cpu: Move CPUClass::get_memory_mapping " Philippe Mathieu-Daudé
2021-05-17 10:51   ` Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 22/23] cpu: Move CPUClass::get_paging_enabled " Philippe Mathieu-Daudé
2021-05-17 10:51   ` Philippe Mathieu-Daudé
2021-05-17 10:51 ` [PATCH v7 23/23] cpu: Restrict "hw/core/sysemu-cpu-ops.h" to target/cpu.c Philippe Mathieu-Daudé
2021-05-17 10:51   ` Philippe Mathieu-Daudé
2021-05-25 14:12 ` [PATCH v7 00/23] cpu: Introduce SysemuCPUOps structure Philippe Mathieu-Daudé
2021-05-26 17:42 ` Richard Henderson
2021-05-26 17:42   ` Richard Henderson

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