From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Mark Brown <broonie@kernel.org>
Cc: patrice.chotard@foss.st.com,
Vignesh Raghavendra <vigneshr@ti.com>,
Boris Brezillon <boris.brezillon@collabora.com>,
linux-mtd@lists.infradead.org,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
linux-spi@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, christophe.kerello@foss.st.com
Subject: Re: [PATCH v5 0/3] MTD: spinand: Add spi_mem_poll_status() support
Date: Wed, 26 May 2021 10:32:40 +0200 [thread overview]
Message-ID: <20210526103240.1c71002c@xps13> (raw)
In-Reply-To: <20210519191836.GH4224@sirena.org.uk>
Hi Mark,
Mark Brown <broonie@kernel.org> wrote on Wed, 19 May 2021 20:18:36
+0100:
> On Tue, May 18, 2021 at 06:27:51PM +0200, patrice.chotard@foss.st.com wrote:
> > From: Patrice Chotard <patrice.chotard@foss.st.com>
> >
> > This series adds support for the spi_mem_poll_status() spinand
> > interface.
> > Some QSPI controllers allows to poll automatically memory
> > status during operations (erase, read or write). This allows to
> > offload the CPU for this task.
> > STM32 QSPI is supporting this feature, driver update are also
> > part of this series.
>
> The SPI bits look good to me - should we merge via MTD or SPI?
I don't expect any conflicts with the current changes in MTD, I just
acked the SPI-NAND patch, you may take it through SPI.
Thanks,
Miquèl
WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Mark Brown <broonie@kernel.org>
Cc: patrice.chotard@foss.st.com,
Vignesh Raghavendra <vigneshr@ti.com>,
Boris Brezillon <boris.brezillon@collabora.com>,
linux-mtd@lists.infradead.org,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
linux-spi@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, christophe.kerello@foss.st.com
Subject: Re: [PATCH v5 0/3] MTD: spinand: Add spi_mem_poll_status() support
Date: Wed, 26 May 2021 10:32:40 +0200 [thread overview]
Message-ID: <20210526103240.1c71002c@xps13> (raw)
In-Reply-To: <20210519191836.GH4224@sirena.org.uk>
Hi Mark,
Mark Brown <broonie@kernel.org> wrote on Wed, 19 May 2021 20:18:36
+0100:
> On Tue, May 18, 2021 at 06:27:51PM +0200, patrice.chotard@foss.st.com wrote:
> > From: Patrice Chotard <patrice.chotard@foss.st.com>
> >
> > This series adds support for the spi_mem_poll_status() spinand
> > interface.
> > Some QSPI controllers allows to poll automatically memory
> > status during operations (erase, read or write). This allows to
> > offload the CPU for this task.
> > STM32 QSPI is supporting this feature, driver update are also
> > part of this series.
>
> The SPI bits look good to me - should we merge via MTD or SPI?
I don't expect any conflicts with the current changes in MTD, I just
acked the SPI-NAND patch, you may take it through SPI.
Thanks,
Miquèl
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Mark Brown <broonie@kernel.org>
Cc: patrice.chotard@foss.st.com,
Vignesh Raghavendra <vigneshr@ti.com>,
Boris Brezillon <boris.brezillon@collabora.com>,
linux-mtd@lists.infradead.org,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
linux-spi@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, christophe.kerello@foss.st.com
Subject: Re: [PATCH v5 0/3] MTD: spinand: Add spi_mem_poll_status() support
Date: Wed, 26 May 2021 10:32:40 +0200 [thread overview]
Message-ID: <20210526103240.1c71002c@xps13> (raw)
In-Reply-To: <20210519191836.GH4224@sirena.org.uk>
Hi Mark,
Mark Brown <broonie@kernel.org> wrote on Wed, 19 May 2021 20:18:36
+0100:
> On Tue, May 18, 2021 at 06:27:51PM +0200, patrice.chotard@foss.st.com wrote:
> > From: Patrice Chotard <patrice.chotard@foss.st.com>
> >
> > This series adds support for the spi_mem_poll_status() spinand
> > interface.
> > Some QSPI controllers allows to poll automatically memory
> > status during operations (erase, read or write). This allows to
> > offload the CPU for this task.
> > STM32 QSPI is supporting this feature, driver update are also
> > part of this series.
>
> The SPI bits look good to me - should we merge via MTD or SPI?
I don't expect any conflicts with the current changes in MTD, I just
acked the SPI-NAND patch, you may take it through SPI.
Thanks,
Miquèl
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-05-26 8:32 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-18 16:27 [PATCH v5 0/3] MTD: spinand: Add spi_mem_poll_status() support patrice.chotard
2021-05-18 16:27 ` patrice.chotard
2021-05-18 16:27 ` patrice.chotard
2021-05-18 16:27 ` [PATCH v5 1/3] spi: spi-mem: add automatic poll status functions patrice.chotard
2021-05-18 16:27 ` patrice.chotard
2021-05-18 16:27 ` patrice.chotard
2021-05-18 16:27 ` [PATCH v5 2/3] mtd: spinand: use the spi-mem poll status APIs patrice.chotard
2021-05-18 16:27 ` patrice.chotard
2021-05-18 16:27 ` patrice.chotard
2021-05-26 8:31 ` Miquel Raynal
2021-05-26 8:31 ` Miquel Raynal
2021-05-26 8:31 ` Miquel Raynal
2021-05-18 16:27 ` [PATCH v5 3/3] spi: stm32-qspi: add automatic poll status feature patrice.chotard
2021-05-18 16:27 ` patrice.chotard
2021-05-18 16:27 ` patrice.chotard
2021-05-19 19:18 ` [PATCH v5 0/3] MTD: spinand: Add spi_mem_poll_status() support Mark Brown
2021-05-19 19:18 ` Mark Brown
2021-05-19 19:18 ` Mark Brown
2021-05-26 8:32 ` Miquel Raynal [this message]
2021-05-26 8:32 ` Miquel Raynal
2021-05-26 8:32 ` Miquel Raynal
2021-06-03 18:41 ` Mark Brown
2021-06-03 18:41 ` Mark Brown
2021-06-03 18:41 ` Mark Brown
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