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From: Steven Lee <steven_lee@aspeedtech.com>
To: Andrew Jeffery <andrew@aj.id.au>
Cc: Linus Walleij <linus.walleij@linaro.org>,
	Bartosz Golaszewski <bgolaszewski@baylibre.com>,
	Rob Herring <robh+dt@kernel.org>, Joel Stanley <joel@jms.id.au>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>,
	"moderated list:ARM/ASPEED MACHINE SUPPORT" 
	<linux-arm-kernel@lists.infradead.org>,
	"moderated list:ARM/ASPEED MACHINE SUPPORT" 
	<linux-aspeed@lists.ozlabs.org>,
	open list <linux-kernel@vger.kernel.org>,
	Hongwei Zhang <Hongweiz@ami.com>,
	Ryan Chen <ryan_chen@aspeedtech.com>,
	Billy Tsai <billy_tsai@aspeedtech.com>
Subject: Re: [PATCH v2 0/4] ASPEED sgpio driver enhancement.
Date: Thu, 27 May 2021 10:43:41 +0800	[thread overview]
Message-ID: <20210527024341.GB9971@aspeedtech.com> (raw)
In-Reply-To: <4d995f6e-b582-4f45-b87c-2cd795de8d14@www.fastmail.com>

The 05/27/2021 09:41, Andrew Jeffery wrote:
> Hi Steven,
> 
> On Thu, 27 May 2021, at 10:24, Steven Lee wrote:
> > AST2600 SoC has 2 SGPIO master interfaces one with 128 pins another one
> > with 80 pins, AST2500/AST2400 SoC has 1 SGPIO master interface that
> > supports up to 80 pins.
> > In the current driver design, the max number of sgpio pins is hardcoded
> > in macro MAX_NR_HW_SGPIO and the value is 80.
> > 
> > For supporting sgpio master interfaces of AST2600 SoC, the patch series
> > contains the following enhancement:
> > - Convert txt dt-bindings to yaml.
> > - Update aspeed dtsi to support the enhanced sgpio.
> > - Get the max number of sgpio that SoC supported from dts.
> > - Support muiltiple SGPIO master interfaces.
> > - Support up to 128 pins.
> > 
> > Changes from v1:
> > * Fix yaml format issues.
> > * Fix issues reported by kernel test robot.
> > 
> > Please help to review.
> 
> I think it's worth leaving a little more time between sending series.
> 
> I've just sent a bunch of reviews on v1.
> 

I am worried about the patch series may be drop by reviewers due to
the report of kernel test robot.

Regardless, thanks for the comment in v1 patch series.

Steven

> Cheers,
> 
> Andrew

WARNING: multiple messages have this Message-ID (diff)
From: Steven Lee <steven_lee@aspeedtech.com>
To: Andrew Jeffery <andrew@aj.id.au>
Cc: Linus Walleij <linus.walleij@linaro.org>,
	Bartosz Golaszewski <bgolaszewski@baylibre.com>,
	Rob Herring <robh+dt@kernel.org>, Joel Stanley <joel@jms.id.au>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	"moderated list:ARM/ASPEED MACHINE SUPPORT"
	<linux-arm-kernel@lists.infradead.org>,
	"moderated list:ARM/ASPEED MACHINE SUPPORT"
	<linux-aspeed@lists.ozlabs.org>,
	open list <linux-kernel@vger.kernel.org>,
	Hongwei Zhang <Hongweiz@ami.com>,
	Ryan Chen <ryan_chen@aspeedtech.com>,
	Billy Tsai <billy_tsai@aspeedtech.com>
Subject: Re: [PATCH v2 0/4] ASPEED sgpio driver enhancement.
Date: Thu, 27 May 2021 10:43:41 +0800	[thread overview]
Message-ID: <20210527024341.GB9971@aspeedtech.com> (raw)
In-Reply-To: <4d995f6e-b582-4f45-b87c-2cd795de8d14@www.fastmail.com>

The 05/27/2021 09:41, Andrew Jeffery wrote:
> Hi Steven,
> 
> On Thu, 27 May 2021, at 10:24, Steven Lee wrote:
> > AST2600 SoC has 2 SGPIO master interfaces one with 128 pins another one
> > with 80 pins, AST2500/AST2400 SoC has 1 SGPIO master interface that
> > supports up to 80 pins.
> > In the current driver design, the max number of sgpio pins is hardcoded
> > in macro MAX_NR_HW_SGPIO and the value is 80.
> > 
> > For supporting sgpio master interfaces of AST2600 SoC, the patch series
> > contains the following enhancement:
> > - Convert txt dt-bindings to yaml.
> > - Update aspeed dtsi to support the enhanced sgpio.
> > - Get the max number of sgpio that SoC supported from dts.
> > - Support muiltiple SGPIO master interfaces.
> > - Support up to 128 pins.
> > 
> > Changes from v1:
> > * Fix yaml format issues.
> > * Fix issues reported by kernel test robot.
> > 
> > Please help to review.
> 
> I think it's worth leaving a little more time between sending series.
> 
> I've just sent a bunch of reviews on v1.
> 

I am worried about the patch series may be drop by reviewers due to
the report of kernel test robot.

Regardless, thanks for the comment in v1 patch series.

Steven

> Cheers,
> 
> Andrew

_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-05-27  2:45 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-27  0:54 [PATCH v2 0/4] ASPEED sgpio driver enhancement Steven Lee
2021-05-27  0:54 ` Steven Lee
2021-05-27  0:54 ` [PATCH v2 1/4] dt-bindings: aspeed-sgpio: Convert txt bindings to yaml Steven Lee
2021-05-27  0:54   ` Steven Lee
2021-05-27 23:51   ` Linus Walleij
2021-05-27 23:51     ` Linus Walleij
2021-05-28  4:09     ` Steven Lee
2021-05-28  4:09       ` Steven Lee
2021-05-28  8:35       ` Linus Walleij
2021-05-28  8:35         ` Linus Walleij
2021-05-31  5:23         ` Steven Lee
2021-05-31  5:23           ` Steven Lee
2021-06-01 10:16           ` Linus Walleij
2021-06-01 10:16             ` Linus Walleij
2021-06-02 20:10   ` Rob Herring
2021-06-02 20:10     ` Rob Herring
2021-05-27  0:54 ` [PATCH v2 2/4] ARM: dts: aspeed-g6: Add SGPIO node Steven Lee
2021-05-27  0:54   ` Steven Lee
2021-05-27  0:54 ` [PATCH v2 3/4] ARM: dts: aspeed-g5: Modify sgpio node for the enhanced sgpio driver Steven Lee
2021-05-27  0:54   ` Steven Lee
2021-05-27  0:54 ` [PATCH v2 4/4] gpio: gpio-aspeed-sgpio: Add AST2600 sgpio support Steven Lee
2021-05-27  0:54   ` Steven Lee
2021-05-27  1:41 ` [PATCH v2 0/4] ASPEED sgpio driver enhancement Andrew Jeffery
2021-05-27  1:41   ` Andrew Jeffery
2021-05-27  2:43   ` Steven Lee [this message]
2021-05-27  2:43     ` Steven Lee

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