From: Liu Shixin <liushixin2@huawei.com> To: Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu> Cc: <linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>, "Liu Shixin" <liushixin2@huawei.com> Subject: [PATCH RFC] riscv: Enable pud vmap support for Sv48 Date: Sat, 5 Jun 2021 13:48:38 +0800 [thread overview] Message-ID: <20210605054838.2017817-2-liushixin2@huawei.com> (raw) In-Reply-To: <20210605054838.2017817-1-liushixin2@huawei.com> Enable pud vmap support and define the required page table functions for Sv48. Signed-off-by: Liu Shixin <liushixin2@huawei.com> --- As riscv doesn't have Sv48 support currently, I test pud vmap based on Alex's patch "riscv: Implement sv48 support". arch/riscv/include/asm/pgtable-64.h | 10 ++++++++ arch/riscv/include/asm/vmalloc.h | 8 +++++- arch/riscv/mm/pgtable.c | 39 +++++++++++++++++++++++++++++ 3 files changed, 56 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/pgtable-64.h b/arch/riscv/include/asm/pgtable-64.h index e3b7c5dd6a80..8920321770c7 100644 --- a/arch/riscv/include/asm/pgtable-64.h +++ b/arch/riscv/include/asm/pgtable-64.h @@ -69,6 +69,16 @@ static inline struct page *pud_page(pud_t pud) return pfn_to_page(pud_val(pud) >> _PAGE_PFN_SHIFT); } +static inline pud_t pfn_pud(unsigned long pfn, pgprot_t prot) +{ + return __pud((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot)); +} + +static inline unsigned long _pud_pfn(pud_t pud) +{ + return pud_val(pud) >> _PAGE_PFN_SHIFT; +} + static inline pmd_t pfn_pmd(unsigned long pfn, pgprot_t prot) { return __pmd((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot)); diff --git a/arch/riscv/include/asm/vmalloc.h b/arch/riscv/include/asm/vmalloc.h index 8f17f421f80c..83464895f902 100644 --- a/arch/riscv/include/asm/vmalloc.h +++ b/arch/riscv/include/asm/vmalloc.h @@ -3,7 +3,13 @@ #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP -#define IOREMAP_MAX_ORDER (PMD_SHIFT) +#define IOREMAP_MAX_ORDER (PUD_SHIFT) + +#define arch_vmap_pud_supported arch_vmap_pud_supported +static inline bool __init arch_vmap_pud_supported(pgprot_t prot) +{ + return true; +} #define arch_vmap_pmd_supported arch_vmap_pmd_supported static inline bool __init arch_vmap_pmd_supported(pgprot_t prot) diff --git a/arch/riscv/mm/pgtable.c b/arch/riscv/mm/pgtable.c index 738dc6f3530f..ed13b80424e6 100644 --- a/arch/riscv/mm/pgtable.c +++ b/arch/riscv/mm/pgtable.c @@ -7,6 +7,45 @@ #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP +#ifndef __PAGETABLE_PUD_FOLDED +int pud_set_huge(pud_t *pud, phys_addr_t phys, pgprot_t prot) +{ + pud_t new_pud = pfn_pud(__phys_to_pfn(phys), prot); + + set_pud(pud, new_pud); + return 1; +} + +int pud_clear_huge(pud_t *pud) +{ + if (!pud_leaf(READ_ONCE(*pud))) + return 0; + pud_clear(pud); + return 1; +} +#endif + +int pud_free_pmd_page(pud_t *pud, unsigned long addr) +{ + pmd_t *pmd; + pte_t *pte; + int i; + + pmd = (pmd_t *)pud_page_vaddr(*pud); + pud_clear(pud); + + flush_tlb_kernel_range(addr, addr + PUD_SIZE); + + for (i = 0; i < PTRS_PER_PMD; i++) { + if (!pmd_none(pmd[i])) { + pte = (pte_t *)pmd_page_vaddr(pmd[i]); + pte_free_kernel(NULL, pte); + } + } + pmd_free(NULL, pmd); + return 1; +} + #ifndef __PAGETABLE_PMD_FOLDED int pmd_set_huge(pmd_t *pmd, phys_addr_t phys, pgprot_t prot) { -- 2.18.0.huawei.25
WARNING: multiple messages have this Message-ID (diff)
From: Liu Shixin <liushixin2@huawei.com> To: Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu> Cc: <linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>, "Liu Shixin" <liushixin2@huawei.com> Subject: [PATCH RFC] riscv: Enable pud vmap support for Sv48 Date: Sat, 5 Jun 2021 13:48:38 +0800 [thread overview] Message-ID: <20210605054838.2017817-2-liushixin2@huawei.com> (raw) In-Reply-To: <20210605054838.2017817-1-liushixin2@huawei.com> Enable pud vmap support and define the required page table functions for Sv48. Signed-off-by: Liu Shixin <liushixin2@huawei.com> --- As riscv doesn't have Sv48 support currently, I test pud vmap based on Alex's patch "riscv: Implement sv48 support". arch/riscv/include/asm/pgtable-64.h | 10 ++++++++ arch/riscv/include/asm/vmalloc.h | 8 +++++- arch/riscv/mm/pgtable.c | 39 +++++++++++++++++++++++++++++ 3 files changed, 56 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/pgtable-64.h b/arch/riscv/include/asm/pgtable-64.h index e3b7c5dd6a80..8920321770c7 100644 --- a/arch/riscv/include/asm/pgtable-64.h +++ b/arch/riscv/include/asm/pgtable-64.h @@ -69,6 +69,16 @@ static inline struct page *pud_page(pud_t pud) return pfn_to_page(pud_val(pud) >> _PAGE_PFN_SHIFT); } +static inline pud_t pfn_pud(unsigned long pfn, pgprot_t prot) +{ + return __pud((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot)); +} + +static inline unsigned long _pud_pfn(pud_t pud) +{ + return pud_val(pud) >> _PAGE_PFN_SHIFT; +} + static inline pmd_t pfn_pmd(unsigned long pfn, pgprot_t prot) { return __pmd((pfn << _PAGE_PFN_SHIFT) | pgprot_val(prot)); diff --git a/arch/riscv/include/asm/vmalloc.h b/arch/riscv/include/asm/vmalloc.h index 8f17f421f80c..83464895f902 100644 --- a/arch/riscv/include/asm/vmalloc.h +++ b/arch/riscv/include/asm/vmalloc.h @@ -3,7 +3,13 @@ #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP -#define IOREMAP_MAX_ORDER (PMD_SHIFT) +#define IOREMAP_MAX_ORDER (PUD_SHIFT) + +#define arch_vmap_pud_supported arch_vmap_pud_supported +static inline bool __init arch_vmap_pud_supported(pgprot_t prot) +{ + return true; +} #define arch_vmap_pmd_supported arch_vmap_pmd_supported static inline bool __init arch_vmap_pmd_supported(pgprot_t prot) diff --git a/arch/riscv/mm/pgtable.c b/arch/riscv/mm/pgtable.c index 738dc6f3530f..ed13b80424e6 100644 --- a/arch/riscv/mm/pgtable.c +++ b/arch/riscv/mm/pgtable.c @@ -7,6 +7,45 @@ #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP +#ifndef __PAGETABLE_PUD_FOLDED +int pud_set_huge(pud_t *pud, phys_addr_t phys, pgprot_t prot) +{ + pud_t new_pud = pfn_pud(__phys_to_pfn(phys), prot); + + set_pud(pud, new_pud); + return 1; +} + +int pud_clear_huge(pud_t *pud) +{ + if (!pud_leaf(READ_ONCE(*pud))) + return 0; + pud_clear(pud); + return 1; +} +#endif + +int pud_free_pmd_page(pud_t *pud, unsigned long addr) +{ + pmd_t *pmd; + pte_t *pte; + int i; + + pmd = (pmd_t *)pud_page_vaddr(*pud); + pud_clear(pud); + + flush_tlb_kernel_range(addr, addr + PUD_SIZE); + + for (i = 0; i < PTRS_PER_PMD; i++) { + if (!pmd_none(pmd[i])) { + pte = (pte_t *)pmd_page_vaddr(pmd[i]); + pte_free_kernel(NULL, pte); + } + } + pmd_free(NULL, pmd); + return 1; +} + #ifndef __PAGETABLE_PMD_FOLDED int pmd_set_huge(pmd_t *pmd, phys_addr_t phys, pgprot_t prot) { -- 2.18.0.huawei.25 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2021-06-05 5:16 UTC|newest] Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-06-05 5:48 [PATCH -next] riscv: Enable HAVE_ARCH_HUGE_VMAP for 64BIT Liu Shixin 2021-06-05 5:48 ` Liu Shixin 2021-06-05 5:48 ` Liu Shixin [this message] 2021-06-05 5:48 ` [PATCH RFC] riscv: Enable pud vmap support for Sv48 Liu Shixin 2021-06-12 16:58 ` [PATCH -next] riscv: Enable HAVE_ARCH_HUGE_VMAP for 64BIT Palmer Dabbelt 2021-06-12 16:58 ` Palmer Dabbelt
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