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From: "Marek Behún" <kabel@kernel.org>
To: Linus Walleij <linus.walleij@linaro.org>, linux-gpio@vger.kernel.org
Cc: Andrew Lunn <andrew@lunn.ch>,
	Gregory Clement <gregory.clement@bootlin.com>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Rob Herring <robh+dt@kernel.org>,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	pali@kernel.org
Subject: Re: [PATCH] pinctrl: armada-37xx: Correct PWM pins definitions
Date: Thu, 17 Jun 2021 11:55:27 +0200	[thread overview]
Message-ID: <20210617115527.0659a5ea@dellmb> (raw)
In-Reply-To: <20210614222527.11237-1-kabel@kernel.org>

On Tue, 15 Jun 2021 00:25:27 +0200
Marek Behún <kabel@kernel.org> wrote:

> The PWM pins on North Bridge on Armada 37xx can be configured into PWM
> or GPIO functions. When in PWM function, each pin can also be
> configured to drive low on 0 and tri-state on 1 (LED mode).
> 
> The current definitions handle this by declaring two pin groups for
> each pin:
> - group "pwmN" with functions "pwm" and "gpio"
> - group "ledN_od" ("od" for open drain) with functions "led" and
> "gpio"
> 
> This is semantically incorrect. The correct definition for each pin
> should be one group with three functions: "pwm", "led" and "gpio".
> 
> Change the "pwmN" groups to support "led" function.
> 
> Remove "ledN_od" groups. This cannot break backwards compatibility
> with older device trees: no device tree uses it since there is no PWM
> driver for this SOC yet. Also "ledN_od" groups are not even
> documented.
> 
> Signed-off-by: Marek Behún <kabel@kernel.org>

Should this also have a Fixes tag? (If it is accepted...?)

WARNING: multiple messages have this Message-ID (diff)
From: "Marek Behún" <kabel@kernel.org>
To: Linus Walleij <linus.walleij@linaro.org>, linux-gpio@vger.kernel.org
Cc: Andrew Lunn <andrew@lunn.ch>,
	Gregory Clement <gregory.clement@bootlin.com>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Rob Herring <robh+dt@kernel.org>,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	pali@kernel.org
Subject: Re: [PATCH] pinctrl: armada-37xx: Correct PWM pins definitions
Date: Thu, 17 Jun 2021 11:55:27 +0200	[thread overview]
Message-ID: <20210617115527.0659a5ea@dellmb> (raw)
In-Reply-To: <20210614222527.11237-1-kabel@kernel.org>

On Tue, 15 Jun 2021 00:25:27 +0200
Marek Behún <kabel@kernel.org> wrote:

> The PWM pins on North Bridge on Armada 37xx can be configured into PWM
> or GPIO functions. When in PWM function, each pin can also be
> configured to drive low on 0 and tri-state on 1 (LED mode).
> 
> The current definitions handle this by declaring two pin groups for
> each pin:
> - group "pwmN" with functions "pwm" and "gpio"
> - group "ledN_od" ("od" for open drain) with functions "led" and
> "gpio"
> 
> This is semantically incorrect. The correct definition for each pin
> should be one group with three functions: "pwm", "led" and "gpio".
> 
> Change the "pwmN" groups to support "led" function.
> 
> Remove "ledN_od" groups. This cannot break backwards compatibility
> with older device trees: no device tree uses it since there is no PWM
> driver for this SOC yet. Also "ledN_od" groups are not even
> documented.
> 
> Signed-off-by: Marek Behún <kabel@kernel.org>

Should this also have a Fixes tag? (If it is accepted...?)

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  reply	other threads:[~2021-06-17  9:55 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-14 22:25 [PATCH] pinctrl: armada-37xx: Correct PWM pins definitions Marek Behún
2021-06-14 22:25 ` Marek Behún
2021-06-17  9:55 ` Marek Behún [this message]
2021-06-17  9:55   ` Marek Behún
2021-06-24 20:43 ` Rob Herring
2021-06-24 20:43   ` Rob Herring

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