From: Rob Herring <robh@kernel.org>
To: Suman Anna <s-anna@ti.com>
Cc: Jan Kiszka <jan.kiszka@siemens.com>,
Lokesh Vutla <lokeshvutla@ti.com>,
Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>,
devicetree@vger.kernel.org, Marc Zyngier <maz@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
linux-arm-kernel@lists.infradead.org,
Kishon Vijay Abraham I <kishon@ti.com>,
Vignesh Raghavendra <vigneshr@ti.com>
Subject: Re: [PATCH] dt-bindings: irqchip: Update pruss-intc binding for K3 AM64x SoCs
Date: Wed, 14 Jul 2021 13:16:56 -0600 [thread overview]
Message-ID: <20210714191656.GA2997956@robh.at.kernel.org> (raw)
In-Reply-To: <20210623170630.1430-1-s-anna@ti.com>
On Wed, 23 Jun 2021 12:06:30 -0500, Suman Anna wrote:
> The K3 AM64x SoCs also have a ICSSG IP that is similar to existing K3
> AM65x and J721E SoCs. The ICSSG interrupt controller is identical to
> that of the INTC on J721E SoCs, and supports 20 host interrupts and
> 160 input events from various SoC interrupt sources. All the 8 output
> host interrupts are routed to multiple entities though. Update the
> PRUSS interrupt controller binding with this information, though the
> same K3 compatible shall be used for the ICSSG INTC on AM64x SoCs.
>
> Signed-off-by: Suman Anna <s-anna@ti.com>
> ---
> .../bindings/interrupt-controller/ti,pruss-intc.yaml | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
Applied, thanks!
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Suman Anna <s-anna@ti.com>
Cc: Jan Kiszka <jan.kiszka@siemens.com>,
Lokesh Vutla <lokeshvutla@ti.com>,
Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>,
devicetree@vger.kernel.org, Marc Zyngier <maz@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
linux-arm-kernel@lists.infradead.org,
Kishon Vijay Abraham I <kishon@ti.com>,
Vignesh Raghavendra <vigneshr@ti.com>
Subject: Re: [PATCH] dt-bindings: irqchip: Update pruss-intc binding for K3 AM64x SoCs
Date: Wed, 14 Jul 2021 13:16:56 -0600 [thread overview]
Message-ID: <20210714191656.GA2997956@robh.at.kernel.org> (raw)
In-Reply-To: <20210623170630.1430-1-s-anna@ti.com>
On Wed, 23 Jun 2021 12:06:30 -0500, Suman Anna wrote:
> The K3 AM64x SoCs also have a ICSSG IP that is similar to existing K3
> AM65x and J721E SoCs. The ICSSG interrupt controller is identical to
> that of the INTC on J721E SoCs, and supports 20 host interrupts and
> 160 input events from various SoC interrupt sources. All the 8 output
> host interrupts are routed to multiple entities though. Update the
> PRUSS interrupt controller binding with this information, though the
> same K3 compatible shall be used for the ICSSG INTC on AM64x SoCs.
>
> Signed-off-by: Suman Anna <s-anna@ti.com>
> ---
> .../bindings/interrupt-controller/ti,pruss-intc.yaml | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
Applied, thanks!
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next prev parent reply other threads:[~2021-07-14 19:16 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-23 17:06 [PATCH] dt-bindings: irqchip: Update pruss-intc binding for K3 AM64x SoCs Suman Anna
2021-06-23 17:06 ` Suman Anna
2021-07-14 19:16 ` Rob Herring [this message]
2021-07-14 19:16 ` Rob Herring
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