From: Tudor Ambarus <tudor.ambarus@microchip.com> To: <michael@walle.cc>, <vigneshr@ti.com>, <p.yadav@ti.com> Cc: <figgyc@figgyc.uk>, <mail@david-bauer.net>, <linux@rasmusvillemoes.dk>, <esben@geanix.com>, <knaerzche@gmail.com>, <code@reto-schneider.ch>, <zhengxunli@mxic.com.tw>, <jaimeliao@mxic.com.tw>, <heiko.thiery@gmail.com>, <macromorgan@hotmail.com>, <sr@denx.de>, <miquel.raynal@bootlin.com>, <richard@nod.at>, <linux-mtd@lists.infradead.org>, <linux-arm-kernel@lists.infradead.org>, <nicolas.ferre@microchip.com>, "Tudor Ambarus" <tudor.ambarus@microchip.com> Subject: [PATCH v2 17/35] mtd: spi-nor: Introduce spi_nor_nonsfdp_flags_init() Date: Tue, 27 Jul 2021 07:52:04 +0300 [thread overview] Message-ID: <20210727045222.905056-18-tudor.ambarus@microchip.com> (raw) In-Reply-To: <20210727045222.905056-1-tudor.ambarus@microchip.com> Used to initialize the NOR flags for settings that are not defined in the JESD216 SFDP standard, thus can not be retrieved when parsing SFDP. No functional change. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> --- drivers/mtd/spi-nor/core.c | 88 ++++++++++++++++++++++---------------- 1 file changed, 52 insertions(+), 36 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 1f38fa8ab2fa..6a8617346764 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2687,6 +2687,56 @@ static void spi_nor_late_init_params(struct spi_nor *nor) spi_nor_init_default_locking_ops(nor); } +/** + * spi_nor_nonsfdp_flags_init() - Initialize NOR flags for settings that are not + * defined in the JESD216 SFDP standard, thus can not be retrieved when parsing + * SFDP. + * @nor: pointer to a 'struct spi_nor' + */ +static void spi_nor_nonsfdp_flags_init(struct spi_nor *nor) +{ + const struct flash_info *info = nor->info; + struct device_node *np = spi_nor_get_flash_node(nor); + + if (of_property_read_bool(np, "broken-flash-reset")) + nor->flags |= SNOR_F_BROKEN_RESET; + + if (info->flags & SPI_NOR_SWP_IS_VOLATILE) + nor->flags |= SNOR_F_SWP_IS_VOLATILE; + + if (info->flags & SPI_NOR_HAS_LOCK) + nor->flags |= SNOR_F_HAS_LOCK; + + if (info->flags & SPI_NOR_HAS_TB) { + nor->flags |= SNOR_F_HAS_SR_TB; + if (info->flags & SPI_NOR_TB_SR_BIT6) + nor->flags |= SNOR_F_HAS_SR_TB_BIT6; + } + + if (info->flags & SPI_NOR_4BIT_BP) { + nor->flags |= SNOR_F_HAS_4BIT_BP; + if (info->flags & SPI_NOR_BP3_SR_BIT6) + nor->flags |= SNOR_F_HAS_SR_BP3_BIT6; + } + + if (info->flags & NO_CHIP_ERASE) + nor->flags |= SNOR_F_NO_OP_CHIP_ERASE; + + if (info->flags & USE_FSR) + nor->flags |= SNOR_F_USE_FSR; + + if (info->flags & USE_CLSR) + nor->flags |= SNOR_F_USE_CLSR; + + /* + * Make sure the XSR_RDY flag is set before calling + * spi_nor_wait_till_ready(). Xilinx S3AN share MFR + * with Atmel SPI NOR. + */ + if (info->flags & SPI_NOR_XSR_RDY) + nor->flags |= SNOR_F_READY_XSR_RDY; +} + /** * spi_nor_init_params() - Initialize the flash's parameters and settings. * @nor: pointer to a 'struct spi_nor'. @@ -2736,6 +2786,8 @@ static int spi_nor_init_params(struct spi_nor *nor) spi_nor_late_init_params(nor); + spi_nor_nonsfdp_flags_init(nor); + return 0; } @@ -3078,7 +3130,6 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, const struct flash_info *info; struct device *dev = nor->dev; struct mtd_info *mtd = &nor->mtd; - struct device_node *np = spi_nor_get_flash_node(nor); int ret; int i; @@ -3115,17 +3166,6 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, mutex_init(&nor->lock); - /* - * Make sure the XSR_RDY flag is set before calling - * spi_nor_wait_till_ready(). Xilinx S3AN share MFR - * with Atmel SPI NOR. - */ - if (info->flags & SPI_NOR_XSR_RDY) - nor->flags |= SNOR_F_READY_XSR_RDY; - - if (info->flags & SPI_NOR_HAS_LOCK) - nor->flags |= SNOR_F_HAS_LOCK; - mtd->_write = spi_nor_write; /* Init flash parameters based on flash_info struct and SFDP */ @@ -3147,27 +3187,6 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, mtd->_get_device = spi_nor_get_device; mtd->_put_device = spi_nor_put_device; - if (info->flags & USE_FSR) - nor->flags |= SNOR_F_USE_FSR; - if (info->flags & SPI_NOR_HAS_TB) { - nor->flags |= SNOR_F_HAS_SR_TB; - if (info->flags & SPI_NOR_TB_SR_BIT6) - nor->flags |= SNOR_F_HAS_SR_TB_BIT6; - } - - if (info->flags & NO_CHIP_ERASE) - nor->flags |= SNOR_F_NO_OP_CHIP_ERASE; - if (info->flags & USE_CLSR) - nor->flags |= SNOR_F_USE_CLSR; - if (info->flags & SPI_NOR_SWP_IS_VOLATILE) - nor->flags |= SNOR_F_SWP_IS_VOLATILE; - - if (info->flags & SPI_NOR_4BIT_BP) { - nor->flags |= SNOR_F_HAS_4BIT_BP; - if (info->flags & SPI_NOR_BP3_SR_BIT6) - nor->flags |= SNOR_F_HAS_SR_BP3_BIT6; - } - if (info->flags & SPI_NOR_NO_ERASE) mtd->flags |= MTD_NO_ERASE; @@ -3175,9 +3194,6 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, nor->page_size = nor->params->page_size; mtd->writebufsize = nor->page_size; - if (of_property_read_bool(np, "broken-flash-reset")) - nor->flags |= SNOR_F_BROKEN_RESET; - /* * Configure the SPI memory: * - select op codes for (Fast) Read, Page Program and Sector Erase. -- 2.25.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
WARNING: multiple messages have this Message-ID (diff)
From: Tudor Ambarus <tudor.ambarus@microchip.com> To: <michael@walle.cc>, <vigneshr@ti.com>, <p.yadav@ti.com> Cc: macromorgan@hotmail.com, jaimeliao@mxic.com.tw, Tudor Ambarus <tudor.ambarus@microchip.com>, richard@nod.at, esben@geanix.com, linux@rasmusvillemoes.dk, knaerzche@gmail.com, linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org, code@reto-schneider.ch, miquel.raynal@bootlin.com, heiko.thiery@gmail.com, sr@denx.de, figgyc@figgyc.uk, mail@david-bauer.net, zhengxunli@mxic.com.tw Subject: [PATCH v2 17/35] mtd: spi-nor: Introduce spi_nor_nonsfdp_flags_init() Date: Tue, 27 Jul 2021 07:52:04 +0300 [thread overview] Message-ID: <20210727045222.905056-18-tudor.ambarus@microchip.com> (raw) In-Reply-To: <20210727045222.905056-1-tudor.ambarus@microchip.com> Used to initialize the NOR flags for settings that are not defined in the JESD216 SFDP standard, thus can not be retrieved when parsing SFDP. No functional change. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> --- drivers/mtd/spi-nor/core.c | 88 ++++++++++++++++++++++---------------- 1 file changed, 52 insertions(+), 36 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index 1f38fa8ab2fa..6a8617346764 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2687,6 +2687,56 @@ static void spi_nor_late_init_params(struct spi_nor *nor) spi_nor_init_default_locking_ops(nor); } +/** + * spi_nor_nonsfdp_flags_init() - Initialize NOR flags for settings that are not + * defined in the JESD216 SFDP standard, thus can not be retrieved when parsing + * SFDP. + * @nor: pointer to a 'struct spi_nor' + */ +static void spi_nor_nonsfdp_flags_init(struct spi_nor *nor) +{ + const struct flash_info *info = nor->info; + struct device_node *np = spi_nor_get_flash_node(nor); + + if (of_property_read_bool(np, "broken-flash-reset")) + nor->flags |= SNOR_F_BROKEN_RESET; + + if (info->flags & SPI_NOR_SWP_IS_VOLATILE) + nor->flags |= SNOR_F_SWP_IS_VOLATILE; + + if (info->flags & SPI_NOR_HAS_LOCK) + nor->flags |= SNOR_F_HAS_LOCK; + + if (info->flags & SPI_NOR_HAS_TB) { + nor->flags |= SNOR_F_HAS_SR_TB; + if (info->flags & SPI_NOR_TB_SR_BIT6) + nor->flags |= SNOR_F_HAS_SR_TB_BIT6; + } + + if (info->flags & SPI_NOR_4BIT_BP) { + nor->flags |= SNOR_F_HAS_4BIT_BP; + if (info->flags & SPI_NOR_BP3_SR_BIT6) + nor->flags |= SNOR_F_HAS_SR_BP3_BIT6; + } + + if (info->flags & NO_CHIP_ERASE) + nor->flags |= SNOR_F_NO_OP_CHIP_ERASE; + + if (info->flags & USE_FSR) + nor->flags |= SNOR_F_USE_FSR; + + if (info->flags & USE_CLSR) + nor->flags |= SNOR_F_USE_CLSR; + + /* + * Make sure the XSR_RDY flag is set before calling + * spi_nor_wait_till_ready(). Xilinx S3AN share MFR + * with Atmel SPI NOR. + */ + if (info->flags & SPI_NOR_XSR_RDY) + nor->flags |= SNOR_F_READY_XSR_RDY; +} + /** * spi_nor_init_params() - Initialize the flash's parameters and settings. * @nor: pointer to a 'struct spi_nor'. @@ -2736,6 +2786,8 @@ static int spi_nor_init_params(struct spi_nor *nor) spi_nor_late_init_params(nor); + spi_nor_nonsfdp_flags_init(nor); + return 0; } @@ -3078,7 +3130,6 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, const struct flash_info *info; struct device *dev = nor->dev; struct mtd_info *mtd = &nor->mtd; - struct device_node *np = spi_nor_get_flash_node(nor); int ret; int i; @@ -3115,17 +3166,6 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, mutex_init(&nor->lock); - /* - * Make sure the XSR_RDY flag is set before calling - * spi_nor_wait_till_ready(). Xilinx S3AN share MFR - * with Atmel SPI NOR. - */ - if (info->flags & SPI_NOR_XSR_RDY) - nor->flags |= SNOR_F_READY_XSR_RDY; - - if (info->flags & SPI_NOR_HAS_LOCK) - nor->flags |= SNOR_F_HAS_LOCK; - mtd->_write = spi_nor_write; /* Init flash parameters based on flash_info struct and SFDP */ @@ -3147,27 +3187,6 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, mtd->_get_device = spi_nor_get_device; mtd->_put_device = spi_nor_put_device; - if (info->flags & USE_FSR) - nor->flags |= SNOR_F_USE_FSR; - if (info->flags & SPI_NOR_HAS_TB) { - nor->flags |= SNOR_F_HAS_SR_TB; - if (info->flags & SPI_NOR_TB_SR_BIT6) - nor->flags |= SNOR_F_HAS_SR_TB_BIT6; - } - - if (info->flags & NO_CHIP_ERASE) - nor->flags |= SNOR_F_NO_OP_CHIP_ERASE; - if (info->flags & USE_CLSR) - nor->flags |= SNOR_F_USE_CLSR; - if (info->flags & SPI_NOR_SWP_IS_VOLATILE) - nor->flags |= SNOR_F_SWP_IS_VOLATILE; - - if (info->flags & SPI_NOR_4BIT_BP) { - nor->flags |= SNOR_F_HAS_4BIT_BP; - if (info->flags & SPI_NOR_BP3_SR_BIT6) - nor->flags |= SNOR_F_HAS_SR_BP3_BIT6; - } - if (info->flags & SPI_NOR_NO_ERASE) mtd->flags |= MTD_NO_ERASE; @@ -3175,9 +3194,6 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, nor->page_size = nor->params->page_size; mtd->writebufsize = nor->page_size; - if (of_property_read_bool(np, "broken-flash-reset")) - nor->flags |= SNOR_F_BROKEN_RESET; - /* * Configure the SPI memory: * - select op codes for (Fast) Read, Page Program and Sector Erase. -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-07-27 5:46 UTC|newest] Thread overview: 266+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-07-27 4:51 [PATCH v2 00/35] mtd: spi-nor: Handle ID collisions and clean params init Tudor Ambarus 2021-07-27 4:51 ` Tudor Ambarus 2021-07-27 4:51 ` [PATCH v2 01/35] mtd: spi-nor: core: Introduce SPI_NOR_PARSE_SFDP Tudor Ambarus 2021-07-27 4:51 ` Tudor Ambarus 2021-08-04 8:09 ` Pratyush Yadav 2021-08-04 8:09 ` Pratyush Yadav 2021-08-23 22:17 ` Michael Walle 2021-08-23 22:17 ` Michael Walle 2021-07-27 4:51 ` [PATCH v2 02/35] mtd: spi-nor: core: Report correct name in case of ID collisions Tudor Ambarus 2021-07-27 4:51 ` Tudor Ambarus 2021-08-04 8:23 ` Pratyush Yadav 2021-08-04 8:23 ` Pratyush Yadav 2021-08-23 22:32 ` Michael Walle 2021-08-23 22:32 ` Michael Walle 2021-07-27 4:51 ` [PATCH v2 03/35] mtd: spi-nor: macronix: Handle ID collision b/w MX25L3233F and MX25L3205D Tudor Ambarus 2021-07-27 4:51 ` Tudor Ambarus 2021-08-23 22:42 ` Michael Walle 2021-08-23 22:42 ` Michael Walle 2021-10-01 8:41 ` Tudor.Ambarus 2021-10-01 8:41 ` Tudor.Ambarus 2021-07-27 4:51 ` [PATCH v2 04/35] mtd: spi-nor: macronix: Handle ID collision b/w MX25L12805D and MX25L12835F Tudor Ambarus 2021-07-27 4:51 ` Tudor Ambarus 2021-08-23 22:44 ` Michael Walle 2021-08-23 22:44 ` Michael Walle 2021-07-27 4:51 ` [PATCH v2 05/35] mtd: spi-nor: Introduce Manufacturer ID collisions driver Tudor Ambarus 2021-07-27 4:51 ` Tudor Ambarus 2021-08-16 18:28 ` Pratyush Yadav 2021-08-16 18:28 ` Pratyush Yadav 2021-08-23 22:47 ` Michael Walle 2021-08-23 22:47 ` Michael Walle 2021-10-01 9:16 ` Tudor.Ambarus 2021-10-01 9:16 ` Tudor.Ambarus 2021-10-24 17:44 ` Michael Walle 2021-10-24 17:44 ` Michael Walle 2021-11-06 9:58 ` Tudor.Ambarus 2021-11-06 9:58 ` Tudor.Ambarus 2021-07-27 4:51 ` [PATCH v2 06/35] mtd: spi-nor: manuf-id-collisions: Add support for xt25f128b Tudor Ambarus 2021-07-27 4:51 ` Tudor Ambarus 2021-07-27 15:52 ` Chris Morgan 2021-07-27 15:52 ` Chris Morgan 2021-07-28 4:10 ` Tudor.Ambarus 2021-07-28 4:10 ` Tudor.Ambarus 2021-08-16 18:43 ` Pratyush Yadav 2021-08-16 18:43 ` Pratyush Yadav 2021-10-01 9:26 ` Tudor.Ambarus 2021-10-01 9:26 ` Tudor.Ambarus 2021-07-27 4:51 ` [PATCH v2 07/35] mtd: spi-nor: manuf-id-collisions: Add support for xm25qh64c Tudor Ambarus 2021-07-27 4:51 ` Tudor Ambarus 2021-08-16 18:45 ` Pratyush Yadav 2021-08-16 18:45 ` Pratyush Yadav 2021-07-27 4:51 ` [PATCH v2 08/35] mtd: spi-nor: core: Introduce the ate_init() hook Tudor Ambarus 2021-07-27 4:51 ` Tudor Ambarus 2021-08-16 18:54 ` Pratyush Yadav 2021-08-16 18:54 ` Pratyush Yadav 2021-09-09 21:40 ` Michael Walle 2021-09-09 21:40 ` Michael Walle 2021-10-01 9:44 ` Tudor.Ambarus 2021-10-01 9:44 ` Tudor.Ambarus 2021-10-01 9:38 ` Tudor.Ambarus 2021-10-01 9:38 ` Tudor.Ambarus 2021-07-27 4:51 ` [PATCH v2 09/35] mtd: spi-nor: atmel: Use flash late_init() for locking Tudor Ambarus 2021-07-27 4:51 ` Tudor Ambarus 2021-08-16 19:06 ` Pratyush Yadav 2021-08-16 19:06 ` Pratyush Yadav 2021-09-09 21:44 ` Michael Walle 2021-09-09 21:44 ` Michael Walle 2021-10-01 11:40 ` Tudor.Ambarus 2021-10-01 11:40 ` Tudor.Ambarus 2021-10-02 12:58 ` Michael Walle 2021-10-02 12:58 ` Michael Walle 2021-10-11 6:27 ` Pratyush Yadav 2021-10-11 6:27 ` Pratyush Yadav 2021-07-27 4:51 ` [PATCH v2 10/35] mtd: spi-nor: sst: " Tudor Ambarus 2021-07-27 4:51 ` Tudor Ambarus 2021-08-16 19:09 ` Pratyush Yadav 2021-08-16 19:09 ` Pratyush Yadav 2021-10-01 11:43 ` Tudor.Ambarus 2021-10-01 11:43 ` Tudor.Ambarus 2021-10-01 12:19 ` Pratyush Yadav 2021-10-01 12:19 ` Pratyush Yadav 2021-09-09 21:52 ` Michael Walle 2021-09-09 21:52 ` Michael Walle 2021-07-27 4:51 ` [PATCH v2 11/35] mtd: spi-nor: winbond: Use manufacturer late_init() for OTP ops Tudor Ambarus 2021-07-27 4:51 ` Tudor Ambarus 2021-08-16 19:17 ` Pratyush Yadav 2021-08-16 19:17 ` Pratyush Yadav 2021-09-09 21:50 ` Michael Walle 2021-09-09 21:50 ` Michael Walle 2021-10-01 11:58 ` Tudor.Ambarus 2021-10-01 11:58 ` Tudor.Ambarus 2021-10-01 11:54 ` Tudor.Ambarus 2021-10-01 11:54 ` Tudor.Ambarus 2021-10-11 6:54 ` Pratyush Yadav 2021-10-11 6:54 ` Pratyush Yadav 2021-07-27 4:51 ` [PATCH v2 12/35] mtd: spi-nor: xilinx: Use manufacturer late_init() to set setup method Tudor Ambarus 2021-07-27 4:51 ` Tudor Ambarus 2021-08-16 19:19 ` Pratyush Yadav 2021-08-16 19:19 ` Pratyush Yadav 2021-09-09 21:53 ` Michael Walle 2021-09-09 21:53 ` Michael Walle 2021-07-27 4:52 ` [PATCH v2 13/35] mtd: spi-nor: sst: Use manufacturer late_init() to set _write() Tudor Ambarus 2021-07-27 4:52 ` Tudor Ambarus 2021-08-16 19:20 ` Pratyush Yadav 2021-08-16 19:20 ` Pratyush Yadav 2021-09-09 21:54 ` Michael Walle 2021-09-09 21:54 ` Michael Walle 2021-07-27 4:52 ` [PATCH v2 14/35] mtd: spi-nor: spansion: Use manufacturer late_init() Tudor Ambarus 2021-07-27 4:52 ` Tudor Ambarus 2021-08-16 19:22 ` Pratyush Yadav 2021-08-16 19:22 ` Pratyush Yadav 2021-09-09 22:02 ` Michael Walle 2021-09-09 22:02 ` Michael Walle 2021-10-01 12:14 ` Tudor.Ambarus 2021-10-01 12:14 ` Tudor.Ambarus 2021-10-02 13:14 ` Michael Walle 2021-10-02 13:14 ` Michael Walle 2021-07-27 4:52 ` [PATCH v2 15/35] mtd: spi-nor: core: Call spi_nor_post_sfdp_fixups() only when SFDP is defined Tudor Ambarus 2021-07-27 4:52 ` Tudor Ambarus 2021-08-16 19:31 ` Pratyush Yadav 2021-08-16 19:31 ` Pratyush Yadav 2021-10-01 12:31 ` Tudor.Ambarus 2021-10-01 12:31 ` Tudor.Ambarus 2021-07-27 4:52 ` [PATCH v2 16/35] mtd: spi-nor: core: Mark default_init() as deprecated Tudor Ambarus 2021-07-27 4:52 ` Tudor Ambarus 2021-08-16 19:36 ` Pratyush Yadav 2021-08-16 19:36 ` Pratyush Yadav 2021-10-01 14:18 ` Tudor.Ambarus 2021-10-01 14:18 ` Tudor.Ambarus 2021-10-01 17:06 ` Pratyush Yadav 2021-10-01 17:06 ` Pratyush Yadav 2021-07-27 4:52 ` Tudor Ambarus [this message] 2021-07-27 4:52 ` [PATCH v2 17/35] mtd: spi-nor: Introduce spi_nor_nonsfdp_flags_init() Tudor Ambarus 2021-08-17 10:24 ` Pratyush Yadav 2021-08-17 10:24 ` Pratyush Yadav 2021-08-17 12:15 ` Tudor.Ambarus 2021-08-17 12:15 ` Tudor.Ambarus 2021-10-22 11:21 ` Michael Walle 2021-10-22 11:21 ` Michael Walle 2021-10-22 12:10 ` Pratyush Yadav 2021-10-22 12:10 ` Pratyush Yadav 2021-10-22 12:42 ` Tudor.Ambarus 2021-10-22 12:42 ` Tudor.Ambarus 2021-10-22 12:59 ` Michael Walle 2021-10-22 12:59 ` Michael Walle 2021-10-22 13:25 ` Tudor.Ambarus 2021-10-22 13:25 ` Tudor.Ambarus 2021-10-24 17:05 ` Michael Walle 2021-10-24 17:05 ` Michael Walle 2021-10-25 12:18 ` Tudor.Ambarus 2021-10-25 12:18 ` Tudor.Ambarus 2021-07-27 4:52 ` [PATCH v2 18/35] mtd: spi-nor: Get rid of SPI_NOR_4B_OPCODES flag Tudor Ambarus 2021-07-27 4:52 ` Tudor Ambarus 2021-08-17 12:16 ` Pratyush Yadav 2021-08-17 12:16 ` Pratyush Yadav 2021-10-04 3:18 ` Tudor.Ambarus 2021-10-04 3:18 ` Tudor.Ambarus 2021-10-19 17:26 ` Pratyush Yadav 2021-10-19 17:26 ` Pratyush Yadav 2021-10-20 9:55 ` Tudor.Ambarus 2021-10-20 9:55 ` Tudor.Ambarus 2021-10-21 8:44 ` Tudor.Ambarus 2021-10-21 8:44 ` Tudor.Ambarus 2021-10-21 9:30 ` Pratyush Yadav 2021-10-21 9:30 ` Pratyush Yadav 2021-10-22 11:37 ` Michael Walle 2021-10-22 11:37 ` Michael Walle 2021-10-22 12:43 ` Tudor.Ambarus 2021-10-22 12:43 ` Tudor.Ambarus 2021-07-27 4:52 ` [PATCH v2 19/35] mtd: spi-nor: Get rid of SPI_NOR_IO_MODE_EN_VOLATILE flag Tudor Ambarus 2021-07-27 4:52 ` Tudor Ambarus 2021-08-17 12:21 ` Pratyush Yadav 2021-08-17 12:21 ` Pratyush Yadav 2021-10-04 3:52 ` Tudor.Ambarus 2021-10-04 3:52 ` Tudor.Ambarus 2021-10-11 6:15 ` Pratyush Yadav 2021-10-11 6:15 ` Pratyush Yadav 2021-07-27 4:52 ` [PATCH v2 20/35] mtd: spi-nor: core: Use container_of to get the pointer to struct spi_nor Tudor Ambarus 2021-07-27 4:52 ` Tudor Ambarus 2021-07-27 7:08 ` Rasmus Villemoes 2021-07-27 7:08 ` Rasmus Villemoes 2021-10-22 8:00 ` Tudor.Ambarus 2021-10-22 8:00 ` Tudor.Ambarus 2021-08-17 12:23 ` Pratyush Yadav 2021-08-17 12:23 ` Pratyush Yadav 2021-07-27 4:52 ` [PATCH v2 21/35] mtd: spi-nor: Introduce spi_nor_set_mtd_info() Tudor Ambarus 2021-07-27 4:52 ` Tudor Ambarus 2021-08-16 7:25 ` Tudor.Ambarus 2021-08-16 7:25 ` Tudor.Ambarus 2021-08-17 16:23 ` Pratyush Yadav 2021-08-17 16:23 ` Pratyush Yadav 2021-10-22 11:53 ` Michael Walle 2021-10-22 11:53 ` Michael Walle 2021-07-27 4:52 ` [PATCH v2 22/35] mtd: spi-nor: core: Use common naming scheme for setting mtd_info fields Tudor Ambarus 2021-07-27 4:52 ` Tudor Ambarus 2021-08-17 16:26 ` Pratyush Yadav 2021-08-17 16:26 ` Pratyush Yadav 2021-10-22 11:57 ` Michael Walle 2021-10-22 11:57 ` Michael Walle 2021-10-22 12:51 ` Tudor.Ambarus 2021-10-22 12:51 ` Tudor.Ambarus 2021-10-22 13:08 ` Michael Walle 2021-10-22 13:08 ` Michael Walle 2021-10-22 13:34 ` Tudor.Ambarus 2021-10-22 13:34 ` Tudor.Ambarus 2021-07-27 4:52 ` [PATCH v2 23/35] mtd: spi-nor: Get rid of nor->page_size Tudor Ambarus 2021-07-27 4:52 ` Tudor Ambarus 2021-08-17 16:33 ` Pratyush Yadav 2021-08-17 16:33 ` Pratyush Yadav 2021-10-22 12:01 ` Michael Walle 2021-10-22 12:01 ` Michael Walle 2021-07-27 4:52 ` [PATCH v2 24/35] mtd: spi-nor: core: Fix spi_nor_flash_parameter otp description Tudor Ambarus 2021-07-27 4:52 ` Tudor Ambarus 2021-08-17 16:47 ` Pratyush Yadav 2021-08-17 16:47 ` Pratyush Yadav 2021-10-22 12:07 ` Michael Walle 2021-10-22 12:07 ` Michael Walle 2021-07-27 4:52 ` [PATCH v2 25/35] mtd: spi-nor: core: Move spi_nor_set_addr_width() in spi_nor_setup() Tudor Ambarus 2021-07-27 4:52 ` Tudor Ambarus 2021-08-17 16:52 ` Pratyush Yadav 2021-08-17 16:52 ` Pratyush Yadav 2021-10-22 12:12 ` Michael Walle 2021-10-22 12:12 ` Michael Walle 2021-10-22 12:36 ` Tudor.Ambarus 2021-10-22 12:36 ` Tudor.Ambarus 2021-07-27 4:52 ` [PATCH v2 26/35] mtd: spi-nor: core: Introduce spi_nor_init_default_params() Tudor Ambarus 2021-07-27 4:52 ` Tudor Ambarus 2021-08-24 17:30 ` Pratyush Yadav 2021-08-24 17:30 ` Pratyush Yadav 2021-10-04 4:17 ` Tudor.Ambarus 2021-10-04 4:17 ` Tudor.Ambarus 2021-10-22 12:41 ` Michael Walle 2021-10-22 12:41 ` Michael Walle 2021-10-22 12:55 ` Tudor.Ambarus 2021-10-22 12:55 ` Tudor.Ambarus 2021-07-27 4:52 ` [PATCH v2 27/35] mtd: spi-nor: core: Init flash params based on SFDP first for new flash additions Tudor Ambarus 2021-07-27 4:52 ` Tudor Ambarus 2021-08-24 17:51 ` Pratyush Yadav 2021-08-24 17:51 ` Pratyush Yadav 2021-10-04 5:01 ` Tudor.Ambarus 2021-10-04 5:01 ` Tudor.Ambarus 2021-10-04 11:36 ` Tudor.Ambarus 2021-10-04 11:36 ` Tudor.Ambarus 2021-07-27 4:52 ` [PATCH v2 28/35] mtd: spi-nor: sst: sst26vf064b: Use SPI_NOR_PARSE_SFDP Tudor Ambarus 2021-07-27 4:52 ` Tudor Ambarus 2021-07-27 4:52 ` [PATCH v2 29/35] mtd: spi-nor: winbond: w25q256jvm: " Tudor Ambarus 2021-07-27 4:52 ` Tudor Ambarus 2021-07-27 4:52 ` [PATCH v2 30/35] mtd: spi-nor: issi: is25lp256: " Tudor Ambarus 2021-07-27 4:52 ` Tudor Ambarus 2021-07-27 4:52 ` [PATCH v2 31/35] mtd: spi-nor: spansion: s25fl256s0: Skip SFDP parsing Tudor Ambarus 2021-07-27 4:52 ` Tudor Ambarus 2021-07-27 4:52 ` [PATCH v2 32/35] mtd: spi-nor: gigadevice: gd25q256: Use SPI_NOR_PARSE_SFDP Tudor Ambarus 2021-07-27 4:52 ` Tudor Ambarus 2021-07-27 4:52 ` [PATCH v2 33/35] mtd: spi-nor: micron-st: n25q256a: " Tudor Ambarus 2021-07-27 4:52 ` Tudor Ambarus 2021-07-27 4:52 ` [PATCH v2 34/35] mtd: spi-nor: macronix: mx25l25635e: " Tudor Ambarus 2021-07-27 4:52 ` Tudor Ambarus 2021-07-27 4:52 ` [PATCH v2 35/35] docs: mtd: spi-nor: Add details about how to propose a new flash addition Tudor Ambarus 2021-07-27 4:52 ` Tudor Ambarus 2021-07-27 7:22 ` Michael Walle 2021-07-27 7:22 ` Michael Walle 2021-07-27 8:09 ` Tudor.Ambarus 2021-07-27 8:09 ` Tudor.Ambarus 2021-07-27 8:49 ` Michael Walle 2021-07-27 8:49 ` Michael Walle 2021-08-24 17:58 ` Pratyush Yadav 2021-08-24 17:58 ` Pratyush Yadav
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