All of lore.kernel.org
 help / color / mirror / Atom feed
From: Matthew Brost <matthew.brost@intel.com>
To: "Belgaumkar, Vinay" <vinay.belgaumkar@intel.com>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 07/15] drm/i915/guc/slpc: Remove BUG_ON in guc_submission_disable
Date: Wed, 28 Jul 2021 01:06:13 +0000	[thread overview]
Message-ID: <20210728010613.GA50866@DUT151-ICLU.fm.intel.com> (raw)
In-Reply-To: <5c3a11b6-ca8c-cea0-7a94-e70e01ee9d2c@intel.com>

On Tue, Jul 27, 2021 at 06:01:18PM -0700, Belgaumkar, Vinay wrote:
> 
> 
> On 7/27/2021 5:20 PM, Matthew Brost wrote:
> > On Mon, Jul 26, 2021 at 12:07:52PM -0700, Vinay Belgaumkar wrote:
> > > The assumption when it was added was there would be no wakerefs
> > > held. However, if we fail to enable SLPC, we will still be
> > > holding a wakeref.
> > > 
> > 
> > So this is if intel_guc_slpc_enable() fails, right? Not seeing where the
> > wakeref is taken. It also seems wrong not to drop the wakeref before
> > calling intel_guc_submission_disable, hence the GEM_BUG_ON in this
> > function.
> > 
> > Can you explain this bit more?
> 
> I should change the desc a little. The BUG_ON assumed GT would not be awake
> i.e at shutdown, and there would be 0 GT_PM references. However, this
> slpc_enable is in gt_resume path (gt_init_hw calls uc_init_hw). Here,
> gt_pm_get reference is held, so it will result in BUG_ON when
> submission_disable is called.
> 

Ok, I see the code path. With a better commit message:
Reviewed-by: Matthew Brost <matthew.brost@intel.com>

> Thanks,
> Vinay.
> > 
> > Matt
> > 
> > > Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> > > ---
> > >   drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 4 ----
> > >   1 file changed, 4 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > > index b6338742a594..48cbd800ca54 100644
> > > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > > @@ -2523,10 +2523,6 @@ void intel_guc_submission_enable(struct intel_guc *guc)
> > >   void intel_guc_submission_disable(struct intel_guc *guc)
> > >   {
> > > -	struct intel_gt *gt = guc_to_gt(guc);
> > > -
> > > -	GEM_BUG_ON(gt->awake); /* GT should be parked first */
> > > -
> > >   	/* Note: By the time we're here, GuC may have already been reset */
> > >   }
> > > -- 
> > > 2.25.0
> > > 

WARNING: multiple messages have this Message-ID (diff)
From: Matthew Brost <matthew.brost@intel.com>
To: "Belgaumkar, Vinay" <vinay.belgaumkar@intel.com>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 07/15] drm/i915/guc/slpc: Remove BUG_ON in guc_submission_disable
Date: Wed, 28 Jul 2021 01:06:13 +0000	[thread overview]
Message-ID: <20210728010613.GA50866@DUT151-ICLU.fm.intel.com> (raw)
In-Reply-To: <5c3a11b6-ca8c-cea0-7a94-e70e01ee9d2c@intel.com>

On Tue, Jul 27, 2021 at 06:01:18PM -0700, Belgaumkar, Vinay wrote:
> 
> 
> On 7/27/2021 5:20 PM, Matthew Brost wrote:
> > On Mon, Jul 26, 2021 at 12:07:52PM -0700, Vinay Belgaumkar wrote:
> > > The assumption when it was added was there would be no wakerefs
> > > held. However, if we fail to enable SLPC, we will still be
> > > holding a wakeref.
> > > 
> > 
> > So this is if intel_guc_slpc_enable() fails, right? Not seeing where the
> > wakeref is taken. It also seems wrong not to drop the wakeref before
> > calling intel_guc_submission_disable, hence the GEM_BUG_ON in this
> > function.
> > 
> > Can you explain this bit more?
> 
> I should change the desc a little. The BUG_ON assumed GT would not be awake
> i.e at shutdown, and there would be 0 GT_PM references. However, this
> slpc_enable is in gt_resume path (gt_init_hw calls uc_init_hw). Here,
> gt_pm_get reference is held, so it will result in BUG_ON when
> submission_disable is called.
> 

Ok, I see the code path. With a better commit message:
Reviewed-by: Matthew Brost <matthew.brost@intel.com>

> Thanks,
> Vinay.
> > 
> > Matt
> > 
> > > Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> > > ---
> > >   drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 4 ----
> > >   1 file changed, 4 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > > index b6338742a594..48cbd800ca54 100644
> > > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > > @@ -2523,10 +2523,6 @@ void intel_guc_submission_enable(struct intel_guc *guc)
> > >   void intel_guc_submission_disable(struct intel_guc *guc)
> > >   {
> > > -	struct intel_gt *gt = guc_to_gt(guc);
> > > -
> > > -	GEM_BUG_ON(gt->awake); /* GT should be parked first */
> > > -
> > >   	/* Note: By the time we're here, GuC may have already been reset */
> > >   }
> > > -- 
> > > 2.25.0
> > > 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2021-07-28  1:06 UTC|newest]

Thread overview: 102+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-26 19:07 [PATCH v3 00/15] drm/i915/guc/slpc: Enable GuC based power management features Vinay Belgaumkar
2021-07-26 19:07 ` [Intel-gfx] " Vinay Belgaumkar
2021-07-26 19:07 ` [PATCH 01/15] drm/i915/guc: SQUASHED PATCH - DO NOT REVIEW Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-26 19:07 ` [PATCH 02/15] drm/i915/guc/slpc: Initial definitions for SLPC Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 13:43   ` Michal Wajdeczko
2021-07-27 13:43     ` [Intel-gfx] " Michal Wajdeczko
2021-07-27 18:47     ` Belgaumkar, Vinay
2021-07-27 18:47       ` [Intel-gfx] " Belgaumkar, Vinay
2021-07-26 19:07 ` [PATCH 03/15] drm/i915/guc/slpc: Gate Host RPS when SLPC is enabled Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 22:44   ` Matthew Brost
2021-07-27 22:44     ` [Intel-gfx] " Matthew Brost
2021-07-27 22:48     ` Belgaumkar, Vinay
2021-07-27 22:48       ` [Intel-gfx] " Belgaumkar, Vinay
2021-07-27 22:50       ` Matthew Brost
2021-07-27 22:50         ` [Intel-gfx] " Matthew Brost
2021-07-26 19:07 ` [PATCH 04/15] drm/i915/guc/slpc: Adding SLPC communication interfaces Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 13:59   ` Michal Wajdeczko
2021-07-27 13:59     ` [Intel-gfx] " Michal Wajdeczko
2021-07-27 19:03     ` Belgaumkar, Vinay
2021-07-27 19:03       ` [Intel-gfx] " Belgaumkar, Vinay
2021-07-26 19:07 ` [PATCH 05/15] drm/i915/guc/slpc: Allocate, initialize and release SLPC Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 14:03   ` Michal Wajdeczko
2021-07-27 14:03     ` [Intel-gfx] " Michal Wajdeczko
2021-07-26 19:07 ` [PATCH 06/15] drm/i915/guc/slpc: Enable SLPC and add related H2G events Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 15:12   ` Michal Wajdeczko
2021-07-27 15:12     ` Michal Wajdeczko
2021-07-27 20:00     ` Belgaumkar, Vinay
2021-07-27 20:00       ` Belgaumkar, Vinay
2021-07-27 20:19       ` Michal Wajdeczko
2021-07-27 20:19         ` Michal Wajdeczko
2021-07-27 20:52         ` Belgaumkar, Vinay
2021-07-27 20:52           ` Belgaumkar, Vinay
2021-07-26 19:07 ` [PATCH 07/15] drm/i915/guc/slpc: Remove BUG_ON in guc_submission_disable Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-28  0:20   ` Matthew Brost
2021-07-28  0:20     ` [Intel-gfx] " Matthew Brost
2021-07-28  1:01     ` Belgaumkar, Vinay
2021-07-28  1:01       ` [Intel-gfx] " Belgaumkar, Vinay
2021-07-28  1:06       ` Matthew Brost [this message]
2021-07-28  1:06         ` Matthew Brost
2021-07-26 19:07 ` [PATCH 08/15] drm/i915/guc/slpc: Add methods to set min/max frequency Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 15:24   ` Michal Wajdeczko
2021-07-27 15:24     ` Michal Wajdeczko
2021-07-27 22:35     ` Belgaumkar, Vinay
2021-07-27 22:35       ` Belgaumkar, Vinay
2021-07-28  4:03     ` Belgaumkar, Vinay
2021-07-28  4:03       ` Belgaumkar, Vinay
2021-07-26 19:07 ` [PATCH 09/15] drm/i915/guc/slpc: Add get max/min freq hooks Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 15:32   ` Michal Wajdeczko
2021-07-27 15:32     ` Michal Wajdeczko
2021-07-27 23:10     ` Belgaumkar, Vinay
2021-07-27 23:10       ` Belgaumkar, Vinay
2021-07-26 19:07 ` [PATCH 10/15] drm/i915/guc/slpc: Add debugfs for SLPC info Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 15:37   ` Michal Wajdeczko
2021-07-27 15:37     ` [Intel-gfx] " Michal Wajdeczko
2021-07-28  0:10     ` Belgaumkar, Vinay
2021-07-28  0:10       ` [Intel-gfx] " Belgaumkar, Vinay
2021-07-26 19:07 ` [PATCH 11/15] drm/i915/guc/slpc: Enable ARAT timer interrupt Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 15:40   ` Matthew Brost
2021-07-27 15:40     ` [Intel-gfx] " Matthew Brost
2021-07-28  0:15     ` Belgaumkar, Vinay
2021-07-28  0:15       ` [Intel-gfx] " Belgaumkar, Vinay
2021-07-26 19:07 ` [PATCH 12/15] drm/i915/guc/slpc: Cache platform frequency limits Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 16:00   ` Michal Wajdeczko
2021-07-27 16:00     ` [Intel-gfx] " Michal Wajdeczko
2021-07-28  1:27     ` Belgaumkar, Vinay
2021-07-28  1:27       ` [Intel-gfx] " Belgaumkar, Vinay
2021-07-26 19:07 ` [PATCH 13/15] drm/i915/guc/slpc: Sysfs hooks for SLPC Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 16:59   ` Michal Wajdeczko
2021-07-27 16:59     ` [Intel-gfx] " Michal Wajdeczko
2021-07-28 15:29     ` Belgaumkar, Vinay
2021-07-28 15:29       ` [Intel-gfx] " Belgaumkar, Vinay
2021-07-26 19:07 ` [PATCH 14/15] drm/i915/guc/slpc: Add SLPC selftest Vinay Belgaumkar
2021-07-26 19:07   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 19:16   ` Matthew Brost
2021-07-27 19:16     ` [Intel-gfx] " Matthew Brost
2021-07-27 22:25     ` Belgaumkar, Vinay
2021-07-27 22:25       ` [Intel-gfx] " Belgaumkar, Vinay
2021-07-26 19:08 ` [PATCH 15/15] drm/i915/guc/rc: Setup and enable GUCRC feature Vinay Belgaumkar
2021-07-26 19:08   ` [Intel-gfx] " Vinay Belgaumkar
2021-07-27 15:37   ` Matt Roper
2021-07-27 15:37     ` [Intel-gfx] " Matt Roper
2021-07-27 16:18     ` Belgaumkar, Vinay
2021-07-27 16:18       ` [Intel-gfx] " Belgaumkar, Vinay
2021-07-27 19:49       ` Matt Roper
2021-07-27 19:49         ` [Intel-gfx] " Matt Roper
2021-07-26 19:34 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc/slpc: Enable GuC based power management features Patchwork
2021-07-26 19:36 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-07-26 19:59 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-26 23:32 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210728010613.GA50866@DUT151-ICLU.fm.intel.com \
    --to=matthew.brost@intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=vinay.belgaumkar@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.